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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/nvmem/
Dst,stm32-romem.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/nvmem/st,stm32-romem.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 Factory-programmed data bindings
10 This represents STM32 Factory-programmed read only non-volatile area: locked
11 flash, OTP, read-only HW regs... This contains various information such as:
16 - Fabrice Gasnier <fabrice.gasnier@st.com>
19 - $ref: "nvmem.yaml#"
24 - st,stm32f4-otp
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/nvmem/
Dst,stm32-romem.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/nvmem/st,stm32-romem.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 Factory-programmed data
10 This represents STM32 Factory-programmed read only non-volatile area: locked
11 flash, OTP, read-only HW regs... This contains various information such as:
16 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
19 - $ref: nvmem.yaml#
24 - st,stm32f4-otp
[all …]
Dapple,efuses.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Apple SoC eFuse-based NVMEM
10 Apple SoCs such as the M1 contain factory-programmed eFuses used to e.g. store
11 calibration data for the PCIe and the Type-C PHY or unique chip identifiers
15 - Sven Peter <sven@svenpeter.dev>
18 - $ref: nvmem.yaml#
23 - enum:
24 - apple,t8103-efuses
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mtd/
Dmtd.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Miquel Raynal <miquel.raynal@bootlin.com>
11 - Richard Weinberger <richard@nod.at>
19 User-defined MTD device name. Can be used to assign user friendly
24 '#address-cells':
27 '#size-cells':
34 - compatible
37 "@[0-9a-f]+$":
[all …]
/kernel/linux/linux-5.10/Documentation/misc-devices/
Dad525x_dpot.rst1 .. SPDX-License-Identifier: GPL-2.0
9 settings. Access to the factory programmed tolerance is also provided, but
23 The tolerance files are the read-only factory programmed tolerance settings
24 and may vary greatly on a part-by-part basis. For exact interpretation of
35 0-0022 0-0027 0-002f
40 # ls /sys/bus/i2c/devices/0-002f/
45 # cd /sys/bus/i2c/devices/0-002f/
/kernel/linux/linux-6.6/Documentation/misc-devices/
Dad525x_dpot.rst1 .. SPDX-License-Identifier: GPL-2.0
9 settings. Access to the factory programmed tolerance is also provided, but
23 The tolerance files are the read-only factory programmed tolerance settings
24 and may vary greatly on a part-by-part basis. For exact interpretation of
35 0-0022 0-0027 0-002f
40 # ls /sys/bus/i2c/devices/0-002f/
45 # cd /sys/bus/i2c/devices/0-002f/
/kernel/linux/linux-6.6/drivers/nvmem/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
36 such as the M1. These are e.g. used to store factory programmed
37 calibration data required for the PCIe or the USB-C PHY.
40 be called nvmem-apple-efuses.
43 tristate "Broadcom On-Chip OTP Controller support"
52 will be called nvmem-bcm-ocotp.
72 will be called nvmem-imx-iim.
75 tristate "i.MX 6/7/8 On-Chip OTP Controller support"
79 This is a driver for the On-Chip OTP Controller (OCOTP) available on
80 i.MX6 SoCs, providing access to 4 Kbits of one-time programmable
[all …]
/kernel/linux/linux-5.10/Documentation/ABI/testing/
Dsysfs-driver-tegra-fuse1 What: /sys/devices/*/<our-device>/fuse
4 Description: read-only access to the efuses on Tegra20, Tegra30, Tegra114
6 data programmed at the factory. The data is layed out in 32bit
/kernel/linux/linux-6.6/Documentation/ABI/testing/
Dsysfs-driver-tegra-fuse1 What: /sys/devices/*/<our-device>/fuse
4 Description: read-only access to the efuses on Tegra20, Tegra30, Tegra114
6 data programmed at the factory. The data is laid out in 32bit
/kernel/linux/linux-5.10/drivers/nvmem/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
33 will be called nvmem-imx-iim.
36 tristate "i.MX 6/7/8 On-Chip OTP Controller support"
40 This is a driver for the On-Chip OTP Controller (OCOTP) available on
41 i.MX6 SoCs, providing access to 4 Kbits of one-time programmable
45 will be called nvmem-imx-ocotp.
48 tristate "i.MX8 SCU On-Chip OTP Controller support"
52 This is a driver for the SCU On-Chip OTP Controller (OCOTP)
88 tristate "Freescale MXS On-Chip OTP Memory Support"
97 will be called nvmem-mxs-ocotp.
[all …]
Dstm32-romem.c1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Factory-programmed memory read access driver
5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
9 #include <linux/arm-smccc.h>
12 #include <linux/nvmem-provider.h>
15 /* BSEC secure service access from non-secure */
25 /* 32 (x 32-bits) lower shadow registers */
45 *buf8++ = readb_relaxed(priv->base + i); in stm32_romem_read()
57 return -EIO; in stm32_bsec_smc()
64 return -ENXIO; in stm32_bsec_smc()
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/reset/
Dti,tps380x-reset.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/ti,tps380x-reset.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marco Felsch <kernel@pengutronix.de>
16 reset input (MR). The RESET output remains asserted for the factory
17 programmed delay after the voltage return above its threshold or after the
25 - ti,tps3801
27 reset-gpios:
31 "#reset-cells":
[all …]
/kernel/linux/linux-6.6/drivers/mtd/chips/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
13 support any device that is CFI-compliant, you need to enable this
18 tristate "Detect non-CFI AMD/JEDEC-compatible flash chips"
22 This option enables JEDEC-style probing of flash chips which are not
24 CFI-targeted flash drivers for any chips which are identified which
26 covers most AMD/Fujitsu-compatible chips and also non-CFI
53 are expected to be wired to the CPU in 'host-endian' form.
85 bool "Support 8-bit buswidth" if MTD_CFI_GEOMETRY
92 bool "Support 16-bit buswidth" if MTD_CFI_GEOMETRY
99 bool "Support 32-bit buswidth" if MTD_CFI_GEOMETRY
[all …]
/kernel/linux/linux-5.10/drivers/mtd/chips/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
13 support any device that is CFI-compliant, you need to enable this
18 tristate "Detect non-CFI AMD/JEDEC-compatible flash chips"
22 This option enables JEDEC-style probing of flash chips which are not
24 CFI-targeted flash drivers for any chips which are identified which
26 covers most AMD/Fujitsu-compatible chips and also non-CFI
53 are expected to be wired to the CPU in 'host-endian' form.
85 bool "Support 8-bit buswidth" if MTD_CFI_GEOMETRY
92 bool "Support 16-bit buswidth" if MTD_CFI_GEOMETRY
99 bool "Support 32-bit buswidth" if MTD_CFI_GEOMETRY
[all …]
/kernel/linux/linux-6.6/drivers/hwmon/
Dnsa320-hwmon.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * drivers/hwmon/nsa320-hwmon.c
8 * Copyright (C) 2016 Adam Baker <linux@baker-net.org.uk>
18 #include <linux/hwmon-sysfs.h>
29 * The Zyxel hwmon MCU is a Holtek HT46R065 that is factory programmed
72 mutex_lock(&hwmon->update_lock); in nsa320_hwmon_update()
74 mcu_data = hwmon->mcu_data; in nsa320_hwmon_update()
76 if (time_after(jiffies, hwmon->last_updated + HZ) || mcu_data == 0) { in nsa320_hwmon_update()
77 gpiod_set_value(hwmon->act, 1); in nsa320_hwmon_update()
82 gpiod_set_value(hwmon->clk, 0); in nsa320_hwmon_update()
[all …]
/kernel/linux/linux-5.10/drivers/hwmon/
Dnsa320-hwmon.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * drivers/hwmon/nsa320-hwmon.c
8 * Copyright (C) 2016 Adam Baker <linux@baker-net.org.uk>
18 #include <linux/hwmon-sysfs.h>
31 * The Zyxel hwmon MCU is a Holtek HT46R065 that is factory programmed
74 mutex_lock(&hwmon->update_lock); in nsa320_hwmon_update()
76 mcu_data = hwmon->mcu_data; in nsa320_hwmon_update()
78 if (time_after(jiffies, hwmon->last_updated + HZ) || mcu_data == 0) { in nsa320_hwmon_update()
79 gpiod_set_value(hwmon->act, 1); in nsa320_hwmon_update()
84 gpiod_set_value(hwmon->clk, 0); in nsa320_hwmon_update()
[all …]
/kernel/linux/linux-5.10/drivers/mtd/devices/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "Self-contained MTD device drivers"
12 These devices come in memory configurations from 32M - 1G. If you
41 tristate "DEC MS02-NV NVRAM module support"
44 This is an MTD driver for the DEC's MS02-NV (54-20948-01) battery
45 backed-up NVRAM module. The module was originally meant as an NFS
52 The module will be called ms02-nv.
59 Sometimes DataFlash chips are packaged inside MMC-format
77 one-time-programmable (OTP) data. The first half may be written
79 other key product data. The second half is programmed with a
[all …]
/kernel/linux/linux-6.6/drivers/mtd/devices/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "Self-contained MTD device drivers"
12 These devices come in memory configurations from 32M - 1G. If you
41 tristate "DEC MS02-NV NVRAM module support"
44 This is an MTD driver for the DEC's MS02-NV (54-20948-01) battery
45 backed-up NVRAM module. The module was originally meant as an NFS
52 The module will be called ms02-nv.
59 Sometimes DataFlash chips are packaged inside MMC-format
77 one-time-programmable (OTP) data. The first half may be written
79 other key product data. The second half is programmed with a
[all …]
/kernel/linux/linux-6.6/Documentation/networking/device_drivers/can/
Dcan327.rst1 .. SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
7 --------
14 -----------
26 -------------
33 order to fake full-duplex operation.
36 enough to implement simple request-response protocols (such as OBD II),
50 -----------
59 ----------------------------------
61 Every ELM327 chip is factory programmed to operate at a serial setting
68 --debug \
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/renesas/
Dbeacon-renesom-som.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/gpio/gpio.h>
21 compatible = "fixed-clock";
22 #clock-cells = <0>;
23 clock-frequency = <32768>;
24 clock-output-names = "osc_32k";
28 compatible = "regulator-fixed";
29 regulator-name = "fixed-1.8V";
30 regulator-min-microvolt = <1800000>;
31 regulator-max-microvolt = <1800000>;
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/renesas/
Dbeacon-renesom-som.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/clock/versaclock.h>
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
19 clock-frequency = <32768>;
20 clock-output-names = "osc_32k";
23 reg_1p8v: regulator-1p8v {
24 compatible = "regulator-fixed";
25 regulator-name = "fixed-1.8V";
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dimx6-logicpd-som.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
10 stdout-path = &uart1;
18 reg_wl18xx_vmmc: regulator-wl18xx {
19 compatible = "regulator-fixed";
20 regulator-name = "vwl1837";
21 regulator-min-microvolt = <3300000>;
22 regulator-max-microvolt = <3300000>;
24 startup-delay-us = <70000>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/nxp/imx/
Dimx6-logicpd-som.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
10 stdout-path = &uart1;
18 reg_wl18xx_vmmc: regulator-wl18xx {
19 compatible = "regulator-fixed";
20 regulator-name = "vwl1837";
21 regulator-min-microvolt = <3300000>;
22 regulator-max-microvolt = <3300000>;
24 startup-delay-us = <70000>;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/
Dimx8mm-beacon-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 compatible = "mmc-pwrseq-simple";
9 pinctrl-names = "default";
10 pinctrl-0 = <&pinctrl_usdhc1_gpio>;
11 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
13 clock-names = "ext_clock";
14 post-power-on-delay-ms = <80>;
24 cpu-supply = <&buck2_reg>;
28 operating-points-v2 = <&ddrc_opp_table>;
30 ddrc_opp_table: opp-table {
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/freescale/
Dimx8mp-beacon-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
18 reg_wl_bt: regulator-wifi-bt {
19 compatible = "regulator-fixed";
20 pinctrl-names = "default";
21 pinctrl-0 = <&pinctrl_reg_wl_bt>;
22 regulator-name = "wl-bt-pow-dwn";
23 regulator-min-microvolt = <3300000>;
24 regulator-max-microvolt = <3300000>;
26 startup-delay-us = <70000>;
27 regulator-always-on;
[all …]

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