| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/dma/ |
| D | st,stm32-mdma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/dma/st,stm32-mdma.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 The STM32 MDMA is a general-purpose direct memory access controller capable of 13 described in the dma.txt file, using a five-cell specifier for each channel: 14 a phandle to the MDMA controller plus the following five integer cells: 22 -bit 0-1: Source increment mode 26 -bit 2-3: Destination increment mode 30 -bit 8-9: Source increment offset size [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/ |
| D | st,stm32-mdma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/dma/st,stm32-mdma.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 The STM32 MDMA is a general-purpose direct memory access controller capable of 13 described in the dma.txt file, using a five-cell specifier for each channel: 14 a phandle to the MDMA controller plus the following five integer cells: 22 -bit 0-1: Source increment mode 26 -bit 2-3: Destination increment mode 30 -bit 8-9: Source increment offset size [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/ |
| D | renesas,rzg2l-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/renesas,rzg2l-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Geert Uytterhoeven <geert+renesas@glider.be> 11 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> 16 Pin multiplexing and GPIO configuration is performed on a per-pin basis. 24 - items: 25 - enum: 26 - renesas,r9a07g043-pinctrl # RZ/G2UL{Type-1,Type-2} and RZ/Five [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mfd/ |
| D | wlf,arizona.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - patches@opensource.cirrus.com 17 - $ref: /schemas/spi/spi-peripheral-props.yaml 18 - $ref: /schemas/sound/wlf,arizona.yaml# 19 - $ref: /schemas/regulator/wlf,arizona.yaml# 20 - $ref: /schemas/extcon/wlf,arizona.yaml# 21 - if: 26 - cirrus,cs47l24 [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mfd/ |
| D | wlf,arizona.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - patches@opensource.cirrus.com 17 - $ref: /schemas/sound/wlf,arizona.yaml# 18 - $ref: /schemas/regulator/wlf,arizona.yaml# 19 - $ref: /schemas/extcon/wlf,arizona.yaml# 20 - if: 25 - cirrus,cs47l24 26 - wlf,wm1831 [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pwm/ |
| D | pwm-mediatek.txt | 4 - compatible: should be "mediatek,<name>-pwm": 5 - "mediatek,mt2712-pwm": found on mt2712 SoC. 6 - "mediatek,mt7622-pwm": found on mt7622 SoC. 7 - "mediatek,mt7623-pwm": found on mt7623 SoC. 8 - "mediatek,mt7628-pwm": found on mt7628 SoC. 9 - "mediatek,mt7629-pwm": found on mt7629 SoC. 10 - "mediatek,mt8516-pwm": found on mt8516 SoC. 11 - reg: physical base address and length of the controller's registers. 12 - #pwm-cells: must be 2. See pwm.yaml in this directory for a description of 13 the cell format. [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/virtio/ |
| D | iommu.txt | 3 When virtio-iommu uses the PCI transport, its programming interface is 6 masters. Therefore, the PCI root complex that hosts the virtio-iommu 11 - compatible: Should be "virtio,pci-iommu" 12 - reg: PCI address of the IOMMU. As defined in the PCI Bus 13 Binding reference [1], the reg property is a five-cell 18 - #iommu-cells: Each platform DMA master managed by the IOMMU is assigned 20 For virtio-iommu, #iommu-cells must be 1. 24 - DMA from the IOMMU device isn't managed by another IOMMU. Therefore the 25 virtio-iommu node doesn't have an "iommus" property, and is omitted from 26 the iommu-map property of the root complex. [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/ |
| D | renesas,rzg2l-cpg.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/renesas,rzg2l-cpg.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Geert Uytterhoeven <geert+renesas@glider.be> 13 On Renesas RZ/{G2L,V2L}-alike SoC's, the CPG (Clock Pulse Generator) and Module 18 - The CPG block generates various core clocks, 19 - The Module Standby Mode block provides two functions: 27 - renesas,r9a07g043-cpg # RZ/G2UL{Type-1,Type-2} and RZ/Five 28 - renesas,r9a07g044-cpg # RZ/G2{L,LC} [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/virtio/ |
| D | pci-iommu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/virtio/pci-iommu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: virtio-iommu device using the virtio-pci transport 10 - Jean-Philippe Brucker <jean-philippe@linaro.org> 13 When virtio-iommu uses the PCI transport, its programming interface is 16 masters. Therefore, the PCI root complex that hosts the virtio-iommu 20 virtio-iommu node doesn't have an "iommus" property, and is omitted from 21 the iommu-map property of the root complex. [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pci/ |
| D | pci.txt | 3 PCI Bus Binding to: IEEE Std 1275-1994 4 https://www.devicetree.org/open-firmware/bindings/pci/pci2_1.pdf 9 https://www.devicetree.org/open-firmware/practice/imap/imap0_9d.pdf 14 - linux,pci-domain: 21 - max-link-speed: 27 - reset-gpios: 30 - supports-clkreq: 34 not to advertise ASPM L1 Sub-States support if there is no CLKREQ signal. 36 PCI-PCI Bridge properties 37 ------------------------- [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/pci/ |
| D | pci.txt | 3 PCI Bus Binding to: IEEE Std 1275-1994 4 https://www.devicetree.org/open-firmware/bindings/pci/pci2_1.pdf 9 https://www.devicetree.org/open-firmware/practice/imap/imap0_9d.pdf 14 - linux,pci-domain: 21 - max-link-speed: 27 - reset-gpios: 30 - supports-clkreq: 34 not to advertise ASPM L1 Sub-States support if there is no CLKREQ signal. 36 PCI-PCI Bridge properties 37 ------------------------- [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/powerpc/fsl/ |
| D | pamu.txt | 5 The PAMU is an I/O MMU that provides device-to-memory access control and 10 - compatible : <string> 11 First entry is a version-specific string, such as 12 "fsl,pamu-v1.0". The second is "fsl,pamu". 13 - ranges : <prop-encoded-array> 18 PAMU v1.0, on an SOC that has five PAMU devices, the size 20 - interrupts : <prop-encoded-array> 25 - #address-cells: <u32> 27 - #size-cells : <u32> 31 - reg : <prop-encoded-array> [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/powerpc/fsl/ |
| D | pamu.txt | 5 The PAMU is an I/O MMU that provides device-to-memory access control and 10 - compatible : <string> 11 First entry is a version-specific string, such as 12 "fsl,pamu-v1.0". The second is "fsl,pamu". 13 - ranges : <prop-encoded-array> 18 PAMU v1.0, on an SOC that has five PAMU devices, the size 20 - interrupts : <prop-encoded-array> 25 - #address-cells: <u32> 27 - #size-cells : <u32> 31 - reg : <prop-encoded-array> [all …]
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| /kernel/linux/linux-5.10/arch/powerpc/platforms/ |
| D | Kconfig.cputype | 1 # SPDX-License-Identifier: GPL-2.0 8 bool "64-bit kernel" 11 This option selects whether a 32-bit or a 64-bit kernel 22 There are five families of 32 bit PowerPC chips supported. 127 bool "Cell Broadband Engine" 199 default "cell" if CELL_CPU 292 This option enables kernel support for larger than 32-bit physical 297 is platform-dependent. 312 any affect on a non-altivec cpu (it does, however add code to the 328 VSX (P7 and above), but does not have any affect on a non-VSX [all …]
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| /kernel/linux/linux-6.6/arch/powerpc/platforms/ |
| D | Kconfig.cputype | 1 # SPDX-License-Identifier: GPL-2.0 7 bool "64-bit kernel" 10 This option selects whether a 32-bit or a 64-bit kernel 18 There are five families of 32 bit PowerPC chips supported. 145 bool "Cell Broadband Engine" 256 default "cell" if CELL_CPU 282 default "-mtune=power10" if $(cc-option,-mtune=power10) 283 default "-mtune=power9" if $(cc-option,-mtune=power9) 284 default "-mtune=power8" if $(cc-option,-mtune=power8) 366 This option enables kernel support for larger than 32-bit physical [all …]
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| /kernel/linux/linux-5.10/Documentation/admin-guide/ |
| D | unicode.rst | 4 Last update: 2005-01-17, version 1.4 10 http://www.lanana.org/docs/unicode/admin-guide/unicode.rst 13 ------------ 16 characters to fonts. By downloading a single Unicode-to-font table, 17 both the eight-bit character sets and UTF-8 mode are changed to use 20 This changes the semantics of the eight-bit character tables subtly. 26 LAT1_MAP Latin-1 (ISO 8859-1) ESC ( B 34 permits for example the use of block graphics even with a Latin-1 font 38 codes nor their uses match ISO 2022; Linux has two 8-bit codes (G0 and 39 G1), whereas ISO 2022 has four 7-bit codes (G0-G3). [all …]
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| /kernel/linux/linux-6.6/Documentation/admin-guide/ |
| D | unicode.rst | 4 Last update: 2005-01-17, version 1.4 12 ------------ 15 characters to fonts. By downloading a single Unicode-to-font table, 16 both the eight-bit character sets and UTF-8 mode are changed to use 19 This changes the semantics of the eight-bit character tables subtly. 25 LAT1_MAP Latin-1 (ISO 8859-1) ESC ( B 33 permits for example the use of block graphics even with a Latin-1 font 37 codes nor their uses match ISO 2022; Linux has two 8-bit codes (G0 and 38 G1), whereas ISO 2022 has four 7-bit codes (G0-G3). 41 U+F8FF has been reserved for OS-wide allocation (the Unicode Standard [all …]
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| /kernel/linux/linux-5.10/drivers/mfd/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 44 tristate "Active-semi ACT8945A" 49 Support for the ACT8945A PMIC from Active-semi. This device 50 features three step-down DC/DC converters and four low-dropout 66 sun4i-gpadc-iio and the hwmon driver iio_hwmon. 69 called sun4i-gpadc. 88 tablets etc. It has 4 DC/DC step-down regulators, 3 DC/DC step-down 119 over at91-usart-serial driver and usart-spi-driver. Only one function 135 tristate "Atmel HLCDC (High-end LCD Controller)" 172 tristate "X-Powers AC100" [all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/mediatek/ |
| D | mtk_dp.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) 2019-2022 MediaTek Inc. 18 #include <linux/arm-smccc.h> 23 #include <linux/media-bus-format.h> 24 #include <linux/nvmem-consumer.h> 33 #include <sound/hdmi-codec.h> 317 .name = "mtk-dp-registers", 330 ret = regmap_read(mtk_dp->regs, offset, &read_val); in mtk_dp_read() 332 dev_err(mtk_dp->dev, "Failed to read register 0x%x: %d\n", in mtk_dp_read() 342 int ret = regmap_write(mtk_dp->regs, offset, val); in mtk_dp_write() [all …]
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| /kernel/linux/linux-5.10/include/uapi/linux/ |
| D | bpf.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2 /* Copyright (c) 2011-2014 PLUMgrid, http://plumgrid.com 21 #define BPF_DW 0x18 /* double word (64-bit) */ 30 #define BPF_TO_LE 0x00 /* convert to little-endian */ 31 #define BPF_TO_BE 0x08 /* convert to big-endian */ 62 /* BPF has 10 general purpose 64-bit registers and stack frame. */ 90 /* BPF syscall commands, see bpf(2) man-page for details. */ 260 /* cgroup-bpf attach flags used in BPF_PROG_ATTACH command 264 * BPF_F_ALLOW_OVERRIDE: If a sub-cgroup installs some bpf program, 265 * the program in this cgroup yields to sub-cgroup program. [all …]
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| /kernel/linux/linux-5.10/tools/include/uapi/linux/ |
| D | bpf.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2 /* Copyright (c) 2011-2014 PLUMgrid, http://plumgrid.com 21 #define BPF_DW 0x18 /* double word (64-bit) */ 30 #define BPF_TO_LE 0x00 /* convert to little-endian */ 31 #define BPF_TO_BE 0x08 /* convert to big-endian */ 62 /* BPF has 10 general purpose 64-bit registers and stack frame. */ 90 /* BPF syscall commands, see bpf(2) man-page for details. */ 260 /* cgroup-bpf attach flags used in BPF_PROG_ATTACH command 264 * BPF_F_ALLOW_OVERRIDE: If a sub-cgroup installs some bpf program, 265 * the program in this cgroup yields to sub-cgroup program. [all …]
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| /kernel/linux/linux-6.6/tools/include/uapi/linux/ |
| D | bpf.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2 /* Copyright (c) 2011-2014 PLUMgrid, http://plumgrid.com 21 #define BPF_DW 0x18 /* double word (64-bit) */ 23 #define BPF_ATOMIC 0xc0 /* atomic memory ops - op type in immediate */ 24 #define BPF_XADD 0xc0 /* exclusive add - legacy name */ 32 #define BPF_TO_LE 0x00 /* convert to little-endian */ 33 #define BPF_TO_BE 0x08 /* convert to big-endian */ 51 #define BPF_CMPXCHG (0xf0 | BPF_FETCH) /* atomic compare-and-write */ 69 /* BPF has 10 general purpose 64-bit registers and stack frame. */ 111 BPF_CGROUP_ITER_DESCENDANTS_PRE, /* walk descendants in pre-order. */ [all …]
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| /kernel/linux/linux-6.6/include/uapi/linux/ |
| D | bpf.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2 /* Copyright (c) 2011-2014 PLUMgrid, http://plumgrid.com 21 #define BPF_DW 0x18 /* double word (64-bit) */ 23 #define BPF_ATOMIC 0xc0 /* atomic memory ops - op type in immediate */ 24 #define BPF_XADD 0xc0 /* exclusive add - legacy name */ 32 #define BPF_TO_LE 0x00 /* convert to little-endian */ 33 #define BPF_TO_BE 0x08 /* convert to big-endian */ 51 #define BPF_CMPXCHG (0xf0 | BPF_FETCH) /* atomic compare-and-write */ 69 /* BPF has 10 general purpose 64-bit registers and stack frame. */ 111 BPF_CGROUP_ITER_DESCENDANTS_PRE, /* walk descendants in pre-order. */ [all …]
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| /kernel/linux/patches/linux-5.10/imx8mm_patch/patches/ |
| D | 0005_linux_include.patch | 7 Change-Id: Icf23f02df7b566848af808b9eeaed889d1773e71 9 diff --git a/include/drm/bridge/cdns-mhdp.h b/include/drm/bridge/cdns-mhdp.h 12 --- /dev/null 13 +++ b/include/drm/bridge/cdns-mhdp.h 14 @@ -0,0 +1,921 @@ 15 +/* SPDX-License-Identifier: GPL-2.0 */ 18 + * Author: Chris Zhong <zyw@rock-chips.com> 39 +#include <sound/hdmi-codec.h> 489 +#define F_HDMI_ENCODING(x) (((x) & ((1 << 2) - 1)) << 16) 490 +#define F_VIF_DATA_WIDTH(x) (((x) & ((1 << 2) - 1)) << 2) [all …]
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