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/third_party/mesa3d/src/amd/compiler/
D	README-ISA.md	8 D.u = abs(S0.i - S1.i) + S2.u. 15 ABS_DIFF (A,B) = (A>B) ? (A-B) : (B-A) 21 `v_sad_u32(-5, 0, 0)` would return `4294967291` (`-5` interpreted as unsigned), 78 > and sent to the texture cache. Any texture or buffer resources and samplers 79 > are also sent immediately. However, write-data is not immediately sent to the 80 > texture cache. 102 ## FLAT, Scratch, Global instructions 118 GFX7-8 ISA manuals are mistaken about the available LDS size. 138 ## RDNA L0, L1 cache and DLC, GLC bits 140 The old L1 cache was renamed to L0, and a new L1 cache was added to RDNA. The [all …]
D	aco_assembler.cpp	4 * SPDX-License-Identifier: MIT 39 uint32_t loop_header = -1u; 45 : program(program_), gfx_level(program->gfx_level), symbols(symbols_) in asm_context() 59 int subvector_begin_pos = -1; 65 unsigned addr_dwords = instr->operands.size() - 3; in get_mimg_nsa_dwords() 67 if (instr->operands[3 + i].physReg() != in get_mimg_nsa_dwords() 68 instr->operands[3 + (i - 1)].physReg().advance(instr->operands[3 + (i - 1)].bytes())) in get_mimg_nsa_dwords() 69 return DIV_ROUND_UP(addr_dwords - 1, 4); in get_mimg_nsa_dwords() 77 switch (instr->opcode) { in get_vopd_opy_start() 119 uint8_t mask = get_gfx11_true16_mask(instr->opcode); in needs_vop3_gfx11() [all …]
D	aco_print_ir.cpp	4 * SPDX-License-Identifier: MIT 113 fprintf(output, "-%d]", r + size - 1); in print_physReg() 126 fprintf(output, "%d", reg - 128); in print_constant() 129 fprintf(output, "%d", 192 - reg); in print_constant() 135 case 241: fprintf(output, "-0.5"); break; in print_constant() 137 case 243: fprintf(output, "-1.0"); break; in print_constant() 139 case 245: fprintf(output, "-2.0"); break; in print_constant() 141 case 247: fprintf(output, "-4.0"); break; in print_constant() 150 print_reg_class(definition->regClass(), output); in print_definition() 151 if (definition->isPrecise()) in print_definition() [all …]
D	aco_opt_value_numbering.cpp	4 * SPDX-License-Identifier: MIT 14 * Implements the algorithm for dominator-tree value numbering 36 * In order to calculate the expression set, only the right-hand-side of an 41 uint32_t hash = uint32_t(instr->format) << 16 \| uint32_t(instr->opcode); in operator ()() 43 for (const Operand& op : instr->operands) in operator ()() 46 size_t data_size = get_instr_data_size(instr->format); in operator ()() 57 uint32_t len = instr->operands.size() + instr->definitions.size(); in operator ()() 71 if (a->format != b->format) in operator ()() 73 if (a->opcode != b->opcode) in operator ()() 75 if (a->operands.size() != b->operands.size() \|\| in operator ()() [all …]
/third_party/mesa3d/src/amd/common/
D	amd_kernel_code_t.h	4 * SPDX-License-Identifier: MIT 10 //---------------------------------------------------------------------------// 12 //---------------------------------------------------------------------------// 48 ((1 << AMD_CODE_PROPERTY_ENABLE_SGPR_PRIVATE_SEGMENT_BUFFER_WIDTH) - 1) 54 ((1 << AMD_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_PTR_WIDTH) - 1) 60 ((1 << AMD_CODE_PROPERTY_ENABLE_SGPR_QUEUE_PTR_WIDTH) - 1) 66 ((1 << AMD_CODE_PROPERTY_ENABLE_SGPR_KERNARG_SEGMENT_PTR_WIDTH) - 1) 72 ((1 << AMD_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_ID_WIDTH) - 1) 78 ((1 << AMD_CODE_PROPERTY_ENABLE_SGPR_FLAT_SCRATCH_INIT_WIDTH) - 1) 84 ((1 << AMD_CODE_PROPERTY_ENABLE_SGPR_PRIVATE_SEGMENT_SIZE_WIDTH) - 1) [all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
D	AMDKernelCodeT.h	1 //===-- AMDGPUKernelCodeT.h - Print AMDGPU assembly code ---------- C++ --===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 9 //===----------------------------------------------------------------------===// 20 //---------------------------------------------------------------------------// 22 //---------------------------------------------------------------------------// 91 …BUFFER = ((1 << AMD_CODE_PROPERTY_ENABLE_SGPR_PRIVATE_SEGMENT_BUFFER_WIDTH) - 1) << AMD_CODE_PROPE… 95 …GPR_DISPATCH_PTR = ((1 << AMD_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_PTR_WIDTH) - 1) << AMD_CODE_PROPE… 99 …AMD_CODE_PROPERTY_ENABLE_SGPR_QUEUE_PTR = ((1 << AMD_CODE_PROPERTY_ENABLE_SGPR_QUEUE_PTR_WIDTH) - … 103 …GMENT_PTR = ((1 << AMD_CODE_PROPERTY_ENABLE_SGPR_KERNARG_SEGMENT_PTR_WIDTH) - 1) << AMD_CODE_PROPE… [all …]
D	SIInstrFormats.td	1 //===-- SIInstrFormats.td - SI Instruction Encodings ----------------------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 11 //===----------------------------------------------------------------------===// 16 // Low bits - basic encoding information. 43 field bit FLAT = 0; 50 // High bits - other information. 63 // Most sopk treat the immediate as a signed 16-bit, however some 67 // This is an s_store_dword* instruction that requires a cache flush 69 // SMEM instructions like the cache flush ones. [all …]
/third_party/mesa3d/docs/relnotes/
D	18.1.6.rst	16 ---------------- 20 580e03328ffefe1fd43b19ab7669f20d931601a1c0a4c0f8b9c65d6e81a06df3 mesa-18.1.6.tar.gz 21 bb7ce759069801804fcfb8152da3457f76cd7b4e0096e4870ff5adcb5c894289 mesa-18.1.6.tar.xz 24 ------------ 29 --------- 31 - `Bug 13728 <https://bugs.freedesktop.org/show_bug.cgi?id=13728>`__ - 34 - `Bug 98699 <https://bugs.freedesktop.org/show_bug.cgi?id=98699>`__ - 36 - `Bug 99730 <https://bugs.freedesktop.org/show_bug.cgi?id=99730>`__ - 39 - `Bug 106382 <https://bugs.freedesktop.org/show_bug.cgi?id=106382>`__ 40 - Shader cache breaks INTEL_DEBUG=shader_time [all …]
D	9.1.1.rst	15 ------------- 19 6508d9882d8dce7106717f365632700c MesaLib-9.1.1.tar.gz 20 6ea2bdc3b7ecfb4257b39814b4182580 MesaLib-9.1.1.tar.bz2 21 3434c0eb47849a08c53cd32833d10d13 MesaLib-9.1.1.zip 24 ------------ 29 --------- 33 - `Bug 30232 <https://bugs.freedesktop.org/show_bug.cgi?id=30232>`__ - 35 - `Bug 32429 <https://bugs.freedesktop.org/show_bug.cgi?id=32429>`__ - 37 - `Bug 38086 <https://bugs.freedesktop.org/show_bug.cgi?id=38086>`__ - 38 Mesa 7.11-devel implementation error: Unexpected program target in [all …]
D	9.1.3.rst	15 ------------- 19 952ccd03547ed72333b64e1746cf8ada MesaLib-9.1.3.tar.bz2 20 26d2f1aa8e9db388d51fcbd163c61fb7 MesaLib-9.1.3.tar.gz 21 7017b7bdf0ebfd39a5c46cee7cf6b567 MesaLib-9.1.3.zip 24 ------------ 29 --------- 33 - `Bug 39251 <https://bugs.freedesktop.org/show_bug.cgi?id=39251>`__ - 36 - `Bug 47478 <https://bugs.freedesktop.org/show_bug.cgi?id=47478>`__ - 39 - `Bug 56416 <https://bugs.freedesktop.org/show_bug.cgi?id=56416>`__ - 42 - `Bug 57436 <https://bugs.freedesktop.org/show_bug.cgi?id=57436>`__ - [all …]
D	24.0.9.rst	`1 Mesa 24.0.9 Release Notes / 2024-06-06 18 --------------- 22 51aa686ca4060e38711a9e8f60c8f1efaa516baf411946ed7f2c265cd582ca4c mesa-24.0.9.tar.xz 26 ------------ 28 - None 32 --------- 34 - RustiCL: deadlock when calling clGetProfilingInfo() on callbacks 35 - dEQP-VK.pipeline.pipeline_library.shader_module_identifier.pipeline_from_id.graphics regression 36 - anv: unbounded shader cache 37 - radv: Crash due to nir validation fail in Enshrouded [all …]`
/third_party/mesa3d/docs/drivers/
D	asahi.rst	7 ----------------- 12 reverse-engineering the hardware, as glue to get at the "interesting" GPU 15 The library is only built if ``-Dtools=asahi`` is passed. It builds a single 24 ----------------- 36 ``st_var`` instruction. ``st_var`` takes a vertex output index and a 32-bit 39 consist of a single 32-bit value or an aligned 16-bit register pair, depending 40 on whether interpolation should happen at 32-bit or 16-bit. Vertex outputs are 42 32-bit user varyings coming next with perspective, flat, and linear interpolated 43 varyings grouped in that order, then 16-bit user varyings with the same groupings, 51 .. list-table:: Ordering of vertex outputs with all outputs used [all …]
/third_party/mindspore/mindspore-src/source/mindspore/ccsrc/minddata/dataset/engine/cache/
D	cache_service.h	8 * http://www.apache.org/licenses/LICENSE-2.0 31 #include "minddata/dataset/engine/cache/cache_request.h" 32 #include "minddata/dataset/engine/cache/cache_pool.h" 41 /// \brief A cache service for storing/fetching buffers to in memory cache and may spill to disk th… 48 /// \param mem_sz Memory size to be set aside for the in memory cache. 0 means unlimited 50 /// \param generate_id If the cache service should generate row id for buffer that is cached. 51 /// For non-mappable dataset, this should be set to true. 58 /// \brief Main function to cache a row which is in form a series of buffers. 73 /// All needed results are stored in the flat buffer. 81 /// \brief A structure returned from the cache server for statistics request. [all …]
D	cache_fbb.h	`8 * http://www.apache.org/licenses/LICENSE-2.0 25 #include "minddata/dataset/engine/cache/de_tensor_generated.h" 38 /// \brief A function used by BatchFetchRequest to deserialize a flat buffer back to a tensor row.`
D	cache_fbb.cc	8 * http://www.apache.org/licenses/LICENSE-2.0 16 #include "minddata/dataset/engine/cache/cache_fbb.h" 26 auto shape_off = fbb->CreateVector(ts->shape().AsVector()); in SerializeOneTensorMeta() 27 const auto ptr = ts->GetBuffer(); in SerializeOneTensorMeta() 31 auto src = ts->type().value(); in SerializeOneTensorMeta() 37 // Map the type to fill in the flat buffer. in SerializeOneTensorMeta() 81 tensor_sz.push_back(ts_ptr->SizeInBytes()); in SerializeTensorRowHeader() 83 auto column_off = fbb->CreateVector(v); in SerializeTensorRowHeader() 84 auto data_sz_off = fbb->CreateVector(tensor_sz); in SerializeTensorRowHeader() 90 row_builder.add_size_of_this(-1); // fill in later after we call Finish. in SerializeTensorRowHeader() [all …]
/third_party/mesa3d/src/gallium/drivers/freedreno/a3xx/
D	fd3_program.c	3 * SPDX-License-Identifier: MIT 29 return (!rast->depth_clip_near \|\| in fd3_needs_manual_clipping() 30 util_bitcount(rast->clip_plane_enable) > 6 \|\| in fd3_needs_manual_clipping() 39 const struct ir3_info *si = &so->info; in emit_shader() 44 if (so->type == MESA_SHADER_VERTEX) { in emit_shader() 51 sz = si->sizedwords; in emit_shader() 53 bin = fd_bo_map(so->bo); in emit_shader() 63 CP_LOAD_STATE_0_NUM_UNIT(so->instrlen)); in emit_shader() 68 OUT_RELOC(ring, so->bo, 0, CP_LOAD_STATE_1_STATE_TYPE(ST_SHADER), 0); in emit_shader() 94 vsi = &vp->info; in fd3_program_emit() [all …]
/third_party/vk-gl-cts/external/vulkan-docs/src/chapters/
D	shaders.txt	1 // Copyright 2015-2021 The Khronos Group, Inc. 3 // SPDX-License-Identifier: CC-BY-4.0 14 control and evaluation shaders operating on <<drawing-patch-lists,patches>>, 19 <<pipeline-graphics-subsets-pre-rasterization,pre-rasterization shader 34 Shader variables are associated with execution environment-provided inputs 35 and outputs using _built-in_ decorations in the shader. 40 [[shader-modules]] 44 -- 49 The shader code defining a shader module must: be in the SPIR-V format, as 50 described by the <<spirvenv,Vulkan Environment for SPIR-V>> appendix. [all …]
/third_party/skia/m133/build/fuchsia/
D	update_fuchsia_sdk	4 # Use of this source code is governed by a BSD-style license that can be 10 Downloads both the Fuchsia SDK and Fuchsia-compatible clang 12 the arg-provide \|sdk_dir\| and \|clang_dir\| respectively. This 34 "https://commondatastorage.googleapis.com/chrome-infra-docs/flat" + \ 37 subprocess.call(["cipd", "--version"]) 46 pkg_suffix = pkg_name.replace('/', '-') + ".zip" 48 cipd_cmd = "cipd pkg-fetch " + pkg_name + " -version \"" + version + "\" -out " + \ 49 zip_file.name + " -cache-dir " + cipd_cache_dir 50 unzip_cmd = "unzip -q " + zip_file.name + " -d " + output_dir 57 parser.add_argument("-sdk_dir", type=str, [all …]
/third_party/skia/build/fuchsia/
D	update_fuchsia_sdk	4 # Use of this source code is governed by a BSD-style license that can be 10 Downloads both the Fuchsia SDK and Fuchsia-compatible clang 12 the arg-provide \|sdk_dir\| and \|clang_dir\| respectively. This 34 "https://commondatastorage.googleapis.com/chrome-infra-docs/flat" + \ 37 subprocess.call(["cipd", "--version"]) 46 pkg_suffix = pkg_name.replace('/', '-') + ".zip" 48 cipd_cmd = "cipd pkg-fetch " + pkg_name + " -version \"" + version + "\" -out " + \ 49 zip_file.name + " -cache-dir " + cipd_cache_dir 50 unzip_cmd = "unzip -q " + zip_file.name + " -d " + output_dir 57 parser.add_argument("-sdk_dir", type=str, [all …]
/third_party/vk-gl-cts/framework/referencerenderer/
D	design.txt	`2 ------------------------------- 5 - must support arbitrary VA arrays 6 - must support primitive setup reference 7 - must support lines, points 8 - must support instancing 9 - must support vertex shading -> custom position transformations 10 - flat, noperspective shading 11 - multiple render targets 12 - faster shading? move packet loop inside shader 14 - can be extended for tessellation and geometry shading [all …]`
/third_party/ffmpeg/libavcodec/
D	dsd_tablegen.h	20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA 36 * Properties of this 96-tap lowpass filter when applied on a signal 41 * () flat response up to 48 kHz 44 * spectrum below 70 kHz is practically alias-free. 49 * should fit into a modern processor's fast cache. 53 * The 2nd half (48 coeffs) of a 96-tap symmetric lowpass filter 59 0.003883043418804416, -0.003284703416210726, -0.008080250212687497, 60 -0.01067241812471033, -0.01139427235000863, -0.0106813877974587, 61 -0.009007905078766049, -0.006828859761015335, -0.004535184322001496, 62 -0.002425035959059578, -0.0006922187080790708, 0.0005700762133516592, [all …]
/third_party/mesa3d/src/amd/compiler/tests/
D	test_assembler.cpp	`4 * SPDX-License-Identifier: MIT 6 #include <llvm/Config/llvm-config.h> 29 //~gfx[6-7]>> c7800000 30 //~gfx[6-7]! bf810000 31 //~gfx[8-9]>> s_memtime s[0:1] ; c0900000 00000000 51 bld.reset(program->create_and_insert_block()); 53 program->blocks[1].linear_preds.push_back(0u); 66 bld.reset(program->create_and_insert_block()); 80 bld.reset(program->create_and_insert_block()); 82 program->blocks[2].linear_preds.push_back(0u); [all …]`
/third_party/skia/third_party/externals/spirv-tools/tools/sva/
D	yarn.lock	5 "@babel/code-frame@^7.0.0": 7 …resolved "https://registry.yarnpkg.com/@babel/code-frame/-/code-frame-7.5.5.tgz#bc0782f6d69f7b7d49… 8 …integrity sha512-27d4lZoomVyo51VegxI20xZPuSHusqbQag/ztrBC7wegWoQ1nLREPVSKSW8byhTlzTKyNE4ifaTA6lCp7… 14 …resolved "https://registry.yarnpkg.com/@babel/highlight/-/highlight-7.5.0.tgz#56d11312bd9248fa6195… 15 …integrity sha512-7dV4eu9gBxoM0dAnj/BCFDW9LFU0zvTrkq0ugM7pnHEgguOEeOz1so2ZghEdzviYzQEED0r4EAgpsBChK… 19 js-tokens "^4.0.0" 23 …resolved "https://registry.yarnpkg.com/@types/estree/-/estree-0.0.39.tgz#e177e699ee1b8c22d23174caa… 24 …integrity sha512-EYNwp3bU+98cpU4lAWYYL7Zz+2gryWH1qbdDTidVd6hkiR6weksdbMadyXKXNPEkQFhXM+hVO9ZygomHX… 28 …resolved "https://registry.yarnpkg.com/@types/node/-/node-12.7.5.tgz#e19436e7f8e9b4601005d73673b6d… 29 …integrity sha512-9fq4jZVhPNW8r+UYKnxF1e2HkDWOWKM5bC2/7c9wPV835I0aOrVbS/Hw/pWPk2uKrNXQqg9Z959Kz+IYD… [all …]
/third_party/skia/third_party/externals/swiftshader/third_party/SPIRV-Tools/tools/sva/
D	yarn.lock	5 "@babel/code-frame@^7.0.0": 7 …resolved "https://registry.yarnpkg.com/@babel/code-frame/-/code-frame-7.5.5.tgz#bc0782f6d69f7b7d49… 8 …integrity sha512-27d4lZoomVyo51VegxI20xZPuSHusqbQag/ztrBC7wegWoQ1nLREPVSKSW8byhTlzTKyNE4ifaTA6lCp7… 14 …resolved "https://registry.yarnpkg.com/@babel/highlight/-/highlight-7.5.0.tgz#56d11312bd9248fa6195… 15 …integrity sha512-7dV4eu9gBxoM0dAnj/BCFDW9LFU0zvTrkq0ugM7pnHEgguOEeOz1so2ZghEdzviYzQEED0r4EAgpsBChK… 19 js-tokens "^4.0.0" 23 …resolved "https://registry.yarnpkg.com/@types/estree/-/estree-0.0.39.tgz#e177e699ee1b8c22d23174caa… 24 …integrity sha512-EYNwp3bU+98cpU4lAWYYL7Zz+2gryWH1qbdDTidVd6hkiR6weksdbMadyXKXNPEkQFhXM+hVO9ZygomHX… 28 …resolved "https://registry.yarnpkg.com/@types/node/-/node-12.7.5.tgz#e19436e7f8e9b4601005d73673b6d… 29 …integrity sha512-9fq4jZVhPNW8r+UYKnxF1e2HkDWOWKM5bC2/7c9wPV835I0aOrVbS/Hw/pWPk2uKrNXQqg9Z959Kz+IYD… [all …]
/third_party/mesa3d/src/gallium/drivers/etnaviv/
D	etnaviv_shader.h	`2 * Copyright (c) 2012-2015 Etnaviv Project 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 58 /* color varyings should be flat shaded / 73 / slow-path if we need to check tex_{swizzle,compare_func} / in etna_shader_key_equal() 74 if (unlikely(a->has_sample_tex_compare \|\| b->has_sample_tex_compare)) in etna_shader_key_equal() 77 return a->global == b->global; in etna_shader_key_equal() 92 cache_key cache_key; / shader disk-cache key */`

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