Home
last modified time | relevance | path

Searched +full:freq +full:- +full:table +full:- +full:hz (Results 1 – 25 of 382) sorted by relevance

12345678910>>...16

/kernel/linux/linux-6.6/Documentation/devicetree/bindings/ufs/
Dufs-common.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/ufs/ufs-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alim Akhtar <alim.akhtar@samsung.com>
11 - Avri Altman <avri.altman@wdc.com>
16 clock-names: true
18 freq-table-hz:
21 - description: Minimum frequency for given clock in Hz
22 - description: Maximum frequency for given clock in Hz
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/ufs/
Dcdns,ufshc.txt3 UFS nodes are defined to describe on-chip UFS host controllers.
5 Please see the ufshcd-pltfrm.txt for a list of all available properties.
8 - compatible : Compatible list, contains one of the following controllers:
9 "cdns,ufshc" - Generic CDNS HCI,
10 "cdns,ufshc-m31-16nm" - CDNS UFS HC + M31 16nm PHY
12 "jedec,ufs-2.0"
14 - reg : Address and length of the UFS register set.
15 - interrupts : One interrupt mapping.
16 - freq-table-hz : Clock frequency table.
17 See the ufshcd-pltfrm.txt for details.
[all …]
Dufs-mediatek.txt3 UFS nodes are defined to describe on-chip UFS hardware macro.
7 contain a phandle reference to UFS M-PHY node.
10 - compatible : Compatible list, contains the following controller:
11 "mediatek,mt8183-ufshci" for MediaTek UFS host controller
13 "mediatek,mt8192-ufshci" for MediaTek UFS host controller
15 - reg : Address and length of the UFS register set.
16 - phys : phandle to m-phy.
17 - clocks : List of phandle and clock specifier pairs.
18 - clock-names : List of clock input name strings sorted in the same
21 - freq-table-hz : Array of <min max> operating frequencies stored in the same
[all …]
Dufs-hisi.txt3 UFS nodes are defined to describe on-chip UFS hardware macro.
7 - compatible : compatible list, contains one of the following -
8 "hisilicon,hi3660-ufs", "jedec,ufs-1.1" for hisi ufs
10 "hisilicon,hi3670-ufs", "jedec,ufs-2.1" for hisi ufs
12 - reg : should contain UFS register address space & UFS SYS CTRL register address,
13 - interrupts : interrupt number
14 - clocks : List of phandle and clock specifier pairs
15 - clock-names : List of clock input name strings sorted in the same
17 - freq-table-hz : Array of <min max> operating frequencies stored in the same
22 - resets : describe reset node register
[all …]
Dufshcd-pltfrm.txt3 UFSHC nodes are defined to describe on-chip UFS host controllers.
7 - compatible : must contain "jedec,ufs-1.1" or "jedec,ufs-2.0"
10 SoC-specific compatible along with "qcom,ufshc" and
12 "qcom,msm8994-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
13 "qcom,msm8996-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
14 "qcom,msm8998-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
15 "qcom,sdm845-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
16 "qcom,sm8150-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
17 - interrupts : <interrupt mapping for UFS host controller IRQ>
18 - reg : <registers mapping>
[all …]
/kernel/linux/linux-6.6/drivers/ufs/host/
Dufshcd-pltfrm.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright (C) 2011-2013 Samsung India Software Operations
17 #include "ufshcd-pltfrm.h"
27 struct device *dev = hba->dev; in ufshcd_parse_clock_info()
28 struct device_node *np = dev->of_node; in ufshcd_parse_clock_info()
38 cnt = of_property_count_strings(np, "clock-names"); in ufshcd_parse_clock_info()
39 if (!cnt || (cnt == -EINVAL)) { in ufshcd_parse_clock_info()
51 if (!of_get_property(np, "freq-table-hz", &len)) { in ufshcd_parse_clock_info()
52 dev_info(dev, "freq-table-hz property not specified\n"); in ufshcd_parse_clock_info()
61 dev_err(dev, "%s len mismatch\n", "freq-table-hz"); in ufshcd_parse_clock_info()
[all …]
/kernel/linux/linux-5.10/drivers/thermal/
Ddevfreq_cooling.c1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright (C) 2014-2015 ARM Limited
9 * - If OPPs are added or removed after devfreq cooling has
30 * struct devfreq_cooling_device - Devfreq cooling device
36 * @power_table: Pointer to table with maximum power draw for each
37 * cooling state. State is the index into the table, and
39 * @freq_table: Pointer to a table with the frequencies sorted in descending
40 * order. You can index the table by cooling device state
71 struct devfreq_cooling_device *dfc = cdev->devdata; in devfreq_cooling_get_max_state()
73 *state = dfc->freq_table_size - 1; in devfreq_cooling_get_max_state()
[all …]
/kernel/linux/linux-5.10/drivers/scsi/ufs/
Dufshcd-pltfrm.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright (C) 2011-2013 Samsung India Software Operations
16 #include "ufshcd-pltfrm.h"
26 struct device *dev = hba->dev; in ufshcd_parse_clock_info()
27 struct device_node *np = dev->of_node; in ufshcd_parse_clock_info()
37 cnt = of_property_count_strings(np, "clock-names"); in ufshcd_parse_clock_info()
38 if (!cnt || (cnt == -EINVAL)) { in ufshcd_parse_clock_info()
50 if (!of_get_property(np, "freq-table-hz", &len)) { in ufshcd_parse_clock_info()
51 dev_info(dev, "freq-table-hz property not specified\n"); in ufshcd_parse_clock_info()
60 dev_err(dev, "%s len mismatch\n", "freq-table-hz"); in ufshcd_parse_clock_info()
[all …]
/kernel/linux/linux-6.6/drivers/opp/
Dof.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2009-2010 Texas Instruments Incorporated.
34 /* "operating-points-v2" can be an array for power domain providers */ in _opp_of_get_opp_desc_node()
35 return of_parse_phandle(np, "operating-points-v2", index); in _opp_of_get_opp_desc_node()
41 return _opp_of_get_opp_desc_node(dev->of_node, 0); in dev_pm_opp_of_get_opp_desc_node()
50 np = _opp_of_get_opp_desc_node(dev->of_node, index); in _managed_opp()
55 if (opp_table->np == np) { in _managed_opp()
57 * Multiple devices can point to the same OPP table and in _managed_opp()
58 * so will have same node-pointer, np. in _managed_opp()
61 * OPP table contains a "opp-shared" property. in _managed_opp()
[all …]
Dcore.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2009-2010 Texas Instruments Incorporated.
26 * The root of the list of all opp-tables. All opp_table structures branch off
45 mutex_lock(&opp_table->lock); in _find_opp_dev()
46 list_for_each_entry(opp_dev, &opp_table->dev_list, node) in _find_opp_dev()
47 if (opp_dev->dev == dev) { in _find_opp_dev()
52 mutex_unlock(&opp_table->lock); in _find_opp_dev()
67 return ERR_PTR(-ENODEV); in _find_opp_table_unlocked()
71 * _find_opp_table() - find opp_table struct using device pointer
72 * @dev: device pointer used to lookup OPP table
[all …]
/kernel/linux/linux-5.10/drivers/opp/
Dti-opp-supply.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/
5 * Dave Gerlach <d-gerlach@ti.com>
25 * struct ti_opp_supply_optimum_voltage_table - optimized voltage table
35 * struct ti_opp_supply_data - OMAP specific opp supply data
36 * @vdd_table: Optimized voltage mapping table
49 * struct ti_opp_supply_of_data - device tree match data
52 * @efuse_voltage_uv: Are the efuse entries in micro-volts? if not, assume
53 * milli-volts.
64 * _store_optimized_voltages() - store optimized voltages
[all …]
Dcore.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2009-2010 Texas Instruments Incorporated.
25 * The root of the list of all opp-tables. All opp_table structures branch off
38 list_for_each_entry(opp_dev, &opp_table->dev_list, node) in _find_opp_dev()
39 if (opp_dev->dev == dev) in _find_opp_dev()
51 mutex_lock(&opp_table->lock); in _find_opp_table_unlocked()
53 mutex_unlock(&opp_table->lock); in _find_opp_table_unlocked()
62 return ERR_PTR(-ENODEV); in _find_opp_table_unlocked()
66 * _find_opp_table() - find opp_table struct using device pointer
67 * @dev: device pointer used to lookup OPP table
[all …]
Dof.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2009-2010 Texas Instruments Incorporated.
31 /* "operating-points-v2" can be an array for power domain providers */ in _opp_of_get_opp_desc_node()
32 return of_parse_phandle(np, "operating-points-v2", index); in _opp_of_get_opp_desc_node()
38 return _opp_of_get_opp_desc_node(dev->of_node, 0); in dev_pm_opp_of_get_opp_desc_node()
47 np = _opp_of_get_opp_desc_node(dev->of_node, index); in _managed_opp()
52 if (opp_table->np == np) { in _managed_opp()
54 * Multiple devices can point to the same OPP table and in _managed_opp()
55 * so will have same node-pointer, np. in _managed_opp()
58 * OPP table contains a "opp-shared" property. in _managed_opp()
[all …]
/kernel/linux/linux-6.6/drivers/cpufreq/
Dsh-cpufreq.c4 * Copyright (C) 2002 - 2012 Paul Mundt
7 * Clock framework bits from arch/avr32/mach-at32ap/cpufreq.c
9 * Copyright (C) 2004-2007 Atmel Corporation
34 unsigned int freq; member
45 struct cpufreq_policy *policy = target->policy; in __sh_cpufreq_target()
46 int cpu = policy->cpu; in __sh_cpufreq_target()
50 long freq; in __sh_cpufreq_target() local
53 return -ENODEV; in __sh_cpufreq_target()
57 /* Convert target_freq from kHz to Hz */ in __sh_cpufreq_target()
58 freq = clk_round_rate(cpuclk, target->freq * 1000); in __sh_cpufreq_target()
[all …]
Dscmi-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2018-2021 ARM Ltd.
11 #include <linux/clk-provider.h>
45 priv = policy->driver_data; in scmi_cpufreq_get_rate()
47 ret = perf_ops->freq_get(ph, priv->domain_id, &rate, false); in scmi_cpufreq_get_rate()
54 * perf_ops->freq_set is not a synchronous, the actual OPP change will
61 struct scmi_data *priv = policy->driver_data; in scmi_cpufreq_set_target()
62 u64 freq = policy->freq_table[index].frequency; in scmi_cpufreq_set_target() local
64 return perf_ops->freq_set(ph, priv->domain_id, freq * 1000, false); in scmi_cpufreq_set_target()
70 struct scmi_data *priv = policy->driver_data; in scmi_cpufreq_fast_switch()
[all …]
Dimx6q-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/nvmem-consumer.h>
81 dev_dbg(cpu_dev, "%u MHz, %ld mV --> %u MHz, %ld mV\n", in imx6q_set_target()
114 * - Enable pll2_pfd2_396m_clk and reparent pll1_sw_clk to it in imx6q_set_target()
115 * - Reprogram pll1_sys_clk and reparent pll1_sw_clk back to it in imx6q_set_target()
116 * - Disable pll2_pfd2_396m_clk in imx6q_set_target()
167 /* PLL1 is only needed until after ARM-PODF is set. */ in imx6q_set_target()
192 policy->clk = clks[ARM].clk; in imx6q_cpufreq_init()
194 policy->suspend_freq = max_freq; in imx6q_cpufreq_init()
207 .name = "imx6q-cpufreq",
[all …]
/kernel/linux/linux-5.10/drivers/cpufreq/
Dsh-cpufreq.c4 * Copyright (C) 2002 - 2012 Paul Mundt
7 * Clock framework bits from arch/avr32/mach-at32ap/cpufreq.c
9 * Copyright (C) 2004-2007 Atmel Corporation
35 unsigned int freq; member
46 struct cpufreq_policy *policy = target->policy; in __sh_cpufreq_target()
47 int cpu = policy->cpu; in __sh_cpufreq_target()
51 long freq; in __sh_cpufreq_target() local
54 return -ENODEV; in __sh_cpufreq_target()
58 /* Convert target_freq from kHz to Hz */ in __sh_cpufreq_target()
59 freq = clk_round_rate(cpuclk, target->freq * 1000); in __sh_cpufreq_target()
[all …]
Ds3c24xx-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2006-2008 Simtec Electronics
24 #include <linux/soc/samsung/s3c-cpufreq-core.h>
25 #include <linux/soc/samsung/s3c-pm.h>
30 /* note, cpufreq support deals in kHz, no Hz */
62 cfg->freq.fclk = fclk = clk_get_rate(clk_fclk); in s3c_cpufreq_getcur()
63 cfg->freq.hclk = hclk = clk_get_rate(clk_hclk); in s3c_cpufreq_getcur()
64 cfg->freq.pclk = pclk = clk_get_rate(clk_pclk); in s3c_cpufreq_getcur()
65 cfg->freq.armclk = armclk = clk_get_rate(clk_arm); in s3c_cpufreq_getcur()
67 cfg->pll.driver_data = s3c24xx_read_mpllcon(); in s3c_cpufreq_getcur()
[all …]
Dimx6q-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/nvmem-consumer.h>
81 dev_dbg(cpu_dev, "%u MHz, %ld mV --> %u MHz, %ld mV\n", in imx6q_set_target()
114 * - Enable pll2_pfd2_396m_clk and reparent pll1_sw_clk to it in imx6q_set_target()
115 * - Reprogram pll1_sys_clk and reparent pll1_sw_clk back to it in imx6q_set_target()
116 * - Disable pll2_pfd2_396m_clk in imx6q_set_target()
167 /* PLL1 is only needed until after ARM-PODF is set. */ in imx6q_set_target()
192 policy->clk = clks[ARM].clk; in imx6q_cpufreq_init()
194 policy->suspend_freq = max_freq; in imx6q_cpufreq_init()
195 dev_pm_opp_of_register_em(cpu_dev, policy->cpus); in imx6q_cpufreq_init()
[all …]
/kernel/linux/linux-5.10/net/ipv6/
Dip6_flowlabel.c1 // SPDX-License-Identifier: GPL-2.0-or-later
36 /* FL hash table */
49 /* FL hash table lock: it protects only of GC */
57 DEFINE_STATIC_KEY_DEFERRED_FALSE(ipv6_flowlabel_exclusive, HZ);
63 fl = rcu_dereference_bh(fl->next))
65 for (fl = rcu_dereference_bh(fl->next); \
67 fl = rcu_dereference_bh(fl->next))
70 for (sfl = rcu_dereference_bh(np->ipv6_fl_list); \
72 sfl = rcu_dereference_bh(sfl->next))
79 if (fl->label == label && net_eq(fl->fl_net, net)) in __fl_lookup()
[all …]
/kernel/linux/linux-6.6/net/ipv6/
Dip6_flowlabel.c1 // SPDX-License-Identifier: GPL-2.0-or-later
36 /* FL hash table */
49 /* FL hash table lock: it protects only of GC */
57 DEFINE_STATIC_KEY_DEFERRED_FALSE(ipv6_flowlabel_exclusive, HZ);
63 fl = rcu_dereference(fl->next))
65 for (fl = rcu_dereference(fl->next); \
67 fl = rcu_dereference(fl->next))
70 for (sfl = rcu_dereference(np->ipv6_fl_list); \
72 sfl = rcu_dereference(sfl->next))
79 if (fl->label == label && net_eq(fl->fl_net, net)) in __fl_lookup()
[all …]
/kernel/linux/linux-5.10/drivers/media/dvb-frontends/
Dstv0900_priv.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
45 /* One point of the lookup table */
51 /* Lookup table definition */
53 s32 size;/* Size of the lookup table */
54 struct stv000_lookpoint table[STV0900_MAXLOOKUPSIZE];/* Lookup table */ member
126 STV0900_BLIND_SEARCH,/* offset freq and SR are Unknown */
128 STV0900_WARM_START/* offset freq and SR are known */
226 u32 dmd_ref_clk;/* Reference,Input clock for the demod in Hz */
255 u32 search_range;/* Range of the search (in Hz) */
295 s32 freq[2]; member
/kernel/linux/linux-6.6/drivers/media/dvb-frontends/
Dstv0900_priv.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
45 /* One point of the lookup table */
51 /* Lookup table definition */
53 s32 size;/* Size of the lookup table */
54 struct stv000_lookpoint table[STV0900_MAXLOOKUPSIZE];/* Lookup table */ member
126 STV0900_BLIND_SEARCH,/* offset freq and SR are Unknown */
128 STV0900_WARM_START/* offset freq and SR are known */
226 u32 dmd_ref_clk;/* Reference,Input clock for the demod in Hz */
255 u32 search_range;/* Range of the search (in Hz) */
295 s32 freq[2]; member
/kernel/linux/linux-6.6/arch/arm/include/asm/
Ddelay.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 1995-2004 Russell King
5 * Delay routines, using a pre-computed "loops_per_second" value.
11 #include <asm/param.h> /* HZ */
20 * jiffies_per_sec = HZ
23 * Therefore the constant part is HZ / 1000000 which is a small
32 * UDELAY_MULT = 2^31 * HZ / 1000000
33 * = (2^31 / 1000000) * HZ
34 * = 2147.483648 * HZ
35 * = 2147 * HZ + 483648 * HZ / 1000000
[all …]
/kernel/linux/linux-5.10/arch/arm/include/asm/
Ddelay.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 1995-2004 Russell King
5 * Delay routines, using a pre-computed "loops_per_second" value.
11 #include <asm/param.h> /* HZ */
20 * jiffies_per_sec = HZ
23 * Therefore the constant part is HZ / 1000000 which is a small
32 * UDELAY_MULT = 2^31 * HZ / 1000000
33 * = (2^31 / 1000000) * HZ
34 * = 2147.483648 * HZ
35 * = 2147 * HZ + 483648 * HZ / 1000000
[all …]

12345678910>>...16