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Searched +full:fu540 +full:- +full:c000 +full:- +full:gpio (Results 1 – 15 of 15) sorted by relevance

/kernel/linux/linux-5.10/arch/riscv/boot/dts/sifive/
Dfu540-c000.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2018-2019 SiFive, Inc */
4 /dts-v1/;
6 #include <dt-bindings/clock/sifive-fu540-prci.h>
9 #address-cells = <2>;
10 #size-cells = <2>;
11 compatible = "sifive,fu540-c000", "sifive,fu540";
23 #address-cells = <1>;
24 #size-cells = <0>;
28 i-cache-block-size = <64>;
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Dhifive-unleashed-a00.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2018-2019 SiFive, Inc */
4 #include "fu540-c000.dtsi"
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/pwm/pwm.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
16 compatible = "sifive,hifive-unleashed-a00", "sifive,fu540-c000";
19 stdout-path = "serial0";
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/kernel/linux/linux-6.6/arch/riscv/boot/dts/sifive/
Dfu540-c000.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2018-2019 SiFive, Inc */
4 /dts-v1/;
6 #include <dt-bindings/clock/sifive-fu540-prci.h>
9 #address-cells = <2>;
10 #size-cells = <2>;
11 compatible = "sifive,fu540-c000", "sifive,fu540";
23 #address-cells = <1>;
24 #size-cells = <0>;
28 i-cache-block-size = <64>;
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Dhifive-unleashed-a00.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2018-2019 SiFive, Inc */
4 #include "fu540-c000.dtsi"
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/pwm/pwm.h>
14 compatible = "sifive,hifive-unleashed-a00", "sifive,fu540-c000",
15 "sifive,fu540";
18 stdout-path = "serial0";
22 timebase-frequency = <RTCCLK_FREQ>;
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Dfu740-c000.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 /dts-v1/;
6 #include <dt-bindings/clock/sifive-fu740-prci.h>
9 #address-cells = <2>;
10 #size-cells = <2>;
11 compatible = "sifive,fu740-c000", "sifive,fu740";
23 #address-cells = <1>;
24 #size-cells = <0>;
28 i-cache-block-size = <64>;
29 i-cache-sets = <128>;
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/gpio/
Dsifive,gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/sifive,gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SiFive GPIO controller
10 - Paul Walmsley <paul.walmsley@sifive.com>
15 - enum:
16 - sifive,fu540-c000-gpio
17 - sifive,fu740-c000-gpio
18 - canaan,k210-gpiohs
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/gpio/
Dsifive,gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/sifive,gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SiFive GPIO controller
10 - Yash Shah <yash.shah@sifive.com>
11 - Paul Walmsley <paul.walmsley@sifive.com>
16 - const: sifive,fu540-c000-gpio
17 - const: sifive,gpio0
24 interrupt mapping one per GPIO. Maximum 16 GPIOs.
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/
Dmacb.txt4 - compatible: Should be "cdns,[<chip>-]{macb|gem}"
5 Use "cdns,at91rm9200-emac" Atmel at91rm9200 SoC.
6 Use "cdns,at91sam9260-macb" for Atmel at91sam9 SoCs.
7 Use "cdns,sam9x60-macb" for Microchip sam9x60 SoC.
8 Use "cdns,np4-macb" for NP4 SoC devices.
9 Use "cdns,at32ap7000-macb" for other 10/100 usage or use the generic form: "cdns,macb".
10 Use "cdns,pc302-gem" for Picochip picoXcell pc302 and later devices based on
12 Use "atmel,sama5d2-gem" for the GEM IP (10/100) available on Atmel sama5d2 SoCs.
13 Use "atmel,sama5d3-macb" for the 10/100Mbit IP available on Atmel sama5d3 SoCs.
14 Use "atmel,sama5d3-gem" for the Gigabit IP available on Atmel sama5d3 SoCs.
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/kernel/linux/linux-6.6/arch/riscv/boot/dts/microchip/
Dmpfs.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2020-2021 Microchip Technology Inc */
4 /dts-v1/;
5 #include "dt-bindings/clock/microchip,mpfs-clock.h"
8 #address-cells = <2>;
9 #size-cells = <2>;
14 #address-cells = <1>;
15 #size-cells = <0>;
20 i-cache-block-size = <64>;
21 i-cache-sets = <128>;
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/kernel/linux/linux-5.10/drivers/gpio/
Dgpio-sifive.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/gpio/driver.h>
48 spin_lock_irqsave(&chip->gc.bgpio_lock, flags); in sifive_gpio_set_ie()
49 trigger = (chip->irq_state & BIT(offset)) ? chip->trigger[offset] : 0; in sifive_gpio_set_ie()
50 regmap_update_bits(chip->regs, SIFIVE_GPIO_RISE_IE, BIT(offset), in sifive_gpio_set_ie()
52 regmap_update_bits(chip->regs, SIFIVE_GPIO_FALL_IE, BIT(offset), in sifive_gpio_set_ie()
54 regmap_update_bits(chip->regs, SIFIVE_GPIO_HIGH_IE, BIT(offset), in sifive_gpio_set_ie()
56 regmap_update_bits(chip->regs, SIFIVE_GPIO_LOW_IE, BIT(offset), in sifive_gpio_set_ie()
58 spin_unlock_irqrestore(&chip->gc.bgpio_lock, flags); in sifive_gpio_set_ie()
67 if (offset < 0 || offset >= gc->ngpio) in sifive_gpio_irq_set_type()
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/kernel/linux/linux-6.6/drivers/gpio/
Dgpio-sifive.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/gpio/driver.h>
47 raw_spin_lock_irqsave(&chip->gc.bgpio_lock, flags); in sifive_gpio_set_ie()
48 trigger = (chip->irq_state & BIT(offset)) ? chip->trigger[offset] : 0; in sifive_gpio_set_ie()
49 regmap_update_bits(chip->regs, SIFIVE_GPIO_RISE_IE, BIT(offset), in sifive_gpio_set_ie()
51 regmap_update_bits(chip->regs, SIFIVE_GPIO_FALL_IE, BIT(offset), in sifive_gpio_set_ie()
53 regmap_update_bits(chip->regs, SIFIVE_GPIO_HIGH_IE, BIT(offset), in sifive_gpio_set_ie()
55 regmap_update_bits(chip->regs, SIFIVE_GPIO_LOW_IE, BIT(offset), in sifive_gpio_set_ie()
57 raw_spin_unlock_irqrestore(&chip->gc.bgpio_lock, flags); in sifive_gpio_set_ie()
66 if (offset < 0 || offset >= gc->ngpio) in sifive_gpio_irq_set_type()
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/kernel/linux/linux-5.10/
DMAINTAINERS9 -------------------------
30 ``diff -u`` to make the patch easy to merge. Be prepared to get your
40 See Documentation/process/coding-style.rst for guidance here.
46 See Documentation/process/submitting-patches.rst for details.
57 include a Signed-off-by: line. The current version of this
59 Documentation/process/submitting-patches.rst.
70 that the bug would present a short-term risk to other users if it
76 Documentation/admin-guide/security-bugs.rst for details.
81 ---------------------------------------------------
97 W: *Web-page* with status/info
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/kernel/linux/linux-6.6/
DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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/kernel/linux/linux-5.10/drivers/net/ethernet/cadence/
Dmacb_main.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2004-2006 Atmel Corporation
10 #include <linux/clk-provider.h>
20 #include <linux/gpio.h>
21 #include <linux/gpio/consumer.h>
25 #include <linux/dma-mapping.h>
40 /* This structure is only used for MACB on SiFive FU540 devices */
54 * (bp)->rx_ring_size)
60 * (bp)->tx_ring_size)
63 #define MACB_TX_WAKEUP_THRESH(bp) (3 * (bp)->tx_ring_size / 4)
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/kernel/linux/linux-6.6/drivers/net/ethernet/cadence/
Dmacb_main.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2004-2006 Atmel Corporation
10 #include <linux/clk-provider.h>
20 #include <linux/gpio.h>
21 #include <linux/gpio/consumer.h>
25 #include <linux/dma-mapping.h>
40 #include <linux/firmware/xlnx-zynqmp.h>
43 /* This structure is only used for MACB on SiFive FU540 devices */
57 * (bp)->rx_ring_size)
63 * (bp)->tx_ring_size)
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