| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| D | amdgpu_dm_color.c | 38 * - Input gamma LUT (de-normalized)
39 * - Input CSC (normalized)
40 * - Surface degamma LUT (normalized)
41 * - Surface CSC (normalized)
42 * - Surface regamma LUT (normalized)
43 * - Output CSC (normalized)
49 * Plane CTM -> Plane degamma -> Plane CTM -> Plane regamma -> Plane CTM
51 * The input gamma LUT block isn't really applicable here since it operates
59 * support any CRTC props with correct blending with multiple planes - but we
64 * respective property is set to NULL. A linear DGM/RGM LUT should also
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| D | amdgpu_dm_color.c | 36 * - Input gamma LUT (de-normalized)
37 * - Input CSC (normalized)
38 * - Surface degamma LUT (normalized)
39 * - Surface CSC (normalized)
40 * - Surface regamma LUT (normalized)
41 * - Output CSC (normalized)
47 * Plane CTM -> Plane degamma -> Plane CTM -> Plane regamma -> Plane CTM
49 * The input gamma LUT block isn't really applicable here since it operates
57 * support any CRTC props with correct blending with multiple planes - but we
62 * respective property is set to NULL. A linear DGM/RGM LUT should also
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/mediatek/ |
| D | mtk_disp_gamma.c | 1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/soc/mediatek/mtk-cmdq.h>
34 * struct mtk_disp_gamma - DISP_GAMMA driver structure
45 struct mtk_disp_gamma *gamma = dev_get_drvdata(dev); in mtk_gamma_clk_enable() local
47 return clk_prepare_enable(gamma->clk); in mtk_gamma_clk_enable()
52 struct mtk_disp_gamma *gamma = dev_get_drvdata(dev); in mtk_gamma_clk_disable() local
54 clk_disable_unprepare(gamma->clk); in mtk_gamma_clk_disable()
60 struct drm_color_lut *lut; in mtk_gamma_set_common() local
65 if (state->gamma_lut) { in mtk_gamma_set_common()
70 lut = (struct drm_color_lut *)state->gamma_lut->data; in mtk_gamma_set_common()
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/ |
| D | drm_color_mgmt.c | 41 * Blob property to set the degamma lookup table (LUT) mapping pixel data
44 * Hardware might choose not to use the full precision of the LUT elements
45 * nor use all the elements of the LUT (for example the hardware might
46 * choose to interpolate between LUT[0] and LUT[4]).
49 * linear/pass-thru gamma table should be used. This is generally the
50 * driver boot-up state too. Drivers can access this blob through
56 * hardware). If drivers support multiple LUT sizes then they should
57 * publish the largest size, and sub-sample smaller sized LUTs (e.g. for
58 * split-gamma modes) appropriately.
62 * pixel data after the lookup through the degamma LUT and before the
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/ |
| D | drm_color_mgmt.c | 42 * Blob property to set the degamma lookup table (LUT) mapping pixel data
45 * Hardware might choose not to use the full precision of the LUT elements
46 * nor use all the elements of the LUT (for example the hardware might
47 * choose to interpolate between LUT[0] and LUT[4]).
50 * linear/pass-thru gamma table should be used. This is generally the
51 * driver boot-up state too. Drivers can access this blob through
57 * hardware). If drivers support multiple LUT sizes then they should
58 * publish the largest size, and sub-sample smaller sized LUTs (e.g. for
59 * split-gamma modes) appropriately.
63 * pixel data after the lookup through the degamma LUT and before the
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/core/ |
| D | dc_surface.c | 40 plane_state->ctx = ctx; in dc_plane_construct()
42 plane_state->gamma_correction = dc_create_gamma(); in dc_plane_construct()
43 if (plane_state->gamma_correction != NULL) in dc_plane_construct()
44 plane_state->gamma_correction->is_identity = true; in dc_plane_construct()
46 plane_state->in_transfer_func = dc_create_transfer_func(); in dc_plane_construct()
47 if (plane_state->in_transfer_func != NULL) { in dc_plane_construct()
48 plane_state->in_transfer_func->type = TF_TYPE_BYPASS; in dc_plane_construct()
50 plane_state->in_shaper_func = dc_create_transfer_func(); in dc_plane_construct()
51 if (plane_state->in_shaper_func != NULL) { in dc_plane_construct()
52 plane_state->in_shaper_func->type = TF_TYPE_BYPASS; in dc_plane_construct()
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/core/ |
| D | dc_surface.c | 42 plane_state->ctx = ctx; in dc_plane_construct()
44 plane_state->gamma_correction = dc_create_gamma(); in dc_plane_construct()
45 if (plane_state->gamma_correction != NULL) in dc_plane_construct()
46 plane_state->gamma_correction->is_identity = true; in dc_plane_construct()
48 plane_state->in_transfer_func = dc_create_transfer_func(); in dc_plane_construct()
49 if (plane_state->in_transfer_func != NULL) { in dc_plane_construct()
50 plane_state->in_transfer_func->type = TF_TYPE_BYPASS; in dc_plane_construct()
52 plane_state->in_shaper_func = dc_create_transfer_func(); in dc_plane_construct()
53 if (plane_state->in_shaper_func != NULL) { in dc_plane_construct()
54 plane_state->in_shaper_func->type = TF_TYPE_BYPASS; in dc_plane_construct()
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_ipp.c | 33 (ipp_dce->regs->reg)
37 ipp_dce->ipp_shift->field_name, ipp_dce->ipp_mask->field_name
40 ipp_dce->base.ctx
55 REG_UPDATE(CUR_CONTROL, CURSOR_EN, position->enable); in dce_ipp_cursor_set_position()
58 CURSOR_X_POSITION, position->x, in dce_ipp_cursor_set_position()
59 CURSOR_Y_POSITION, position->y); in dce_ipp_cursor_set_position()
62 CURSOR_HOT_SPOT_X, position->x_hotspot, in dce_ipp_cursor_set_position()
63 CURSOR_HOT_SPOT_Y, position->y_hotspot); in dce_ipp_cursor_set_position()
80 switch (attributes->color_format) { in dce_ipp_cursor_set_attributes()
100 CURSOR_2X_MAGNIFY, attributes->attribute_flags.bits.ENABLE_MAGNIFICATION, in dce_ipp_cursor_set_attributes()
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_ipp.c | 31 (ipp_dce->regs->reg)
35 ipp_dce->ipp_shift->field_name, ipp_dce->ipp_mask->field_name
38 ipp_dce->base.ctx
53 REG_UPDATE(CUR_CONTROL, CURSOR_EN, position->enable); in dce_ipp_cursor_set_position()
56 CURSOR_X_POSITION, position->x, in dce_ipp_cursor_set_position()
57 CURSOR_Y_POSITION, position->y); in dce_ipp_cursor_set_position()
60 CURSOR_HOT_SPOT_X, position->x_hotspot, in dce_ipp_cursor_set_position()
61 CURSOR_HOT_SPOT_Y, position->y_hotspot); in dce_ipp_cursor_set_position()
78 switch (attributes->color_format) { in dce_ipp_cursor_set_attributes()
98 CURSOR_2X_MAGNIFY, attributes->attribute_flags.bits.ENABLE_MAGNIFICATION, in dce_ipp_cursor_set_attributes()
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_dpp_cm.c | 43 dpp->tf_regs->reg
46 dpp->base.ctx
50 dpp->tf_shift->field_name, dpp->tf_mask->field_name
118 gam_regs.shifts.csc_c11 = dpp->tf_shift->CM_GAMUT_REMAP_C11; in program_gamut_remap()
119 gam_regs.masks.csc_c11 = dpp->tf_mask->CM_GAMUT_REMAP_C11; in program_gamut_remap()
120 gam_regs.shifts.csc_c12 = dpp->tf_shift->CM_GAMUT_REMAP_C12; in program_gamut_remap()
121 gam_regs.masks.csc_c12 = dpp->tf_mask->CM_GAMUT_REMAP_C12; in program_gamut_remap()
129 dpp->base.ctx, in program_gamut_remap()
139 dpp->base.ctx, in program_gamut_remap()
149 dpp->base.ctx, in program_gamut_remap()
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_dpp_cm.c | 43 dpp->tf_regs->reg
46 dpp->base.ctx
50 dpp->tf_shift->field_name, dpp->tf_mask->field_name
118 gam_regs.shifts.csc_c11 = dpp->tf_shift->CM_GAMUT_REMAP_C11; in program_gamut_remap()
119 gam_regs.masks.csc_c11 = dpp->tf_mask->CM_GAMUT_REMAP_C11; in program_gamut_remap()
120 gam_regs.shifts.csc_c12 = dpp->tf_shift->CM_GAMUT_REMAP_C12; in program_gamut_remap()
121 gam_regs.masks.csc_c12 = dpp->tf_mask->CM_GAMUT_REMAP_C12; in program_gamut_remap()
129 dpp->base.ctx, in program_gamut_remap()
139 dpp->base.ctx, in program_gamut_remap()
149 dpp->base.ctx, in program_gamut_remap()
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/rockchip/ |
| D | rockchip-vop2.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip-vop2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Sandy Huang <hjc@rock-chips.com>
16 - Heiko Stuebner <heiko@sntech.de>
21 - rockchip,rk3566-vop
22 - rockchip,rk3568-vop
26 - description:
29 - description:
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/ |
| D | intel_color.c | 38 #define CTM_COEFF_LIMITED_RANGE ((235ULL - 16ULL) * CTM_COEFF_1_0 / 255)
41 #define CTM_COEFF_ABS(coeff) ((coeff) & (CTM_COEFF_SIGN - 1))
54 * CSC_MODE_YUV_TO_RGB=0 + CSC_BLACK_SCREEN_OFFSET=0 -> 1/2, 0, 1/2
55 * CSC_MODE_YUV_TO_RGB=0 + CSC_BLACK_SCREEN_OFFSET=1 -> 1/2, 1/16, 1/2
56 * CSC_MODE_YUV_TO_RGB=1 + CSC_BLACK_SCREEN_OFFSET=0 -> 0, 0, 0
57 * CSC_MODE_YUV_TO_RGB=1 + CSC_BLACK_SCREEN_OFFSET=1 -> 1/16, 1/16, 1/16
70 (clamp_val(((coeff) >> (32 - (fbits) - 3)) + 4, 0, 0xfff) & 0xff8)
94 /* Full range RGB -> limited range RGB matrix */
101 /* BT.709 full range RGB -> limited range YCbCr matrix */
113 static bool lut_is_legacy(const struct drm_property_blob *lut) in lut_is_legacy() argument
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/ci/xfails/ |
| D | mediatek-mt8173-fails.txt | 2 kms_addfb_basic@addfb25-bad-modifier,Fail
3 kms_bw@linear-tiling-1-displays-1920x1080p,Fail
4 kms_bw@linear-tiling-1-displays-2560x1440p,Fail
5 kms_bw@linear-tiling-1-displays-3840x2160p,Fail
6 kms_bw@linear-tiling-2-displays-1920x1080p,Fail
7 kms_bw@linear-tiling-2-displays-2560x1440p,Fail
8 kms_bw@linear-tiling-2-displays-3840x2160p,Fail
9 kms_bw@linear-tiling-3-displays-1920x1080p,Fail
10 kms_bw@linear-tiling-3-displays-2560x1440p,Fail
11 kms_bw@linear-tiling-3-displays-3840x2160p,Fail
[all …]
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| D | mediatek-mt8183-fails.txt | 1 kms_addfb_basic@addfb25-bad-modifier,Fail
2 kms_bw@linear-tiling-1-displays-2560x1440p,Fail
3 kms_bw@linear-tiling-2-displays-1920x1080p,Fail
4 kms_bw@linear-tiling-2-displays-2560x1440p,Fail
5 kms_bw@linear-tiling-2-displays-3840x2160p,Fail
6 kms_bw@linear-tiling-3-displays-2560x1440p,Fail
7 kms_bw@linear-tiling-3-displays-3840x2160p,Fail
8 kms_color@pipe-A-invalid-gamma-lut-sizes,Fail
9 kms_plane_scaling@upscale-with-rotation-20x20,Fail
10 kms_rmfb@close-fd,Fail
|
| /kernel/linux/linux-5.10/include/drm/ |
| D | drm_color_mgmt.h | 34 * drm_color_lut_extract - clamp and round LUT entries
36 * @bit_precision: number of bits the hw LUT supports
38 * Extract a degamma/gamma LUT value provided by user (in the form of
45 u32 max = 0xffff >> (16 - bit_precision); in drm_color_lut_extract()
49 val += 1UL << (16 - bit_precision - 1); in drm_color_lut_extract()
50 val >>= 16 - bit_precision; in drm_color_lut_extract()
67 * drm_color_lut_size - calculate the number of entries in the LUT
68 * @blob: blob containing the LUT
71 * The number of entries in the color LUT stored in @blob.
75 return blob->length / sizeof(struct drm_color_lut); in drm_color_lut_size()
[all …]
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| /kernel/linux/linux-6.6/include/drm/ |
| D | drm_color_mgmt.h | 34 * drm_color_lut_extract - clamp and round LUT entries
36 * @bit_precision: number of bits the hw LUT supports
38 * Extract a degamma/gamma LUT value provided by user (in the form of
45 u32 max = 0xffff >> (16 - bit_precision); in drm_color_lut_extract()
49 val += 1UL << (16 - bit_precision - 1); in drm_color_lut_extract()
50 val >>= 16 - bit_precision; in drm_color_lut_extract()
67 * drm_color_lut_size - calculate the number of entries in the LUT
68 * @blob: blob containing the LUT
71 * The number of entries in the color LUT stored in @blob.
75 return blob->length / sizeof(struct drm_color_lut); in drm_color_lut_size()
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/msm/disp/dpu1/ |
| D | dpu_hw_catalog.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
94 * SSPP sub-blocks/features
101 * @DPU_SSPP_CSC_10BIT, Support of 10-bit Color space conversion
104 * @DPU_SSPP_QOS_8LVL, SSPP support 8-level QoS control
134 * MIXER sub-blocks/features
136 * @DPU_MIXER_SOURCESPLIT Layer mixer supports source-split configuration
137 * @DPU_MIXER_GC Gamma correction block
150 * DSPP sub-blocks
152 * @DPU_DSPP_GC Gamma correction block
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/ |
| D | intel_color.c | 34 * Program non-arming double buffered color management registers
90 #define CTM_COEFF_LIMITED_RANGE ((235ULL - 16ULL) * CTM_COEFF_1_0 / 255)
93 #define CTM_COEFF_ABS(coeff) ((coeff) & (CTM_COEFF_SIGN - 1))
106 * CSC_MODE_YUV_TO_RGB=0 + CSC_BLACK_SCREEN_OFFSET=0 -> 1/2, 0, 1/2
107 * CSC_MODE_YUV_TO_RGB=0 + CSC_BLACK_SCREEN_OFFSET=1 -> 1/2, 1/16, 1/2
108 * CSC_MODE_YUV_TO_RGB=1 + CSC_BLACK_SCREEN_OFFSET=0 -> 0, 0, 0
109 * CSC_MODE_YUV_TO_RGB=1 + CSC_BLACK_SCREEN_OFFSET=1 -> 1/16, 1/16, 1/16
122 (clamp_val(((coeff) >> (32 - (fbits) - 3)) + 4, 0, 0xfff) & 0xff8)
125 #define ILK_CSC_COEFF_LIMITED_RANGE ((235 - 16) << (12 - 8)) /* exponent 0 */
126 #define ILK_CSC_POSTOFF_LIMITED_RANGE (16 << (12 - 8))
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| /kernel/linux/linux-5.10/drivers/gpu/drm/rcar-du/ |
| D | rcar_cmm.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * rcar_cmm.c -- R-Car Display Unit Color Management Module
27 * @lut: 1D-LUT state
28 * @lut.enabled: 1D-LUT enabled flag
32 } lut; member
37 return ioread32(rcmm->base + reg); in rcar_cmm_read()
42 iowrite32(data, rcmm->base + reg); in rcar_cmm_write()
46 * rcar_cmm_lut_write() - Scale the DRM LUT table entries to hardware precision
49 * @drm_lut: Pointer to the DRM LUT table
66 * rcar_cmm_setup() - Configure the CMM unit
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/renesas/rcar-du/ |
| D | rcar_cmm.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * R-Car Display Unit Color Management Module
27 * @lut: 1D-LUT state
28 * @lut.enabled: 1D-LUT enabled flag
32 } lut; member
37 return ioread32(rcmm->base + reg); in rcar_cmm_read()
42 iowrite32(data, rcmm->base + reg); in rcar_cmm_write()
46 * rcar_cmm_lut_write() - Scale the DRM LUT table entries to hardware precision
49 * @drm_lut: Pointer to the DRM LUT table
66 * rcar_cmm_setup() - Configure the CMM unit
[all …]
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/arm/ |
| D | malidp_crtc.c | 1 // SPDX-License-Identifier: GPL-2.0-only
28 struct malidp_hw_device *hwdev = malidp->dev; in malidp_crtc_mode_valid()
34 long rate, req_rate = mode->crtc_clock * 1000; in malidp_crtc_mode_valid()
37 rate = clk_round_rate(hwdev->pxlclk, req_rate); in malidp_crtc_mode_valid()
52 struct malidp_hw_device *hwdev = malidp->dev; in malidp_crtc_atomic_enable()
54 int err = pm_runtime_get_sync(crtc->dev->dev); in malidp_crtc_atomic_enable()
61 drm_display_mode_to_videomode(&crtc->state->adjusted_mode, &vm); in malidp_crtc_atomic_enable()
62 clk_prepare_enable(hwdev->pxlclk); in malidp_crtc_atomic_enable()
65 clk_set_rate(hwdev->pxlclk, crtc->state->adjusted_mode.crtc_clock * 1000); in malidp_crtc_atomic_enable()
67 hwdev->hw->modeset(hwdev, &vm); in malidp_crtc_atomic_enable()
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/arm/ |
| D | malidp_crtc.c | 1 // SPDX-License-Identifier: GPL-2.0-only
29 struct malidp_hw_device *hwdev = malidp->dev; in malidp_crtc_mode_valid()
35 long rate, req_rate = mode->crtc_clock * 1000; in malidp_crtc_mode_valid()
38 rate = clk_round_rate(hwdev->pxlclk, req_rate); in malidp_crtc_mode_valid()
53 struct malidp_hw_device *hwdev = malidp->dev; in malidp_crtc_atomic_enable()
55 int err = pm_runtime_get_sync(crtc->dev->dev); in malidp_crtc_atomic_enable()
62 drm_display_mode_to_videomode(&crtc->state->adjusted_mode, &vm); in malidp_crtc_atomic_enable()
63 clk_prepare_enable(hwdev->pxlclk); in malidp_crtc_atomic_enable()
66 clk_set_rate(hwdev->pxlclk, crtc->state->adjusted_mode.crtc_clock * 1000); in malidp_crtc_atomic_enable()
68 hwdev->hw->modeset(hwdev, &vm); in malidp_crtc_atomic_enable()
[all …]
|
| /kernel/linux/linux-6.6/drivers/staging/media/ipu3/include/uapi/ |
| D | intel-ipu3.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2 /* Copyright (C) 2017 - 2018 Intel Corporation */
11 /* Vendor specific - used for IPU3 camera sub-system */
17 /* from include/uapi/linux/v4l2-controls.h */
26 #define IPU3_UAPI_GRID_START_MASK ((1 << 12) - 1)
34 * struct ipu3_uapi_grid_config - Grid plane config
56 * create a grid-based output, and the data is then divided into "slices".
71 * struct ipu3_uapi_awb_set_item - Memory layout for each cell in AWB
108 * struct ipu3_uapi_awb_raw_buffer - AWB raw buffer
119 * struct ipu3_uapi_awb_config_s - AWB config
[all …]
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| /kernel/linux/linux-5.10/drivers/staging/media/ipu3/include/ |
| D | intel-ipu3.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (C) 2017 - 2018 Intel Corporation */
11 /* Vendor specific - used for IPU3 camera sub-system */
15 /* from include/uapi/linux/v4l2-controls.h */
24 #define IPU3_UAPI_GRID_START_MASK ((1 << 12) - 1)
32 * struct ipu3_uapi_grid_config - Grid plane config
48 * create a grid-based output, and the data is then divided into "slices".
79 * struct ipu3_uapi_awb_raw_buffer - AWB raw buffer
90 * struct ipu3_uapi_awb_config_s - AWB config
110 * struct ipu3_uapi_awb_config - AWB config wrapper
[all …]
|