| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/ |
| D | qcom,gcc-apq8064.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-apq8064.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Global Clock & Reset Controller on APQ8064/MSM8960 10 - Stephen Boyd <sboyd@kernel.org> 11 - Taniya Das <quic_tdas@quicinc.com> 15 domains on APQ8064. 18 include/dt-bindings/clock/qcom,gcc-msm8960.h 19 include/dt-bindings/reset/qcom,gcc-msm8960.h [all …]
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| D | qcom,kpss-gcc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,kpss-gcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Krait Processor Sub-system (KPSS) Global Clock Controller (GCC) 10 - Christian Marangi <ansuelsmth@gmail.com> 13 Krait Processor Sub-system (KPSS) Global Clock Controller (GCC). Used 15 to the kpss-gcc registers. 20 - enum: 21 - qcom,kpss-gcc-ipq8064 [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/ |
| D | qcom,gcc-apq8064.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-apq8064.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Global Clock & Reset Controller Binding for APQ8064 10 - Stephen Boyd <sboyd@kernel.org> 11 - Taniya Das <tdas@codeaurora.org> 15 power domains on APQ8064. 18 - dt-bindings/clock/qcom,gcc-msm8960.h 19 - dt-bindings/reset/qcom,gcc-msm8960.h [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pci/ |
| D | qcom,pcie.txt | 3 - compatible: 7 - "qcom,pcie-ipq8064" for ipq8064 8 - "qcom,pcie-ipq8064-v2" for ipq8064 rev 2 or ipq8065 9 - "qcom,pcie-apq8064" for apq8064 10 - "qcom,pcie-apq8084" for apq8084 11 - "qcom,pcie-msm8996" for msm8996 or apq8096 12 - "qcom,pcie-ipq4019" for ipq4019 13 - "qcom,pcie-ipq8074" for ipq8074 14 - "qcom,pcie-qcs404" for qcs404 15 - "qcom,pcie-sdm845" for sdm845 [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/qcom/ |
| D | qcom-apq8064.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/clock/qcom,gcc-msm8960.h> 5 #include <dt-bindings/clock/qcom,lcc-msm8960.h> 6 #include <dt-bindings/reset/qcom,gcc-msm8960.h> 7 #include <dt-bindings/clock/qcom,mmcc-msm8960.h> 8 #include <dt-bindings/clock/qcom,rpmcc.h> 9 #include <dt-bindings/soc/qcom,gsbi.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> [all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | qcom-apq8064.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/clock/qcom,gcc-msm8960.h> 5 #include <dt-bindings/reset/qcom,gcc-msm8960.h> 6 #include <dt-bindings/clock/qcom,mmcc-msm8960.h> 7 #include <dt-bindings/clock/qcom,rpmcc.h> 8 #include <dt-bindings/soc/qcom,gsbi.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #address-cells = <1>; [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/firmware/ |
| D | qcom,scm.txt | 9 - compatible: must contain one of the following: 10 * "qcom,scm-apq8064" 11 * "qcom,scm-apq8084" 12 * "qcom,scm-ipq4019" 13 * "qcom,scm-ipq806x" 14 * "qcom,scm-ipq8074" 15 * "qcom,scm-msm8660" 16 * "qcom,scm-msm8916" 17 * "qcom,scm-msm8960" 18 * "qcom,scm-msm8974" [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/firmware/ |
| D | qcom,scm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 16 - Bjorn Andersson <bjorn.andersson@linaro.org> 17 - Robert Marko <robimarko@gmail.com> 18 - Guru Das Srinagesh <quic_gurus@quicinc.com> 23 - enum: 24 - qcom,scm-apq8064 25 - qcom,scm-apq8084 26 - qcom,scm-ipq4019 [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/pci/ |
| D | qcom,pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <bjorn.andersson@linaro.org> 11 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 20 - enum: 21 - qcom,pcie-apq8064 22 - qcom,pcie-apq8084 23 - qcom,pcie-ipq4019 24 - qcom,pcie-ipq6018 [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/soc/qcom/ |
| D | qcom,gsbi.txt | 4 representing a serial sub-node device that is mux'd as part of the GSBI 9 - compatible: Should contain "qcom,gsbi-v1.0.0" 10 - cell-index: Should contain the GSBI index 11 - reg: Address range for GSBI registers 12 - clocks: required clock 13 - clock-names: must contain "iface" entry 14 - qcom,mode : indicates MUX value for configuration of the serial interface. 15 Please reference dt-bindings/soc/qcom,gsbi.h for valid mux values. 18 - qcom,crci : indicates CRCI MUX value for QUP CRCI ports. Please reference 19 dt-bindings/soc/qcom,gsbi.h for valid CRCI mux values. [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/phy/ |
| D | qcom-apq8064-sata-phy.txt | 1 Qualcomm APQ8064 SATA PHY Controller 2 ------------------------------------ 4 SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers. 8 - compatible: compatible list, contains "qcom,apq8064-sata-phy". 9 - reg: offset and length of the SATA PHY register set; 10 - #phy-cells: must be zero 11 - clocks: a list of phandles and clock-specifier pairs, one for each entry in 12 clock-names. 13 - clock-names: must be "cfg" for phy config clock. 16 sata_phy: sata-phy@1b400000 { [all …]
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| D | qcom,usb-hs-phy.txt | 5 - compatible: 8 Definition: Should contain "qcom,usb-hs-phy" and more specifically one of the 11 "qcom,usb-hs-phy-apq8064" 12 "qcom,usb-hs-phy-msm8916" 13 "qcom,usb-hs-phy-msm8974" 15 - #phy-cells: 20 - clocks: 22 Value type: <prop-encoded-array> 26 - clock-names: 32 - resets: [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/phy/ |
| D | qcom-apq8064-sata-phy.txt | 1 Qualcomm APQ8064 SATA PHY Controller 2 ------------------------------------ 4 SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers. 8 - compatible: compatible list, contains "qcom,apq8064-sata-phy". 9 - reg: offset and length of the SATA PHY register set; 10 - #phy-cells: must be zero 11 - clocks: a list of phandles and clock-specifier pairs, one for each entry in 12 clock-names. 13 - clock-names: must be "cfg" for phy config clock. 16 sata_phy: sata-phy@1b400000 { [all …]
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| D | qcom,usb-hs-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/phy/qcom,usb-hs-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <bjorn.andersson@linaro.org> 17 - qcom,usb-hs-phy-apq8064 18 - qcom,usb-hs-phy-msm8960 24 reset-names: 33 reset-names: 35 - const: phy [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/msm/ |
| D | qcom,kpss-gcc.txt | 1 Krait Processor Sub-system (KPSS) Global Clock Controller (GCC) 5 - compatible: 9 "qcom,kpss-gcc" should also be included. 10 "qcom,kpss-gcc-ipq8064", "qcom,kpss-gcc" 11 "qcom,kpss-gcc-apq8064", "qcom,kpss-gcc" 12 "qcom,kpss-gcc-msm8974", "qcom,kpss-gcc" 13 "qcom,kpss-gcc-msm8960", "qcom,kpss-gcc" 15 - reg: 17 Value type: <prop-encoded-array> 20 - clocks: [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/ |
| D | qcom_adm.txt | 4 - compatible: must contain "qcom,adm" for IPQ/APQ8064 and MSM8960 5 - reg: Address range for DMA registers 6 - interrupts: Should contain one interrupt shared by all channels 7 - #dma-cells: must be <2>. First cell denotes the channel number. Second cell 9 - clocks: Should contain the core clock and interface clock. 10 - clock-names: Must contain "core" for the core clock and "iface" for the 12 - resets: Must contain an entry for each entry in reset names. 13 - reset-names: Must include the following entries: 14 - clk 15 - c0 [all …]
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| D | qcom_bam_dma.txt | 4 - compatible: must be one of the following: 5 * "qcom,bam-v1.4.0" for MSM8974, APQ8074 and APQ8084 6 * "qcom,bam-v1.3.0" for APQ8064, IPQ8064 and MSM8960 7 * "qcom,bam-v1.7.0" for MSM8916 8 - reg: Address range for DMA registers 9 - interrupts: Should contain the one interrupt shared by all channels 10 - #dma-cells: must be <1>, the cell in the dmas property of the client device 12 - clocks: required clock 13 - clock-names: must contain "bam_clk" entry 14 - qcom,ee : indicates the active Execution Environment identifier (0-7) used in [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/slimbus/ |
| D | qcom,slim.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 11 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> 18 - $ref: slimbus.yaml# 23 - enum: 24 - qcom,apq8064-slim 25 - const: qcom,slim 29 - description: Physical address of controller register blocks [all …]
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| D | slimbus.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> 13 SLIMbus is a 2-wire bus, and is used to communicate with peripheral 14 components like audio-codec. 18 pattern: "^slim(@.*|-([0-9]|[1-9][0-9]+))?$" 20 "#address-cells": 23 "#size-cells": 27 "^.*@[0-9a-f]+,[0-9a-f]+$": [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/dma/ |
| D | qcom,bam-dma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/dma/qcom,bam-dma.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Andy Gross <agross@kernel.org> 11 - Bjorn Andersson <andersson@kernel.org> 14 - $ref: dma-controller.yaml# 19 - enum: 20 # APQ8064, IPQ8064 and MSM8960 21 - qcom,bam-v1.3.0 [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/nvmem/ |
| D | qcom,qfprom.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> 13 - $ref: nvmem.yaml# 18 - enum: 19 - qcom,apq8064-qfprom 20 - qcom,apq8084-qfprom 21 - qcom,ipq5332-qfprom 22 - qcom,ipq6018-qfprom [all …]
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| /kernel/linux/linux-5.10/drivers/clk/qcom/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 60 platforms such as apq8064, msm8660, msm8960 etc. 183 tristate "APQ8064/MSM8960 Global Clock Controller" 185 Support for the global clock controller on apq8064/msm8960 devices. 190 tristate "APQ8064/MSM8960 LPASS Clock Controller" 193 Support for the LPASS clock controller on apq8064/msm8960 devices. 485 tristate "High-Frequency PLL (HFPLL) Clock Controller" 487 Support for the high-frequency PLLs present on Qualcomm devices. 494 Support for the Krait ACC and GCC clock controllers. Say Y 496 as MSM8960, APQ8064, etc.
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/ |
| D | qcom-soc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/arm/qcom-soc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <andersson@kernel.org> 15 qcom,SoC-IP 18 qcom,sdm845-llcc-bwmon 26 pattern: "^qcom,.*(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+.*$" 28 - compatible 34 - pattern: "^qcom,(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+(pro)?-.*$" [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/msm/ |
| D | dsi-controller-main.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/dsi-controller-main.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krishna Manikandan <quic_mkrishn@quicinc.com> 15 - items: 16 - enum: 17 - qcom,apq8064-dsi-ctrl 18 - qcom,msm8226-dsi-ctrl 19 - qcom,msm8916-dsi-ctrl [all …]
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| /kernel/linux/linux-6.6/drivers/clk/qcom/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 79 platforms such as apq8064, msm8660, msm8960 etc. 251 tristate "APQ8064/MSM8960 Global Clock Controller" 254 Support for the global clock controller on apq8064/msm8960 devices. 259 tristate "APQ8064/MSM8960/MDM9650 LPASS Clock Controller" 262 Support for the LPASS clock controller on apq8064/msm8960/mdm9650 1066 tristate "High-Frequency PLL (HFPLL) Clock Controller" 1068 Support for the high-frequency PLLs present on Qualcomm devices. 1075 Support for the Krait ACC and GCC clock controllers. Say Y 1077 as MSM8960, APQ8064, etc.
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