Searched +full:gcc +full:- +full:mdm9607 (Results 1 – 7 of 7) sorted by relevance
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/ |
| D | qcom,gcc-other.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-other.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stephen Boyd <sboyd@kernel.org>
11 - Taniya Das <quic_tdas@quicinc.com>
18 include/dt-bindings/clock/qcom,gcc-ipq6018.h
19 include/dt-bindings/reset/qcom,gcc-ipq6018.h
20 include/dt-bindings/clock/qcom,gcc-msm8953.h
21 include/dt-bindings/clock/qcom,gcc-mdm9607.h
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/firmware/ |
| D | qcom,scm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
16 - Bjorn Andersson <bjorn.andersson@linaro.org>
17 - Robert Marko <robimarko@gmail.com>
18 - Guru Das Srinagesh <quic_gurus@quicinc.com>
23 - enum:
24 - qcom,scm-apq8064
25 - qcom,scm-apq8084
26 - qcom,scm-ipq4019
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| /kernel/linux/linux-6.6/drivers/clk/qcom/ |
| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_COMMON_CLK_QCOM) += clk-qcom.o
4 clk-qcom-y += common.o
5 clk-qcom-y += clk-regmap.o
6 clk-qcom-y += clk-alpha-pll.o
7 clk-qcom-y += clk-pll.o
8 clk-qcom-y += clk-rcg.o
9 clk-qcom-y += clk-rcg2.o
10 clk-qcom-y += clk-branch.o
11 clk-qcom-y += clk-regmap-divider.o
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| D | gcc-mdm9607.c | 1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/clk-provider.h>
14 #include <linux/reset-controller.h>
16 #include <dt-bindings/clock/qcom,gcc-mdm9607.h>
19 #include "clk-regmap.h"
20 #include "clk-alpha-pll.h"
21 #include "clk-pll.h"
22 #include "clk-rcg.h"
23 #include "clk-branch.h"
1591 { .compatible = "qcom,gcc-mdm9607" },
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| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
268 tristate "MDM9607 Global Clock Controller"
271 Support for the global clock controller on mdm9607 devices.
1066 tristate "High-Frequency PLL (HFPLL) Clock Controller"
1068 Support for the high-frequency PLLs present on Qualcomm devices.
1075 Support for the Krait ACC and GCC clock controllers. Say Y
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/thermal/ |
| D | qcom-tsens.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 ---
5 $id: http://devicetree.org/schemas/thermal/qcom-tsens.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Amit Kucheria <amitk@kernel.org>
22 - description: msm8960 TSENS based
24 - enum:
25 - qcom,ipq8064-tsens
26 - qcom,msm8960-tsens
28 - description: v0.1 of TSENS
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| /kernel/linux/linux-6.6/drivers/thermal/qcom/ |
| D | tsens.c | 1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/nvmem-consumer.h>
25 * struct tsens_irq_data - IRQ status and temperature violations
80 if (priv->num_sensors > MAX_SENSORS) in tsens_read_calibration()
81 return -EINVAL; in tsens_read_calibration()
87 ret = nvmem_cell_read_variable_le_u32(priv->dev, name, &mode); in tsens_read_calibration()
88 if (ret == -ENOENT) in tsens_read_calibration()
89 dev_warn(priv->dev, "Please migrate to separate nvmem cells for calibration data\n"); in tsens_read_calibration()
93 dev_dbg(priv->dev, "calibration mode is %d\n", mode); in tsens_read_calibration()
99 ret = nvmem_cell_read_variable_le_u32(priv->dev, name, &base1); in tsens_read_calibration()
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