| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/gpio/ |
| D | gpio-latch.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/gpio-latch.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: GPIO latch controller
10 - Sascha Hauer <s.hauer@pengutronix.de>
13 This binding describes a GPIO multiplexer based on latches connected to
16 CLK0 ----------------------. ,--------.
17 CLK1 -------------------. `--------|> #0 |
19 OUT0 ----------------+--|-----------|D0 Q0|-----|<
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| D | sprd,gpio-eic.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/gpio/sprd,gpio-eic.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Orson Zhai <orsonzhai@gmail.com>
12 - Baolin Wang <baolin.wang7@gmail.com>
13 - Chunyan Zhang <zhang.lyra@gmail.com>
19 controller contains 4 sub-modules, i.e. EIC-debounce, EIC-latch, EIC-async and
20 EIC-sync. But the PMIC EIC controller contains only one EIC-debounce sub-
23 The EIC-debounce sub-module provides up to 8 source input signal
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/gpio/ |
| D | gpio-eic-sprd.txt | 6 controller contains 4 sub-modules: EIC-debounce, EIC-latch, EIC-async and
7 EIC-sync. But the PMIC EIC controller contains only one EIC-debounce sub-
10 The EIC-debounce sub-module provides up to 8 source input signal
12 stable status (millisecond resolution) and a single-trigger mechanism
13 is introduced into this sub-module to enhance the input event detection
14 reliability. In addition, this sub-module's clock can be shut off
19 The EIC-latch sub-module is used to latch some special power down signals
20 and generate interrupts, since the EIC-latch does not depend on the APB
23 The EIC-async sub-module uses a 32kHz clock to capture the short signals
26 The EIC-sync is similar with GPIO's input function, which is a synchronized
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| /kernel/linux/linux-6.6/drivers/gpio/ |
| D | gpio-latch.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * GPIO latch driver
7 * This driver implements a GPIO (or better GPO as there is no input)
10 * CLK0 ----------------------. ,--------.
11 * CLK1 -------------------. `--------|> #0 |
13 * OUT0 ----------------+--|-----------|D0 Q0|-----|<
14 * OUT1 --------------+-|--|-----------|D1 Q1|-----|<
15 * OUT2 ------------+-|-|--|-----------|D2 Q2|-----|<
16 * OUT3 ----------+-|-|-|--|-----------|D3 Q3|-----|<
17 * OUT4 --------+-|-|-|-|--|-----------|D4 Q4|-----|<
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| D | gpio-eic-sprd.c | 1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/gpio/driver.h>
53 * The digital-chip EIC controller can support maximum 3 banks, and each bank
59 #define SPRD_EIC_BIT(x) ((x) & (SPRD_EIC_PER_BANK_NR - 1))
66 * The Spreadtrum digital-chip EIC controller contains 4 sub-modules:
67 * debounce EIC, latch EIC, async EIC and sync EIC,
70 * (millisecond resolution) and a single-trigger mechanism is introduced
71 * into this sub-module to enhance the input event detection reliability.
74 * The latch EIC is used to latch some special power down signals and
75 * generate interrupts, since the latch EIC does not depend on the APB clock
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| D | gpio-pcf857x.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver for pcf857x, pca857x, and pca967x I2C GPIO expanders
8 #include <linux/gpio/driver.h>
59 * that pin be used as an input; it's not an open-drain model, but acts
60 * a bit like one. This is described as "quasi-bidirectional"; read the
63 * Many other I2C GPIO expander chips (like the pca953x models) have
72 unsigned int out; /* software latch */
80 /*-------------------------------------------------------------------------*/
82 /* Talk to 8-bit I/O expander */
94 /* Talk to 16-bit I/O expander */
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| D | gpio-aspeed.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #include <linux/gpio/aspeed.h>
10 #include <linux/gpio/driver.h>
25 * These two headers aren't meant to be used by GPIO drivers. We need
30 #include <linux/gpio/consumer.h>
50 * represents disabled debouncing for the GPIO. Any other value for an element
72 uint16_t val_regs; /* +0: Rd: read input value, Wr: set write latch
75 uint16_t rdata_reg; /* Rd: read write latch, Wr: <none> */
85 * line even when the GPIO is configured as an output. Since
89 * The "rdata" register returns the content of the write latch
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/ |
| D | armada3700-xtal-clock.txt | 4 reading the gpio latch register.
7 of the GPIO block where the gpio latch is located.
8 See Documentation/devicetree/bindings/pinctrl/marvell,armada-37xx-pinctrl.txt
11 - compatible : shall be one of the following:
12 "marvell,armada-3700-xtal-clock"
13 - #clock-cells : from common clock binding; shall be set to 0
16 - clock-output-names : from common clock binding; allows overwrite default clock
20 pinctrl_nb: pinctrl-nb@13800 {
21 compatible = "armada3710-nb-pinctrl", "syscon", "simple-mfd";
24 xtalclk: xtal-clk {
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/ |
| D | armada3700-xtal-clock.txt | 4 reading the gpio latch register.
7 of the GPIO block where the gpio latch is located.
8 See Documentation/devicetree/bindings/pinctrl/marvell,armada-37xx-pinctrl.txt
11 - compatible : shall be one of the following:
12 "marvell,armada-3700-xtal-clock"
13 - #clock-cells : from common clock binding; shall be set to 0
16 - clock-output-names : from common clock binding; allows overwrite default clock
20 pinctrl_nb: pinctrl-nb@13800 {
21 compatible = "armada3710-nb-pinctrl", "syscon", "simple-mfd";
24 xtalclk: xtal-clk {
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| /kernel/linux/linux-6.6/drivers/staging/fbtft/ |
| D | fbtft.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
23 * struct fbtft_gpio - Structure that holds one pinname to gpio mapping
25 * @gpio: GPIO number
30 struct gpio_desc *gpio; member
36 * struct fbtft_ops - FBTFT operations structure
47 * @request_gpios_match: Do pinname to gpio matching
76 const struct fbtft_gpio *gpio);
88 * struct fbtft_display - Describes the display properties
124 * struct fbtft_platform_data - Passes display specific data to the driver
126 * @gpios: Pointer to an array of pinname to gpio mappings
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| /kernel/linux/linux-5.10/drivers/staging/fbtft/ |
| D | fbtft.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
23 * struct fbtft_gpio - Structure that holds one pinname to gpio mapping
25 * @gpio: GPIO number
30 struct gpio_desc *gpio; member
36 * struct fbtft_ops - FBTFT operations structure
47 * @request_gpios_match: Do pinname to gpio matching
76 const struct fbtft_gpio *gpio);
88 * struct fbtft_display - Describes the display properties
124 * struct fbtft_platform_data - Passes display specific data to the driver
126 * @gpios: Pointer to an array of pinname to gpio mappings
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| /kernel/linux/linux-5.10/arch/arm/mach-s3c/ |
| D | h1940.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright 2006 Ben Dooks <ben-linux@fluff.org>
26 #include <linux/gpio.h>
30 /* SD layer latch */
41 /* CPU layer latch */
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| D | mach-h1940.c | 1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright (c) 2003-2005 Simtec Electronics
20 #include <linux/gpio.h>
21 #include <linux/gpio/machine.h>
38 #include <asm/mach-types.h>
43 #include <linux/platform_data/i2c-s3c2410.h>
44 #include <linux/platform_data/mmc-s3cmci.h>
45 #include <linux/platform_data/touchscreen-s3c2410.h>
46 #include <linux/platform_data/usb-s3c2410_udc.h>
50 #include <linux/platform_data/fb-s3c2410.h>
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| /kernel/linux/linux-5.10/arch/arm/mach-pxa/ |
| D | pcm990_baseboard.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * arch/arm/mach-pxa/include/mach/pcm990_baseboard.h
13 * definitions relevant only when the PCM-990
17 /* CPLD's interrupt controller is connected to PCM-027 GPIO 9 */
21 #define PCM990_CTRL_PHYS PXA_CS1_PHYS /* 16-Bit */
46 #define PCM990_CTRL_LCDON 0x0002 /* RW LCD Latch on */
82 #define PCM990_CTRL_REG10 0x0012 /* GPS-REGISTER */
83 #define PCM990_CTRL_GPSPWR 0x0004 /* GPS-Modul Power on */
84 #define PCM990_CTRL_GPSENA 0x0008 /* GPS-Modul Enable */
88 #define PCM990_CTRL_ACSEL 0x0002 /* Charge Akku -> DC Enable */
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mtd/ |
| D | fsl-upm-nand.txt | 4 - compatible : "fsl,upm-nand".
5 - reg : should specify localbus chip select and size used for the chip.
6 - fsl,upm-addr-offset : UPM pattern offset for the address latch.
7 - fsl,upm-cmd-offset : UPM pattern offset for the command latch.
10 - fsl,upm-addr-line-cs-offsets : address offsets for multi-chip support.
12 - gpios : may specify optional GPIOs connected to the Ready-Not-Busy pins
13 (R/B#). For multi-chip devices, "n" GPIO definitions are required
17 - fsl,upm-wait-flags : add chip-dependent short delays after running the
20 - chip-delay : chip dependent delay for transferring data from array to
24 Each flash chip described may optionally contain additional sub-nodes
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| D | atmel-nand.txt | 4 Documentation/devicetree/bindings/memory-controllers/atmel,ebi.txt).
11 - compatible: should be one of the following
12 "atmel,at91rm9200-nand-controller"
13 "atmel,at91sam9260-nand-controller"
14 "atmel,at91sam9261-nand-controller"
15 "atmel,at91sam9g45-nand-controller"
16 "atmel,sama5d3-nand-controller"
17 "microchip,sam9x60-nand-controller"
18 - ranges: empty ranges property to forward EBI ranges definitions.
19 - #address-cells: should be set to 2.
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mtd/ |
| D | fsl-upm-nand.txt | 4 - compatible : "fsl,upm-nand".
5 - reg : should specify localbus chip select and size used for the chip.
6 - fsl,upm-addr-offset : UPM pattern offset for the address latch.
7 - fsl,upm-cmd-offset : UPM pattern offset for the command latch.
10 - fsl,upm-addr-line-cs-offsets : address offsets for multi-chip support.
12 - gpios : may specify optional GPIOs connected to the Ready-Not-Busy pins
13 (R/B#). For multi-chip devices, "n" GPIO definitions are required
17 - fsl,upm-wait-flags : add chip-dependent short delays after running the
20 - chip-delay : chip dependent delay for transferring data from array to
24 Each flash chip described may optionally contain additional sub-nodes
[all …]
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| D | atmel-nand.txt | 4 Documentation/devicetree/bindings/memory-controllers/atmel,ebi.txt).
11 - compatible: should be one of the following
12 "atmel,at91rm9200-nand-controller"
13 "atmel,at91sam9260-nand-controller"
14 "atmel,at91sam9261-nand-controller"
15 "atmel,at91sam9g45-nand-controller"
16 "atmel,sama5d3-nand-controller"
17 "microchip,sam9x60-nand-controller"
18 - ranges: empty ranges property to forward EBI ranges definitions.
19 - #address-cells: should be set to 2.
[all …]
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| /kernel/linux/linux-5.10/drivers/gpio/ |
| D | gpio-eic-sprd.c | 1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/gpio/driver.h>
53 * The digital-chip EIC controller can support maximum 3 banks, and each bank
59 #define SPRD_EIC_BIT(x) ((x) & (SPRD_EIC_PER_BANK_NR - 1))
66 * The Spreadtrum digital-chip EIC controller contains 4 sub-modules:
67 * debounce EIC, latch EIC, async EIC and sync EIC,
70 * (millisecond resolution) and a single-trigger mechanism is introduced
71 * into this sub-module to enhance the input event detection reliability.
74 * The latch EIC is used to latch some special power down signals and
75 * generate interrupts, since the latch EIC does not depend on the APB clock
[all …]
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| D | gpio-pcf857x.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver for pcf857x, pca857x, and pca967x I2C GPIO expanders
8 #include <linux/gpio/driver.h>
63 * that pin be used as an input; it's not an open-drain model, but acts
64 * a bit like one. This is described as "quasi-bidirectional"; read the
67 * Many other I2C GPIO expander chips (like the pca953x models) have
77 unsigned out; /* software latch */
85 /*-------------------------------------------------------------------------*/
87 /* Talk to 8-bit I/O expander */
99 /* Talk to 16-bit I/O expander */
[all …]
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| D | gpio-aspeed.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
10 #include <linux/gpio/driver.h>
11 #include <linux/gpio/aspeed.h>
23 * These two headers aren't meant to be used by GPIO drivers. We need
28 #include <linux/gpio/consumer.h>
48 * represents disabled debouncing for the GPIO. Any other value for an element
70 uint16_t val_regs; /* +0: Rd: read input value, Wr: set write latch
73 uint16_t rdata_reg; /* Rd: read write latch, Wr: <none> */
83 * line even when the GPIO is configured as an output. Since
87 * The "rdata" register returns the content of the write latch
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/ |
| D | marvell,armada-37xx-pinctrl.txt | 1 * Marvell Armada 37xx SoC pin and gpio controller
3 Each Armada 37xx SoC come with two pin and gpio controller one for the
6 Inside this set of register the gpio latch allows exposing some
11 GPIO and pin controller:
12 ------------------------
16 Refer to pinctrl-bindings.txt in this directory for details of the
22 - compatible: "marvell,armada3710-sb-pinctrl", "syscon, "simple-mfd"
24 "marvell,armada3710-nb-pinctrl", "syscon, "simple-mfd"
26 - reg: The first set of register are for pinctrl/gpio and the second
28 - interrupts: list of the interrupt use by the gpio
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/ |
| D | marvell,armada-37xx-pinctrl.txt | 1 * Marvell Armada 37xx SoC pin and gpio controller
3 Each Armada 37xx SoC come with two pin and gpio controller one for the
6 Inside this set of register the gpio latch allows exposing some
11 GPIO and pin controller:
12 ------------------------
16 Refer to pinctrl-bindings.txt in this directory for details of the
22 - compatible: "marvell,armada3710-sb-pinctrl", "syscon, "simple-mfd"
24 "marvell,armada3710-nb-pinctrl", "syscon, "simple-mfd"
26 - reg: The first set of register are for pinctrl/gpio and the second
28 - interrupts: list of the interrupt use by the gpio
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mmc/ |
| D | mtk-sd.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mtk-sd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chaotian Jing <chaotian.jing@mediatek.com>
11 - Wenbin Mei <wenbin.mei@mediatek.com>
16 - enum:
17 - mediatek,mt2701-mmc
18 - mediatek,mt2712-mmc
19 - mediatek,mt6779-mmc
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| /kernel/linux/linux-5.10/arch/arm/mach-ep93xx/ |
| D | snappercl15.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * arch/arm/mach-ep93xx/snappercl15.c
24 #include <linux/platform_data/video-ep93xx.h>
25 #include "gpio-ep93xx.h"
27 #include <asm/mach-types.h>
35 #define SNAPPERCL15_NAND_ALE (1 << 9) /* Address latch */
36 #define SNAPPERCL15_NAND_CLE (1 << 10) /* Command latch */
40 #define NAND_CTRL_ADDR(chip) (chip->legacy.IO_ADDR_W + 0x40)
67 chip->legacy.IO_ADDR_W); in snappercl15_nand_cmd_ctrl()
104 .end = SNAPPERCL15_NAND_BASE + SZ_4K - 1,
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