Home
last modified time | relevance | path

Searched +full:gpio +full:- +full:line +full:- +full:names (Results 1 – 25 of 1048) sorted by relevance

12345678910>>...42

/kernel/linux/linux-5.10/arch/arm64/boot/dts/hisilicon/
Dhi3670-hikey970.dts1 // SPDX-License-Identifier: GPL-2.0
10 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
14 #include "hikey970-pinctrl.dtsi"
18 compatible = "hisilicon,hi3670-hikey970", "hisilicon,hi3670";
33 stdout-path = "serial6:115200n8";
42 sd_1v8: regulator-1v8 {
43 compatible = "regulator-fixed";
44 regulator-name = "fixed-1.8V";
45 regulator-min-microvolt = <1800000>;
[all …]
Dhi3660-hikey960.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
12 #include "hikey960-pinctrl.dtsi"
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/usb/pd.h>
20 compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660";
35 stdout-path = "serial6:115200n8";
44 reserved-memory {
[all …]
Dhi6220-hikey.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include "hikey-pinctrl.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
16 compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";
26 stdout-path = "serial3:115200n8";
32 * 0x05e0,0000 - 0x05ef,ffff: MCU firmware runtime using
33 * 0x05f0,1000 - 0x05f0,1fff: Reboot reason
34 * 0x06df,f000 - 0x06df,ffff: Mailbox message data
35 * 0x0740,f000 - 0x0740,ffff: MCU firmware section
[all …]
Dhi3798cv200-poplar.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
12 #include "poplar-pinctrl.dtsi"
16 compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200";
24 stdout-path = "serial0:115200n8";
33 compatible = "gpio-leds";
35 user-led0 {
38 linux,default-trigger = "heartbeat";
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/hisilicon/
Dhi3670-hikey970.dts1 // SPDX-License-Identifier: GPL-2.0
10 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
14 #include "hikey970-pinctrl.dtsi"
15 #include "hikey970-pmic.dtsi"
19 compatible = "hisilicon,hi3670-hikey970", "hisilicon,hi3670";
34 stdout-path = "serial6:115200n8";
43 wlan_en: wlan-en-1-8v {
44 compatible = "regulator-fixed";
45 regulator-name = "wlan-en-regulator";
[all …]
Dhi3660-hikey960.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
12 #include "hikey960-pinctrl.dtsi"
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/usb/pd.h>
20 compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660";
35 stdout-path = "serial6:115200n8";
44 reserved-memory {
[all …]
Dhi6220-hikey.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include "hikey-pinctrl.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
16 compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";
26 stdout-path = "serial3:115200n8";
32 * 0x05e0,0000 - 0x05ef,ffff: MCU firmware runtime using
33 * 0x05f0,1000 - 0x05f0,1fff: Reboot reason
34 * 0x06df,f000 - 0x06df,ffff: Mailbox message data
35 * 0x0740,f000 - 0x0740,ffff: MCU firmware section
[all …]
Dhi3798cv200-poplar.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
12 #include "poplar-pinctrl.dtsi"
16 compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200";
24 stdout-path = "serial0:115200n8";
33 compatible = "gpio-leds";
35 user-led0 {
38 linux,default-trigger = "heartbeat";
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/
Dqcom,pmic-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,pmic-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm PMIC GPIO block
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
13 This binding describes the GPIO block(s) found in the 8xxx series of
19 - enum:
20 - qcom,pm2250-gpio
21 - qcom,pm660-gpio
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/gpio/
Dgpio-mmio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/gpio-mmio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic MMIO GPIO
10 - Linus Walleij <linus.walleij@linaro.org>
11 - Bartosz Golaszewski <brgl@bgdev.pl>
14 Some simple GPIO controllers may consist of a single data register or a pair
15 of set/clear-bit registers. Such controllers are common for glue logic in
16 FPGAs or ASICs. Commonly, these controllers are accessed over memory-mapped
[all …]
Dgpio-zynq.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/gpio-zynq.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx Zynq GPIO controller
10 - Michal Simek <michal.simek@amd.com>
15 - xlnx,zynq-gpio-1.0
16 - xlnx,zynqmp-gpio-1.0
17 - xlnx,versal-gpio-1.0
18 - xlnx,pmc-gpio-1.0
[all …]
Dgpio.txt1 Specifying GPIO information for devices
5 -----------------
7 GPIO properties should be named "[<name>-]gpios", with <name> being the purpose
8 of this GPIO for the device. While a non-existent <name> is considered valid
10 for new bindings. Also, GPIO properties named "[<name>-]gpio" are valid and old
14 GPIO properties can contain one or more GPIO phandles, but only in exceptional
18 several GPIOs serve the same function (e.g. a parallel data line).
23 The following example could be used to describe GPIO pins used as device enable
24 and bit-banged data signals:
27 gpio-controller;
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/gpio/
Dgpio.txt1 Specifying GPIO information for devices
5 -----------------
7 GPIO properties should be named "[<name>-]gpios", with <name> being the purpose
8 of this GPIO for the device. While a non-existent <name> is considered valid
10 for new bindings. Also, GPIO properties named "[<name>-]gpio" are valid and old
14 GPIO properties can contain one or more GPIO phandles, but only in exceptional
18 several GPIOs serve the same function (e.g. a parallel data line).
23 The following example could be used to describe GPIO pins used as device enable
24 and bit-banged data signals:
27 gpio-controller;
[all …]
/kernel/linux/linux-6.6/Documentation/firmware-guide/acpi/
Dgpio-properties.rst1 .. SPDX-License-Identifier: GPL-2.0
4 _DSD Device Properties Related to GPIO
8 allows names to be given to GPIOs (and other things as well) returned
10 the corresponding GPIO, which is pretty error prone (it depends on
31 ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
34 Package () { "reset-gpios", Package () { ^BTH, 1, 1, 0 } },
35 Package () { "shutdown-gpios", Package () { ^BTH, 0, 0, 0 } },
40 The format of the supported GPIO property is::
52 If 1, the GPIO is marked as active_low.
56 it to 1 marks the GPIO as active low.
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/rockchip/
Drk3288-veyron-speedy.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include "rk3288-veyron-chromebook.dtsi"
10 #include "rk3288-veyron-broadcom-bluetooth.dtsi"
11 #include "../cros-ec-sbs.dtsi"
15 compatible = "google,veyron-speedy-rev9", "google,veyron-speedy-rev8",
16 "google,veyron-speedy-rev7", "google,veyron-speedy-rev6",
17 "google,veyron-speedy-rev5", "google,veyron-speedy-rev4",
18 "google,veyron-speedy-rev3", "google,veyron-speedy-rev2",
19 "google,veyron-speedy", "google,veyron", "rockchip,rk3288";
[all …]
Drk3288-veyron-jaq.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "rk3288-veyron-chromebook.dtsi"
11 #include "../cros-ec-sbs.dtsi"
15 compatible = "google,veyron-jaq-rev5", "google,veyron-jaq-rev4",
16 "google,veyron-jaq-rev3", "google,veyron-jaq-rev2",
17 "google,veyron-jaq-rev1", "google,veyron-jaq",
22 /* Jaq panel PWM must be >= 3%, so start non-zero brightness at 8 */
23 brightness-levels = <8 255>;
24 num-interpolated-steps = <247>;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Drk3288-veyron-speedy.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include "rk3288-veyron-chromebook.dtsi"
10 #include "rk3288-veyron-broadcom-bluetooth.dtsi"
11 #include "cros-ec-sbs.dtsi"
15 compatible = "google,veyron-speedy-rev9", "google,veyron-speedy-rev8",
16 "google,veyron-speedy-rev7", "google,veyron-speedy-rev6",
17 "google,veyron-speedy-rev5", "google,veyron-speedy-rev4",
18 "google,veyron-speedy-rev3", "google,veyron-speedy-rev2",
19 "google,veyron-speedy", "google,veyron", "rockchip,rk3288";
[all …]
Drk3288-veyron-jaq.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "rk3288-veyron-chromebook.dtsi"
11 #include "cros-ec-sbs.dtsi"
15 compatible = "google,veyron-jaq-rev5", "google,veyron-jaq-rev4",
16 "google,veyron-jaq-rev3", "google,veyron-jaq-rev2",
17 "google,veyron-jaq-rev1", "google,veyron-jaq",
22 /* Jaq panel PWM must be >= 3%, so start non-zero brightness at 8 */
23 brightness-levels = <0 8 255>;
24 num-interpolated-steps = <247>;
[all …]
Dste-hrefv60plus.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2012 ST-Ericsson AB
6 #include "ste-href-ab8500.dtsi"
7 #include "ste-href.dtsi"
10 model = "ST-Ericsson HREF (v60+) platform with Device Tree";
11 compatible = "st-ericsson,hrefv60+", "st-ericsson,u8500";
14 /* Name the GPIO muxed rails on the HREF boards */
15 gpio@8012e000 {
16 /* GPIOs 0 - 31 */
17 gpio-line-names =
[all …]
Drk3288-veyron-minnie.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include "rk3288-veyron-chromebook.dtsi"
10 #include "rk3288-veyron-broadcom-bluetooth.dtsi"
14 compatible = "google,veyron-minnie-rev4", "google,veyron-minnie-rev3",
15 "google,veyron-minnie-rev2", "google,veyron-minnie-rev1",
16 "google,veyron-minnie-rev0", "google,veyron-minnie",
19 volume_buttons: volume-buttons {
20 compatible = "gpio-keys";
21 pinctrl-names = "default";
[all …]
Daspeed-bmc-lenovo-hr630.dts1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2019-present Lenovo
8 /dts-v1/;
10 #include "aspeed-g5.dtsi"
11 #include <dt-bindings/gpio/aspeed-gpio.h>
15 compatible = "lenovo,hr630-bmc", "aspeed,ast2500";
29 stdout-path = &uart5;
38 reserved-memory {
39 #address-cells = <1>;
40 #size-cells = <1>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/ti/omap/
Dam335x-netcom-plus-8xx.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
11 /dts-v1/;
13 #include "am335x-baltos.dtsi"
20 pinctrl-names = "default";
21 pinctrl-0 = <&dip_switches>;
23 dip_switches: dip-switches-pins {
24 pinctrl-single,pins = <
32 tca6416_pins: tca6416-pins {
33 pinctrl-single,pins = <
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/mediatek/
Dpumpkin-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 #include <dt-bindings/gpio/gpio.h>
16 stdout-path = "serial0:921600n8";
21 compatible = "linaro,optee-tz";
26 gpio-keys {
27 compatible = "gpio-keys";
28 input-name = "gpio-keys";
29 pinctrl-names = "default";
30 pinctrl-0 = <&gpio_keys_default>;
32 volume-up {
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/mediatek/
Dpumpkin-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 #include <dt-bindings/gpio/gpio.h>
16 stdout-path = "serial0:921600n8";
21 compatible = "linaro,optee-tz";
26 gpio-keys {
27 compatible = "gpio-keys";
28 pinctrl-names = "default";
29 pinctrl-0 = <&gpio_keys_default>;
31 key-volume-up {
35 wakeup-source;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/aspeed/
Daspeed-bmc-lenovo-hr630.dts1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2019-present Lenovo
8 /dts-v1/;
10 #include "aspeed-g5.dtsi"
11 #include <dt-bindings/gpio/aspeed-gpio.h>
15 compatible = "lenovo,hr630-bmc", "aspeed,ast2500";
29 stdout-path = &uart5;
38 reserved-memory {
39 #address-cells = <1>;
40 #size-cells = <1>;
[all …]

12345678910>>...42