| /kernel/linux/linux-5.10/arch/arm64/boot/dts/hisilicon/ |
| D | hi3798cv200.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
8 #include <dt-bindings/clock/histb-clock.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/phy/phy.h>
12 #include <dt-bindings/reset/ti-syscon.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
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| D | hikey970-pinctrl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/pinctrl/hisi.h>
10 range: gpio-range { label
11 #pinctrl-single,gpio-range-cells = <3>;
15 compatible = "pinctrl-single";
17 #pinctrl-cells = <1>;
18 #gpio-range-cells = <0x3>;
19 pinctrl-single,register-width = <0x20>;
20 pinctrl-single,function-mask = <0x7>;
21 /* pin base, nr pins & gpio function */
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| D | hi6220.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/reset/hisi,hi6220-resets.h>
10 #include <dt-bindings/clock/hi6220-clock.h>
11 #include <dt-bindings/pinctrl/hisi.h>
12 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
21 compatible = "arm,psci-0.2";
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| D | hikey960-pinctrl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
7 #include <dt-bindings/pinctrl/hisi.h>
12 range: gpio-range { label
13 #pinctrl-single,gpio-range-cells = <3>;
17 compatible = "pinctrl-single";
19 #pinctrl-cells = <1>;
20 #gpio-range-cells = <0x3>;
21 pinctrl-single,register-width = <0x20>;
22 pinctrl-single,function-mask = <0x7>;
23 /* pin base, nr pins & gpio function */
[all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/hisilicon/ |
| D | hi3798cv200.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
8 #include <dt-bindings/clock/histb-clock.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/phy/phy.h>
12 #include <dt-bindings/reset/ti-syscon.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
[all …]
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| D | hi6220.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/reset/hisi,hi6220-resets.h>
10 #include <dt-bindings/clock/hi6220-clock.h>
11 #include <dt-bindings/pinctrl/hisi.h>
12 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
21 compatible = "arm,psci-0.2";
[all …]
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| D | hikey960-pinctrl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
7 #include <dt-bindings/pinctrl/hisi.h>
12 range: gpio-range { label
13 #pinctrl-single,gpio-range-cells = <3>;
17 compatible = "pinctrl-single";
19 #pinctrl-cells = <1>;
20 #gpio-range-cells = <0x3>;
21 pinctrl-single,register-width = <0x20>;
22 pinctrl-single,function-mask = <0x7>;
23 /* pin base, nr pins & gpio function */
[all …]
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| /kernel/linux/linux-6.6/drivers/pinctrl/ |
| D | core.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2011-2012 ST-Ericsson SA
6 * Written on behalf of Linaro for ST-Ericsson
7 * Based on bits of regulator core, gpio core and clk core
32 #include "../gpio/gpiolib.h"
62 * pinctrl_provide_dummies() - indicate if pinctrl provides dummy state support
77 return pctldev->desc->name; in pinctrl_dev_get_name()
83 return dev_name(pctldev->dev); in pinctrl_dev_get_devname()
89 return pctldev->driver_data; in pinctrl_dev_get_drvdata()
94 * get_pinctrl_dev_from_devname() - look up pin controller device
[all …]
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| /kernel/linux/linux-5.10/drivers/pinctrl/ |
| D | core.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2011-2012 ST-Ericsson SA
6 * Written on behalf of Linaro for ST-Ericsson
7 * Based on bits of regulator core, gpio core and clk core
30 #include "../gpio/gpiolib.h"
31 #include <asm-generic/gpio.h>
62 * pinctrl_provide_dummies() - indicate if pinctrl provides dummy state support
77 return pctldev->desc->name; in pinctrl_dev_get_name()
83 return dev_name(pctldev->dev); in pinctrl_dev_get_devname()
89 return pctldev->driver_data; in pinctrl_dev_get_drvdata()
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/ |
| D | pinctrl-single.txt | 1 One-register-per-pin type device tree based pinctrl driver
4 - compatible : "pinctrl-single" or "pinconf-single".
5 "pinctrl-single" means that pinconf isn't supported.
6 "pinconf-single" means that generic pinconf is supported.
8 - reg : offset and length of the register set for the mux registers
10 - #pinctrl-cells : number of cells in addition to the index, set to 1
11 for pinctrl-single,pins and 2 for pinctrl-single,bits
13 - pinctrl-single,register-width : pinmux register access width in bits
15 - pinctrl-single,function-mask : mask of allowed pinmux function bits
19 - pinctrl-single,function-off : function off mode for disabled state if
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/ |
| D | pinctrl-single.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/pinctrl-single.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tony Lindgren <tony@atomide.com>
14 range of pin control registers can vary from one to many for each controller
21 - enum:
22 - pinctrl-single
23 - pinconf-single
24 - items:
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/hisilicon/ |
| D | hi3620.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2012-2013 HiSilicon Ltd.
6 * Copyright (C) 2012-2013 Linaro Ltd.
11 #include <dt-bindings/clock/hi3620-clock.h>
14 #address-cells = <1>;
15 #size-cells = <1>;
26 compatible = "fixed-clock";
27 #clock-cells = <0>;
28 clock-frequency = <26000000>;
29 clock-output-names = "apb_pclk";
[all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | hi3620.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2012-2013 Hisilicon Ltd.
6 * Copyright (C) 2012-2013 Linaro Ltd.
11 #include <dt-bindings/clock/hi3620-clock.h>
14 #address-cells = <1>;
15 #size-cells = <1>;
26 compatible = "fixed-clock";
27 #clock-cells = <0>;
28 clock-frequency = <26000000>;
29 clock-output-names = "apb_pclk";
[all …]
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| D | armada-xp-mv78260.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 #include "armada-xp.dtsi"
17 compatible = "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp";
26 #address-cells = <1>;
27 #size-cells = <0>;
28 enable-method = "marvell,armada-xp-smp";
32 compatible = "marvell,sheeva-v7";
35 clock-latency = <1000000>;
40 compatible = "marvell,sheeva-v7";
[all …]
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| D | armada-xp-mv78460.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 #include "armada-xp.dtsi"
17 compatible = "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp";
27 #address-cells = <1>;
28 #size-cells = <0>;
29 enable-method = "marvell,armada-xp-smp";
33 compatible = "marvell,sheeva-v7";
36 clock-latency = <1000000>;
41 compatible = "marvell,sheeva-v7";
[all …]
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| /kernel/linux/linux-5.10/drivers/staging/mt7621-pinctrl/ |
| D | pinctrl-rt2880.c | 1 // SPDX-License-Identifier: GPL-2.0
14 #include <linux/pinctrl/pinconf-generic.h>
19 #include <asm/mach-ralink/ralink_regs.h>
20 #include <asm/mach-ralink/pinmux.h>
21 #include <asm/mach-ralink/mt7620.h>
24 #include "pinctrl-utils.h"
42 u8 *gpio; member
50 return p->group_count; in rt2880_get_group_count()
58 return (group >= p->group_count) ? NULL : p->group_names[group]; in rt2880_get_group_name()
68 if (group >= p->group_count) in rt2880_get_group_pins()
[all …]
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| /kernel/linux/linux-5.10/include/linux/pinctrl/ |
| D | pinmux.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2011 ST-Ericsson SA
6 * Written on behalf of Linaro for ST-Ericsson
7 * Based on bits of regulator core, gpio core and clk core
21 * struct pinmux_ops - pinmux operations, to be implemented by pin controller
45 * @gpio_request_enable: requests and enables GPIO on a certain pin.
46 * Implement this only if you can mux every pin individually as GPIO. The
47 * affected GPIO range is passed along with an offset(pin number) into that
48 * specific GPIO range - function selectors and pin groups are orthogonal
50 * @gpio_disable_free: free up GPIO muxing on a certain pin, the reverse of
[all …]
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| /kernel/linux/linux-6.6/include/linux/pinctrl/ |
| D | pinmux.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2011 ST-Ericsson SA
6 * Written on behalf of Linaro for ST-Ericsson
7 * Based on bits of regulator core, gpio core and clk core
20 * struct pinmux_ops - pinmux operations, to be implemented by pin controller
44 * @gpio_request_enable: requests and enables GPIO on a certain pin.
45 * Implement this only if you can mux every pin individually as GPIO. The
46 * affected GPIO range is passed along with an offset(pin number) into that
47 * specific GPIO range - function selectors and pin groups are orthogonal
49 * @gpio_disable_free: free up GPIO muxing on a certain pin, the reverse of
[all …]
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| /kernel/linux/linux-6.6/Documentation/driver-api/ |
| D | pin-control.rst | 9 - Enumerating and naming controllable pins
11 - Multiplexing of pins, pads, fingers (etc) see below for details
13 - Configuration of pins, pads, fingers (etc), such as software-controlled
14 biasing and driving mode specific pins, such as pull-up, pull-down, open drain,
17 Top-level interface
22 - A PIN CONTROLLER is a piece of hardware, usually a set of registers, that
26 - PINS are equal to pads, fingers, balls or whatever packaging input or
28 in the range 0..maxpin. This numberspace is local to each PIN CONTROLLER, so
30 be sparse - i.e. there may be gaps in the space with numbers where no
60 .. code-block:: c
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| /kernel/linux/linux-5.10/Documentation/driver-api/ |
| D | pinctl.rst | 9 - Enumerating and naming controllable pins
11 - Multiplexing of pins, pads, fingers (etc) see below for details
13 - Configuration of pins, pads, fingers (etc), such as software-controlled
14 biasing and driving mode specific pins, such as pull-up/down, open drain,
17 Top-level interface
22 - A pin controller is a piece of hardware, usually a set of registers, that
28 - PINS are equal to pads, fingers, balls or whatever packaging input or
30 in the range 0..maxpin. This numberspace is local to each PIN CONTROLLER, so
32 be sparse - i.e. there may be gaps in the space with numbers where no
98 See for example arch/arm/mach-u300/Kconfig for an example.
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/iio/adc/ |
| D | adi,ad7606.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Beniamin Bia <beniamin.bia@analog.com>
11 - Stefan Popa <stefan.popa@analog.com>
15 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606_7606-6_7606-4.pdf
16 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7606B.pdf
17 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7616.pdf
22 - adi,ad7605-4
23 - adi,ad7606-8
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/iio/adc/ |
| D | adi,ad7606.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <michael.hennerich@analog.com>
14 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606_7606-6_7606-4.pdf
15 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7606B.pdf
16 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7616.pdf
21 - adi,ad7605-4
22 - adi,ad7606-8
23 - adi,ad7606-6
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/gpio/ |
| D | gpio.txt | 1 Specifying GPIO information for devices
5 -----------------
7 GPIO properties should be named "[<name>-]gpios", with <name> being the purpose
8 of this GPIO for the device. While a non-existent <name> is considered valid
10 for new bindings. Also, GPIO properties named "[<name>-]gpio" are valid and old
14 GPIO properties can contain one or more GPIO phandles, but only in exceptional
23 The following example could be used to describe GPIO pins used as device enable
24 and bit-banged data signals:
27 gpio-controller;
28 #gpio-cells = <2>;
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| /kernel/linux/linux-6.6/drivers/gpio/ |
| D | gpio-tangier.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Intel Tangier GPIO functions
15 #include <linux/gpio/driver.h>
34 * struct tng_wake_regs - Platform specific wake registers
46 * struct tng_gpio_pinrange - Map pin numbers to gpio numbers
47 * @gpio_base: Starting GPIO number of this range
48 * @pin_base: Starting pin number of this range
49 * @npins: Number of pins in this range
61 .npins = (gend) - (gstart) + 1, \
65 * struct tng_gpio_pin_info - Platform specific pinout information
[all …]
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| /kernel/linux/linux-5.10/drivers/staging/mt7621-pci/ |
| D | mediatek,mt7621-pci.txt | 4 - compatible: "mediatek,mt7621-pci"
5 - device_type: Must be "pci"
6 - reg: Base addresses and lengths of the PCIe subsys and root ports.
7 - bus-range: Range of bus numbers associated with this controller.
8 - #address-cells: Address representation for root ports (must be 3)
9 - pinctrl-names : The pin control state names.
10 - pinctrl-0: The "default" pinctrl state.
11 - #size-cells: Size representation for root ports (must be 2)
12 - ranges: Ranges for the PCI memory and I/O regions.
13 - #interrupt-cells: Must be 1
[all …]
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