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/kernel/linux/linux-5.10/arch/arm/boot/dts/
Domap5-uevm.dts76 gpios = <&gpio9 17 GPIO_ACTIVE_HIGH>;
83 gpios = <&gpio9 18 GPIO_ACTIVE_HIGH>;
90 gpios = <&gpio9 19 GPIO_ACTIVE_HIGH>;
97 gpios = <&gpio9 2 GPIO_ACTIVE_HIGH>;
104 gpios = <&gpio9 3 GPIO_ACTIVE_HIGH>;
111 gpios = <&gpio9 4 GPIO_ACTIVE_HIGH>;
118 gpios = <&gpio9 5 GPIO_ACTIVE_HIGH>;
125 gpios = <&gpio9 6 GPIO_ACTIVE_HIGH>;
149 gpio9: gpio@22 { label
186 gpios = <&gpio9 0 GPIO_ACTIVE_HIGH>, /* TCA6424A P01, CT CP HPD */
[all …]
Dvf610-zii-scu4-aib.dts315 los-gpios = <&gpio9 0 GPIO_ACTIVE_HIGH>;
322 los-gpios = <&gpio9 1 GPIO_ACTIVE_HIGH>;
329 los-gpios = <&gpio9 2 GPIO_ACTIVE_HIGH>;
336 los-gpios = <&gpio9 3 GPIO_ACTIVE_HIGH>;
343 los-gpios = <&gpio9 4 GPIO_ACTIVE_HIGH>;
350 los-gpios = <&gpio9 5 GPIO_ACTIVE_HIGH>;
357 los-gpios = <&gpio9 6 GPIO_ACTIVE_HIGH>;
364 los-gpios = <&gpio9 7 GPIO_ACTIVE_HIGH>;
371 los-gpios = <&gpio9 8 GPIO_ACTIVE_HIGH>;
378 los-gpios = <&gpio9 9 GPIO_ACTIVE_HIGH>;
[all …]
Dqcom-apq8064-pins.dtsi125 pins = "gpio8", "gpio9";
130 pins = "gpio8", "gpio9";
138 pins = "gpio8", "gpio9";
142 pins = "gpio8", "gpio9";
/kernel/linux/linux-6.6/arch/arm/boot/dts/ti/omap/
Domap5-uevm.dts76 gpios = <&gpio9 17 GPIO_ACTIVE_HIGH>;
83 gpios = <&gpio9 18 GPIO_ACTIVE_HIGH>;
90 gpios = <&gpio9 19 GPIO_ACTIVE_HIGH>;
97 gpios = <&gpio9 2 GPIO_ACTIVE_HIGH>;
104 gpios = <&gpio9 3 GPIO_ACTIVE_HIGH>;
111 gpios = <&gpio9 4 GPIO_ACTIVE_HIGH>;
118 gpios = <&gpio9 5 GPIO_ACTIVE_HIGH>;
125 gpios = <&gpio9 6 GPIO_ACTIVE_HIGH>;
149 gpio9: gpio@22 { label
186 gpios = <&gpio9 0 GPIO_ACTIVE_HIGH>, /* TCA6424A P01, CT CP HPD */
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/nxp/vf/
Dvf610-zii-scu4-aib.dts345 los-gpios = <&gpio9 0 GPIO_ACTIVE_HIGH>;
352 los-gpios = <&gpio9 1 GPIO_ACTIVE_HIGH>;
359 los-gpios = <&gpio9 2 GPIO_ACTIVE_HIGH>;
366 los-gpios = <&gpio9 3 GPIO_ACTIVE_HIGH>;
373 los-gpios = <&gpio9 4 GPIO_ACTIVE_HIGH>;
380 los-gpios = <&gpio9 5 GPIO_ACTIVE_HIGH>;
387 los-gpios = <&gpio9 6 GPIO_ACTIVE_HIGH>;
394 los-gpios = <&gpio9 7 GPIO_ACTIVE_HIGH>;
401 los-gpios = <&gpio9 8 GPIO_ACTIVE_HIGH>;
408 los-gpios = <&gpio9 9 GPIO_ACTIVE_HIGH>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/qcom/
Dqcom-apq8064-pins.dtsi125 pins = "gpio8", "gpio9";
130 pins = "gpio8", "gpio9";
138 pins = "gpio8", "gpio9";
142 pins = "gpio8", "gpio9";
/kernel/linux/linux-6.6/drivers/pinctrl/qcom/
Dpinctrl-sm8550-lpass-lpi.c89 PINCTRL_PIN(9, "gpio9"),
107 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
115 static const char * const dmic2_data_groups[] = { "gpio9" };
125 static const char * const i2s1_data_groups[] = { "gpio8", "gpio9" };
146 static const char * const ext_mclk1_b_groups[] = { "gpio9" };
Dpinctrl-sc8280xp-lpass-lpi.c78 PINCTRL_PIN(9, "gpio9"),
97 static const char * const dmic2_data_groups[] = { "gpio9" };
109 static const char * const i2s1_data_groups[] = { "gpio8", "gpio9" };
119 static const char * const ext_mclk1_b_groups[] = { "gpio9" };
Dpinctrl-sm8450-lpass-lpi.c89 PINCTRL_PIN(9, "gpio9"),
112 static const char * const dmic2_data_groups[] = { "gpio9" };
124 static const char * const i2s1_data_groups[] = { "gpio8", "gpio9" };
139 static const char * const ext_mclk1_b_groups[] = { "gpio9" };
Dpinctrl-sm8250-lpass-lpi.c64 PINCTRL_PIN(9, "gpio9"),
78 static const char * const dmic2_data_groups[] = { "gpio9" };
88 static const char * const i2s1_data_groups[] = { "gpio8", "gpio9" };
Dpinctrl-sm8350-lpass-lpi.c65 PINCTRL_PIN(9, "gpio9"),
80 static const char * const dmic2_data_groups[] = { "gpio9" };
90 static const char * const i2s1_data_groups[] = { "gpio8", "gpio9" };
Dpinctrl-sc7280-lpass-lpi.c65 PINCTRL_PIN(9, "gpio9"),
80 static const char * const dmic2_data_groups[] = { "gpio9" };
90 static const char * const i2s1_data_groups[] = { "gpio8", "gpio9" };
Dpinctrl-sm6115-lpass-lpi.c69 PINCTRL_PIN(9, "gpio9"),
84 static const char * const dmic23_data_groups[] = { "gpio9" };
86 static const char * const i2s1_data_groups[] = { "gpio8", "gpio9" };
Dpinctrl-ipq8074.c324 "gpio9", /* CS_CSR_LCD */
340 "gpio0", "gpio2", "gpio9", "gpio16",
348 "gpio0", "gpio2", "gpio9",
360 "gpio0", "gpio2", "gpio9", "gpio16",
412 "gpio9", "gpio16",
416 "gpio9", "gpio16",
420 "gpio9",
781 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
/kernel/linux/linux-6.6/drivers/net/wireless/realtek/rtlwifi/rtl8723be/
Dpwrseq.h91 /*Enable GPIO9 interrupt mode*/ \
94 /*Enable GPIO9 input mode*/ \
100 /*Enable HSISR GPIO9 interrupt*/ \
103 /*For GPIO9 internal pull high setting by test chip*/ \
106 /*For GPIO9 internal pull high setting*/ \
203 /*0x48[16] = 1 to enable GPIO9 as EXT WAKEUP*/ \
229 /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/ \
/kernel/linux/linux-5.10/drivers/net/wireless/realtek/rtlwifi/rtl8723be/
Dpwrseq.h91 /*Enable GPIO9 interrupt mode*/ \
94 /*Enable GPIO9 input mode*/ \
100 /*Enable HSISR GPIO9 interrupt*/ \
103 /*For GPIO9 internal pull high setting by test chip*/ \
106 /*For GPIO9 internal pull high setting*/ \
203 /*0x48[16] = 1 to enable GPIO9 as EXT WAKEUP*/ \
229 /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/ \
/kernel/linux/linux-5.10/drivers/pinctrl/
Dpinctrl-xway.c125 MFP_XWAY(GPIO9, GPIO, ASC, SPI, EXIN),
176 static const unsigned pins_asc0_cts_rts[] = {GPIO9, GPIO10};
203 static const unsigned xway_exin_pin_map[] = {GPIO0, GPIO1, GPIO2, GPIO39, GPIO46, GPIO9};
210 static const unsigned pins_exin5[] = {GPIO9};
217 static const unsigned pins_spi_cs5[] = {GPIO9};
361 MFP_XWAY(GPIO9, GPIO, SPI, MII, JTAG),
392 static const unsigned ase_pins_jtag[] = {GPIO7, GPIO8, GPIO9, GPIO10, GPIO11};
402 static const unsigned ase_pins_spi[] = {GPIO8, GPIO9, GPIO10}; /* DEPRECATED */
404 static const unsigned ase_pins_spi_do[] = {GPIO9};
489 MFP_XWAY(GPIO9, GPIO, ASC, SPI, MII),
[all …]
/kernel/linux/linux-6.6/drivers/pinctrl/
Dpinctrl-xway.c124 MFP_XWAY(GPIO9, GPIO, SPI, MII, JTAG),
155 static const unsigned ase_pins_jtag[] = {GPIO7, GPIO8, GPIO9, GPIO10, GPIO11};
165 static const unsigned ase_pins_spi[] = {GPIO8, GPIO9, GPIO10}; /* DEPRECATED */
167 static const unsigned ase_pins_spi_do[] = {GPIO9};
252 MFP_XWAY(GPIO9, GPIO, ASC, SPI, MII),
285 static const unsigned danube_pins_asc0_cts_rts[] = {GPIO9, GPIO10};
311 static const unsigned danube_pins_spi_cs5[] = {GPIO9};
427 MFP_XWAY(GPIO9, GPIO, ASC, SPI, EXIN),
476 static const unsigned xrx100_exin_pin_map[] = {GPIO0, GPIO1, GPIO2, GPIO39, GPIO10, GPIO9};
483 static const unsigned xrx100_pins_exin5[] = {GPIO9};
[all …]
/kernel/linux/linux-6.6/arch/mips/boot/dts/pic32/
Dpic32mzda.dtsi23 gpio9 = &gpio9;
215 gpio9: gpio9@1f860900 { label
/kernel/linux/linux-5.10/arch/mips/boot/dts/pic32/
Dpic32mzda.dtsi23 gpio9 = &gpio9;
215 gpio9: gpio9@1f860900 { label
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/
Dbrcm,bcm6318-pinctrl.yaml38 gpio8, gpio9, gpio10, gpio11, gpio12, gpio13, gpio40 ]
114 pins = "gpio9";
Dbrcm,bcm63268-pinctrl.yaml38 enum: [ gpio0, gpio1, gpio16, gpio17, gpio8, gpio9, gpio18, gpio19,
88 pins = "gpio9";
Dqcom,pmic-gpio.yaml416 - gpio1-gpio9 for pm6125
419 - gpio1-gpio9 for pm6350
436 - gpio1-gpio9 for pm8350c
461 - gpio1-gpio12 for pms405 (holes on gpio1, gpio9
/kernel/linux/linux-5.10/drivers/staging/rtl8723bs/include/
Dhal_pwr_seq.h59 …SK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1},/*Enable GPIO9 interrupt mode*/\
60 …B_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*Enable GPIO9 input mode*/\
62 …K, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1},/*Enable HSISR GPIO9 interrupt*/\
63 …MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, BIT3},/*For GPIO9 internal pull high…
64 …MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6, BIT6},/*For GPIO9 internal pull high…
106 …_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 1}, /*0x48[16] = 1 to enable GPIO9 as EXT WAKEUP*/ \
117 …MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0}, /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/ \
/kernel/linux/linux-6.6/drivers/staging/rtl8723bs/include/
Dhal_pwr_seq.h59 …SK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1},/*Enable GPIO9 interrupt mode*/\
60 …B_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*Enable GPIO9 input mode*/\
62 …K, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1},/*Enable HSISR GPIO9 interrupt*/\
63 …MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, BIT3},/*For GPIO9 internal pull high…
64 …MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6, BIT6},/*For GPIO9 internal pull high…
106 …_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 1}, /*0x48[16] = 1 to enable GPIO9 as EXT WAKEUP*/ \
117 …MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0}, /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/ \

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