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/kernel/linux/linux-5.10/drivers/gpu/drm/etnaviv/
Detnaviv_iommu_v2.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2016-2018 Etnaviv Project
7 #include <linux/dma-mapping.h>
32 unsigned short id; member
52 drm_mm_takedown(&context->mm); in etnaviv_iommuv2_free()
55 if (v2_context->stlb_cpu[i]) in etnaviv_iommuv2_free()
56 dma_free_wc(context->global->dev, SZ_4K, in etnaviv_iommuv2_free()
57 v2_context->stlb_cpu[i], in etnaviv_iommuv2_free()
58 v2_context->stlb_dma[i]); in etnaviv_iommuv2_free()
61 dma_free_wc(context->global->dev, SZ_4K, v2_context->mtlb_cpu, in etnaviv_iommuv2_free()
[all …]
Detnaviv_buffer.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2014-2018 Etnaviv Project
27 u32 *vaddr = (u32 *)buffer->vaddr; in OUT()
29 BUG_ON(buffer->user_size >= buffer->size); in OUT()
31 vaddr[buffer->user_size / 4] = data; in OUT()
32 buffer->user_size += 4; in OUT()
40 buffer->user_size = ALIGN(buffer->user_size, 8); in CMD_LOAD_STATE()
51 buffer->user_size = ALIGN(buffer->user_size, 8); in CMD_END()
58 buffer->user_size = ALIGN(buffer->user_size, 8); in CMD_WAIT()
66 buffer->user_size = ALIGN(buffer->user_size, 8); in CMD_LINK()
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/etnaviv/
Detnaviv_iommu_v2.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2016-2018 Etnaviv Project
7 #include <linux/dma-mapping.h>
32 unsigned short id; member
52 drm_mm_takedown(&context->mm); in etnaviv_iommuv2_free()
55 if (v2_context->stlb_cpu[i]) in etnaviv_iommuv2_free()
56 dma_free_wc(context->global->dev, SZ_4K, in etnaviv_iommuv2_free()
57 v2_context->stlb_cpu[i], in etnaviv_iommuv2_free()
58 v2_context->stlb_dma[i]); in etnaviv_iommuv2_free()
61 dma_free_wc(context->global->dev, SZ_4K, v2_context->mtlb_cpu, in etnaviv_iommuv2_free()
[all …]
Detnaviv_buffer.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2014-2018 Etnaviv Project
27 u32 *vaddr = (u32 *)buffer->vaddr; in OUT()
29 BUG_ON(buffer->user_size >= buffer->size); in OUT()
31 vaddr[buffer->user_size / 4] = data; in OUT()
32 buffer->user_size += 4; in OUT()
40 buffer->user_size = ALIGN(buffer->user_size, 8); in CMD_LOAD_STATE()
51 buffer->user_size = ALIGN(buffer->user_size, 8); in CMD_END()
59 buffer->user_size = ALIGN(buffer->user_size, 8); in CMD_WAIT()
67 buffer->user_size = ALIGN(buffer->user_size, 8); in CMD_LINK()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/msm/adreno/
Da5xx_preempt.c1 // SPDX-License-Identifier: GPL-2.0-only
15 enum preempt_state cur = atomic_cmpxchg(&a5xx_gpu->preempt_state, in try_preempt_state()
25 static inline void set_preempt_state(struct a5xx_gpu *gpu, in set_preempt_state() argument
34 atomic_set(&gpu->preempt_state, new); in set_preempt_state()
40 static inline void update_wptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in update_wptr() argument
48 spin_lock_irqsave(&ring->preempt_lock, flags); in update_wptr()
50 spin_unlock_irqrestore(&ring->preempt_lock, flags); in update_wptr()
52 gpu_write(gpu, REG_A5XX_CP_RB_WPTR, wptr); in update_wptr()
56 static struct msm_ringbuffer *get_next_ring(struct msm_gpu *gpu) in get_next_ring() argument
61 for (i = 0; i < gpu->nr_rings; i++) { in get_next_ring()
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/msm/adreno/
Da5xx_preempt.c1 // SPDX-License-Identifier: GPL-2.0-only
15 enum preempt_state cur = atomic_cmpxchg(&a5xx_gpu->preempt_state, in try_preempt_state()
25 static inline void set_preempt_state(struct a5xx_gpu *gpu, in set_preempt_state() argument
34 atomic_set(&gpu->preempt_state, new); in set_preempt_state()
40 static inline void update_wptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in update_wptr() argument
48 spin_lock_irqsave(&ring->preempt_lock, flags); in update_wptr()
50 spin_unlock_irqrestore(&ring->preempt_lock, flags); in update_wptr()
52 gpu_write(gpu, REG_A5XX_CP_RB_WPTR, wptr); in update_wptr()
56 static struct msm_ringbuffer *get_next_ring(struct msm_gpu *gpu) in get_next_ring() argument
58 struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); in get_next_ring()
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/msm/
Dmsm_ringbuffer.c1 // SPDX-License-Identifier: GPL-2.0-only
17 struct msm_fence_context *fctx = submit->ring->fctx; in msm_job_run()
18 struct msm_gpu *gpu = submit->gpu; in msm_job_run() local
19 struct msm_drm_private *priv = gpu->dev->dev_private; in msm_job_run()
22 msm_fence_init(submit->hw_fence, fctx); in msm_job_run()
24 mutex_lock(&priv->lru.lock); in msm_job_run()
26 for (i = 0; i < submit->nr_bos; i++) { in msm_job_run()
27 struct drm_gem_object *obj = submit->bos[i].obj; in msm_job_run()
30 submit->bos[i].flags &= ~BO_PINNED; in msm_job_run()
33 mutex_unlock(&priv->lru.lock); in msm_job_run()
[all …]
Dmsm_gpu.h1 /* SPDX-License-Identifier: GPL-2.0-only */
10 #include <linux/adreno-smmu-priv.h>
47 int (*get_param)(struct msm_gpu *gpu, struct msm_file_private *ctx,
49 int (*set_param)(struct msm_gpu *gpu, struct msm_file_private *ctx,
51 int (*hw_init)(struct msm_gpu *gpu);
56 int (*ucode_load)(struct msm_gpu *gpu);
58 int (*pm_suspend)(struct msm_gpu *gpu);
59 int (*pm_resume)(struct msm_gpu *gpu);
60 void (*submit)(struct msm_gpu *gpu, struct msm_gem_submit *submit);
61 void (*flush)(struct msm_gpu *gpu, struct msm_ringbuffer *ring);
[all …]
Dmsm_submitqueue.c1 // SPDX-License-Identifier: GPL-2.0-only
11 struct msm_gpu *gpu, int sysprof) in msm_file_private_set_sysprof() argument
21 return -EINVAL; in msm_file_private_set_sysprof()
23 pm_runtime_get_sync(&gpu->pdev->dev); in msm_file_private_set_sysprof()
26 refcount_inc(&gpu->sysprof_active); in msm_file_private_set_sysprof()
33 switch (ctx->sysprof) { in msm_file_private_set_sysprof()
35 pm_runtime_put_autosuspend(&gpu->pdev->dev); in msm_file_private_set_sysprof()
38 refcount_dec(&gpu->sysprof_active); in msm_file_private_set_sysprof()
44 ctx->sysprof = sysprof; in msm_file_private_set_sysprof()
55 for (i = 0; i < ARRAY_SIZE(ctx->entities); i++) { in __msm_file_private_destroy()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/msm/
Dmsm_ringbuffer.c1 // SPDX-License-Identifier: GPL-2.0-only
10 struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int id, in msm_ringbuffer_new() argument
22 ret = -ENOMEM; in msm_ringbuffer_new()
26 ring->gpu = gpu; in msm_ringbuffer_new()
27 ring->id = id; in msm_ringbuffer_new()
29 ring->start = msm_gem_kernel_new(gpu->dev, MSM_GPU_RINGBUFFER_SZ, in msm_ringbuffer_new()
30 check_apriv(gpu, MSM_BO_WC | MSM_BO_GPU_READONLY), in msm_ringbuffer_new()
31 gpu->aspace, &ring->bo, &ring->iova); in msm_ringbuffer_new()
33 if (IS_ERR(ring->start)) { in msm_ringbuffer_new()
34 ret = PTR_ERR(ring->start); in msm_ringbuffer_new()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/vga/
Dvga_switcheroo.c2 * vga_switcheroo.c - Support for laptop with dual GPU using one set of outputs
33 #include <linux/apple-gmux.h>
66 * for the inactive GPU.) Also, muxes are often used to cut power to the
67 * discrete GPU while it is not used.
71 * handler to control the power state of the discrete GPU, its ->switchto
72 * callback is a no-op for obvious reasons. The discrete GPU is often equipped
75 * suspend/resume order when changing the discrete GPU's power state. In total
77 * client (on the discrete GPU). The code is mostly prepared to support
80 * The GPU to which the outputs are currently switched is called the
81 * active client in vga_switcheroo parlance. The GPU not in use is the
[all …]
/kernel/linux/linux-6.6/drivers/gpu/vga/
Dvga_switcheroo.c2 * vga_switcheroo.c - Support for laptop with dual GPU using one set of outputs
33 #include <linux/apple-gmux.h>
66 * for the inactive GPU.) Also, muxes are often used to cut power to the
67 * discrete GPU while it is not used.
71 * handler to control the power state of the discrete GPU, its ->switchto
72 * callback is a no-op for obvious reasons. The discrete GPU is often equipped
75 * suspend/resume order when changing the discrete GPU's power state. In total
77 * client (on the discrete GPU). The code is mostly prepared to support
80 * The GPU to which the outputs are currently switched is called the
81 * active client in vga_switcheroo parlance. The GPU not in use is the
[all …]
/kernel/linux/linux-6.6/Documentation/admin-guide/perf/
Dnvidia-pmu.rst9 * NVLink-C2C0
10 * NVLink-C2C1
15 ----------
19 PMUs are managed by a common driver "arm-cs-arch-pmu". This driver describes
22 the driver provides "cpumask" sysfs attribute to show the CPU id used to handle
29 -------
32 strongly-ordered (SO) PCIE write traffic to local/remote memory. Please see
37 see /sys/bus/event_sources/devices/nvidia_scf_pmu_<socket-id>.
41 * Count event id 0x0 in socket 0::
43 perf stat -a -e nvidia_scf_pmu_0/event=0x0/
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/radeon/
Dradeon_atpx_handler.c1 // SPDX-License-Identifier: GPL-2.0-only
37 /* handle for device - and atpx */
81 * radeon_atpx_call - call an ATPX method
106 atpx_arg_elements[1].buffer.length = params->length; in radeon_atpx_call()
107 atpx_arg_elements[1].buffer.pointer = params->pointer; in radeon_atpx_call()
128 * radeon_atpx_parse_functions - parse supported functions
139 f->px_params = mask & ATPX_GET_PX_PARAMETERS_SUPPORTED; in radeon_atpx_parse_functions()
140 f->power_cntl = mask & ATPX_POWER_CONTROL_SUPPORTED; in radeon_atpx_parse_functions()
141 f->disp_mux_cntl = mask & ATPX_DISPLAY_MUX_CONTROL_SUPPORTED; in radeon_atpx_parse_functions()
142 f->i2c_mux_cntl = mask & ATPX_I2C_MUX_CONTROL_SUPPORTED; in radeon_atpx_parse_functions()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/
Dradeon_atpx_handler.c1 // SPDX-License-Identifier: GPL-2.0-only
37 /* handle for device - and atpx */
81 * radeon_atpx_call - call an ATPX method
106 atpx_arg_elements[1].buffer.length = params->length; in radeon_atpx_call()
107 atpx_arg_elements[1].buffer.pointer = params->pointer; in radeon_atpx_call()
128 * radeon_atpx_parse_functions - parse supported functions
139 f->px_params = mask & ATPX_GET_PX_PARAMETERS_SUPPORTED; in radeon_atpx_parse_functions()
140 f->power_cntl = mask & ATPX_POWER_CONTROL_SUPPORTED; in radeon_atpx_parse_functions()
141 f->disp_mux_cntl = mask & ATPX_DISPLAY_MUX_CONTROL_SUPPORTED; in radeon_atpx_parse_functions()
142 f->i2c_mux_cntl = mask & ATPX_I2C_MUX_CONTROL_SUPPORTED; in radeon_atpx_parse_functions()
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/gvt/
Dvgpu.c2 * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
40 struct drm_i915_private *i915 = vgpu->gvt->gt->i915; in populate_pvinfo_page()
46 vgpu_vreg_t(vgpu, vgtif_reg(vgt_id)) = vgpu->id; in populate_pvinfo_page()
66 gvt_dbg_core("Populate PVINFO PAGE for vGPU %d\n", vgpu->id); in populate_pvinfo_page()
73 drm_WARN_ON(&i915->drm, sizeof(struct vgt_if) != VGT_PVINFO_SIZE); in populate_pvinfo_page()
77 * vGPU type name is defined as GVTg_Vx_y which contains the physical GPU
82 * vGPU on same physical GPU depending on available resource. Each vGPU
98 * intel_gvt_init_vgpu_types - initialize vGPU type list
106 unsigned int low_avail = gvt_aperture_sz(gvt) - HOST_LOW_GM_SIZE; in intel_gvt_init_vgpu_types()
107 unsigned int high_avail = gvt_hidden_sz(gvt) - HOST_HIGH_GM_SIZE; in intel_gvt_init_vgpu_types()
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/msm/
Dgpu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $id: http://devicetree.org/schemas/display/msm/gpu.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Rob Clark <robdclark@gmail.com>
16 - description: |
18 figure out the chip-id.
20- pattern: '^qcom,adreno-[0-9a-f][0-9a-f][0-9a-f][0-9a-f][0-9a-f][0-9a-f][0-9a-f][0-9a-f]$'
21 - const: qcom,adreno
22 - description: |
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gvt/
Dvgpu.c2 * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
40 struct drm_i915_private *i915 = vgpu->gvt->gt->i915; in populate_pvinfo_page()
46 vgpu_vreg_t(vgpu, vgtif_reg(vgt_id)) = vgpu->id; in populate_pvinfo_page()
66 gvt_dbg_core("Populate PVINFO PAGE for vGPU %d\n", vgpu->id); in populate_pvinfo_page()
73 drm_WARN_ON(&i915->drm, sizeof(struct vgt_if) != VGT_PVINFO_SIZE); in populate_pvinfo_page()
85 /* A vGPU with a weight of 8 will get twice as much GPU as a vGPU
101 * intel_gvt_init_vgpu_types - initialize vGPU type list
114 * physical GPU generation type (e.g V4 as BDW server, V5 as in intel_gvt_init_vgpu_types()
119 * different types of vGPU on same physical GPU depending on in intel_gvt_init_vgpu_types()
125 low_avail = gvt_aperture_sz(gvt) - HOST_LOW_GM_SIZE; in intel_gvt_init_vgpu_types()
[all …]
/kernel/linux/linux-6.6/Documentation/gpu/
Dmsm-crash-dump.rst7 Following a GPU hang the MSM driver outputs debugging information via
14 by a (-).
17 --------
35 ID of the GPU that generated the crash formatted as
38 rbbm-status
39 The current value of RBBM_STATUS which shows what top level GPU
44 identified with an id number.
46 id
47 Ringbuffer ID (0 based index). Each ringbuffer in the section
48 will have its own unique id.
[all …]
/kernel/linux/linux-5.10/Documentation/gpu/
Dmsm-crash-dump.rst7 Following a GPU hang the MSM driver outputs debugging information via
14 by a (-).
17 --------
35 ID of the GPU that generated the crash formatted as
38 rbbm-status
39 The current value of RBBM_STATUS which shows what top level GPU
44 identified with an id number.
46 id
47 Ringbuffer ID (0 based index). Each ringbuffer in the section
48 will have its own unique id.
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
Damdgpu_atpx_handler.c1 // SPDX-License-Identifier: GPL-2.0-only
48 /* handle for device - and atpx */
99 * amdgpu_atpx_call - call an ATPX method
124 atpx_arg_elements[1].buffer.length = params->length; in amdgpu_atpx_call()
125 atpx_arg_elements[1].buffer.pointer = params->pointer; in amdgpu_atpx_call()
146 * amdgpu_atpx_parse_functions - parse supported functions
157 f->px_params = mask & ATPX_GET_PX_PARAMETERS_SUPPORTED; in amdgpu_atpx_parse_functions()
158 f->power_cntl = mask & ATPX_POWER_CONTROL_SUPPORTED; in amdgpu_atpx_parse_functions()
159 f->disp_mux_cntl = mask & ATPX_DISPLAY_MUX_CONTROL_SUPPORTED; in amdgpu_atpx_parse_functions()
160 f->i2c_mux_cntl = mask & ATPX_I2C_MUX_CONTROL_SUPPORTED; in amdgpu_atpx_parse_functions()
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
Damdgpu_atpx_handler.c1 // SPDX-License-Identifier: GPL-2.0-only
49 /* handle for device - and atpx */
105 * amdgpu_atpx_call - call an ATPX method
130 atpx_arg_elements[1].buffer.length = params->length; in amdgpu_atpx_call()
131 atpx_arg_elements[1].buffer.pointer = params->pointer; in amdgpu_atpx_call()
152 * amdgpu_atpx_parse_functions - parse supported functions
163 f->px_params = mask & ATPX_GET_PX_PARAMETERS_SUPPORTED; in amdgpu_atpx_parse_functions()
164 f->power_cntl = mask & ATPX_POWER_CONTROL_SUPPORTED; in amdgpu_atpx_parse_functions()
165 f->disp_mux_cntl = mask & ATPX_DISPLAY_MUX_CONTROL_SUPPORTED; in amdgpu_atpx_parse_functions()
166 f->i2c_mux_cntl = mask & ATPX_I2C_MUX_CONTROL_SUPPORTED; in amdgpu_atpx_parse_functions()
[all …]
/kernel/linux/linux-5.10/include/linux/
Dvga_switcheroo.h2 * vga_switcheroo.h - Support for laptop with dual GPU using one set of outputs
39 * enum vga_switcheroo_handler_flags_t - handler flags bitmask
45 * GPU needs to train the link and communicate the link parameters to the
46 * inactive GPU (mediated by vga_switcheroo). The inactive GPU may then
47 * skip the AUX handshake and set up its output with these pre-calibrated
59 * enum vga_switcheroo_state - client power state
76 * enum vga_switcheroo_client_id - client identifier
78 * Determining the id requires the handler, so GPUs are given their
79 * true id in a delayed fashion in vga_switcheroo_enable()
94 * struct vga_switcheroo_handler - handler callbacks
[all …]
/kernel/linux/linux-6.6/include/linux/
Dvga_switcheroo.h2 * vga_switcheroo.h - Support for laptop with dual GPU using one set of outputs
39 * enum vga_switcheroo_handler_flags_t - handler flags bitmask
45 * GPU needs to train the link and communicate the link parameters to the
46 * inactive GPU (mediated by vga_switcheroo). The inactive GPU may then
47 * skip the AUX handshake and set up its output with these pre-calibrated
59 * enum vga_switcheroo_state - client power state
76 * enum vga_switcheroo_client_id - client identifier
78 * Determining the id requires the handler, so GPUs are given their
79 * true id in a delayed fashion in vga_switcheroo_enable()
94 * struct vga_switcheroo_handler - handler callbacks
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdkfd/
Dkfd_topology.c42 /* topology_device_list - Master list of all topology devices */
58 if (top_dev->proximity_domain == proximity_domain) { in kfd_topology_device_by_proximity_domain()
76 if (top_dev->gpu_id == gpu_id) { in kfd_topology_device_by_id()
94 return top_dev->gpu; in kfd_device_by_id()
105 if (top_dev->gpu && top_dev->gpu->pdev == pdev) { in kfd_device_by_pci_dev()
106 device = top_dev->gpu; in kfd_device_by_pci_dev()
123 if (top_dev->gpu && top_dev->gpu->kgd == kgd) { in kfd_device_by_kgd()
124 device = top_dev->gpu; in kfd_device_by_kgd()
141 list_del(&dev->list); in kfd_release_topology_device()
143 while (dev->mem_props.next != &dev->mem_props) { in kfd_release_topology_device()
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