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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/msm/
Dhdmi.txt1 Qualcomm adreno/snapdragon hdmi output
4 - compatible: one of the following
5 * "qcom,hdmi-tx-8996"
6 * "qcom,hdmi-tx-8994"
7 * "qcom,hdmi-tx-8084"
8 * "qcom,hdmi-tx-8974"
9 * "qcom,hdmi-tx-8660"
10 * "qcom,hdmi-tx-8960"
11 - reg: Physical base address and length of the controller's registers
12 - reg-names: "core_physical"
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/bridge/
Drenesas,dw-hdmi.txt1 Renesas Gen3 DWC HDMI TX Encoder
4 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
7 These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
9 following device-specific properties.
14 - compatible : Shall contain one or more of
15 - "renesas,r8a774a1-hdmi" for R8A774A1 (RZ/G2M) compatible HDMI TX
16 - "renesas,r8a774b1-hdmi" for R8A774B1 (RZ/G2N) compatible HDMI TX
17 - "renesas,r8a774e1-hdmi" for R8A774E1 (RZ/G2H) compatible HDMI TX
18 - "renesas,r8a7795-hdmi" for R8A7795 (R-Car H3) compatible HDMI TX
19 - "renesas,r8a7796-hdmi" for R8A7796 (R-Car M3-W) compatible HDMI TX
[all …]
Ddw_hdmi.txt1 Synopsys DesignWare HDMI TX Encoder
4 This document defines device tree properties for the Synopsys DesignWare HDMI
5 TX Encoder (DWC HDMI TX). It doesn't constitue a device tree binding
6 specification by itself but is meant to be referenced by platform-specific
13 - reg: Memory mapped base address and length of the DWC HDMI TX registers.
15 - reg-io-width: Width of the registers specified by the reg property. The
19 - interrupts: Reference to the DWC HDMI TX interrupt.
21 - clocks: References to all the clocks specified in the clock-names property
22 as specified in Documentation/devicetree/bindings/clock/clock-bindings.txt.
24 - clock-names: The DWC HDMI TX uses the following clocks.
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/msm/
Dhdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $id: http://devicetree.org/schemas/display/msm/hdmi.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Qualcomm Adreno/Snapdragon HDMI output
11 - Rob Clark <robdclark@gmail.com>
16 - qcom,hdmi-tx-8084
17 - qcom,hdmi-tx-8660
18 - qcom,hdmi-tx-8960
19 - qcom,hdmi-tx-8974
[all …]
Dqcom,mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
11 - Rob Clark <robdclark@gmail.com>
15 encapsulates sub-blocks like MDP5, DSI, HDMI, eDP, etc.
19 pattern: "^display-subsystem@[0-9a-f]+$"
23 - qcom,mdss
29 reg-names:
32 - const: mdss_phys
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/phy/
Damlogic,meson8-hdmi-tx-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/amlogic,meson8-hdmi-tx-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Amlogic Meson8, Meson8b and Meson8m2 HDMI TX PHY
10 - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
13 The HDMI TX PHY node should be the child of a syscon node with the
16 compatible = "amlogic,meson-hhi-sysctrl", "simple-mfd", "syscon"
23 pattern: "^hdmi-phy@[0-9a-f]+$"
27 - items:
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Dmediatek,hdmi-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/phy/mediatek,hdmi-phy.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: MediaTek High Definition Multimedia Interface (HDMI) PHY
11 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
12 - Philipp Zabel <p.zabel@pengutronix.de>
13 - Chunfeng Yun <chunfeng.yun@mediatek.com>
16 The HDMI PHY serializes the HDMI encoder's three channel 10-bit parallel
17 output and drives the HDMI pads.
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/bridge/
Drenesas,dw-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/renesas,dw-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car DWC HDMI TX Encoder
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
13 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
17 - $ref: synopsys,dw-hdmi.yaml#
22 - enum:
23 - renesas,r8a774a1-hdmi # for RZ/G2M compatible HDMI TX
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Dsynopsys,dw-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/synopsys,dw-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Common Properties for Synopsys DesignWare HDMI TX Controller
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
13 This document defines device tree properties for the Synopsys DesignWare HDMI
14 TX controller (DWC HDMI TX) IP core. It doesn't constitute a full device tree
16 bindings for the platform-specific integrations of the DWC HDMI TX.
26 reg-io-width:
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/rockchip/
Drockchip,dw-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip DWC HDMI TX Encoder
10 - Mark Yao <markyao0591@gmail.com>
13 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
17 - $ref: ../bridge/synopsys,dw-hdmi.yaml#
22 - rockchip,rk3228-dw-hdmi
23 - rockchip,rk3288-dw-hdmi
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/
Dallwinner,sun4i-a10-hdmi.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 HDMI Controller Device Tree Bindings
10 The HDMI Encoder supports the HDMI video and audio outputs, and does
14 - Chen-Yu Tsai <wens@csie.org>
15 - Maxime Ripard <mripard@kernel.org>
20 - const: allwinner,sun4i-a10-hdmi
21 - const: allwinner,sun5i-a10s-hdmi
[all …]
Dallwinner,sun8i-a83t-dw-hdmi.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun8i-a83t-dw-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A83t DWC HDMI TX Encoder Device Tree Bindings
10 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller
14 These DT bindings follow the Synopsys DWC HDMI TX bindings defined
16 the following device-specific properties.
19 - Chen-Yu Tsai <wens@csie.org>
20 - Maxime Ripard <mripard@kernel.org>
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/
Dallwinner,sun4i-a10-hdmi.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 HDMI Controller
10 The HDMI Encoder supports the HDMI video and audio outputs, and does
14 - Chen-Yu Tsai <wens@csie.org>
15 - Maxime Ripard <mripard@kernel.org>
20 - const: allwinner,sun4i-a10-hdmi
21 - const: allwinner,sun5i-a10s-hdmi
[all …]
Dallwinner,sun8i-a83t-dw-hdmi.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun8i-a83t-dw-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A83t DWC HDMI TX Encoder
10 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller
14 These DT bindings follow the Synopsys DWC HDMI TX bindings defined
15 in bridge/synopsys,dw-hdmi.yaml with the following device-specific
19 - Chen-Yu Tsai <wens@csie.org>
20 - Maxime Ripard <mripard@kernel.org>
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/soc/imx/
Dfsl,imx8mp-hdmi-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MP HDMI blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MP HDMMI blk-ctrl is a top-level peripheral providing access to
15 peripherals located in the HDMI domain of the SoC.
20 - const: fsl,imx8mp-hdmi-blk-ctrl
21 - const: syscon
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/imx/
Dhdmi.txt1 Freescale i.MX6 DWC HDMI TX Encoder
4 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
7 These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
9 following device-specific properties.
14 - compatible : Shall be one of "fsl,imx6q-hdmi" or "fsl,imx6dl-hdmi".
15 - reg: See dw_hdmi.txt.
16 - interrupts: HDMI interrupt number
17 - clocks: See dw_hdmi.txt.
18 - clock-names: Shall contain "iahb" and "isfr" as defined in dw_hdmi.txt.
19 - ports: See dw_hdmi.txt. The DWC HDMI shall have between one and four ports,
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/rockchip/
Ddw_hdmi-rockchip.txt1 Rockchip DWC HDMI TX Encoder
4 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
7 These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
9 following device-specific properties.
14 - compatible: should be one of the following:
15 "rockchip,rk3228-dw-hdmi"
16 "rockchip,rk3288-dw-hdmi"
17 "rockchip,rk3328-dw-hdmi"
18 "rockchip,rk3399-dw-hdmi"
19 - reg: See dw_hdmi.txt.
[all …]
/kernel/linux/linux-6.6/drivers/media/i2c/adv748x/
Dadv748x-csi2.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Driver for Analog Devices ADV748X CSI-2 Transmitter
11 #include <media/v4l2-ctrls.h>
12 #include <media/v4l2-device.h>
13 #include <media/v4l2-ioctl.h>
17 int adv748x_csi2_set_virtual_channel(struct adv748x_csi2 *tx, unsigned int vc) in adv748x_csi2_set_virtual_channel() argument
19 return tx_write(tx, ADV748X_CSI_VC_REF, vc << ADV748X_CSI_VC_REF_SHIFT); in adv748x_csi2_set_virtual_channel()
25 * @tx: CSI2 private entity
28 * @src_pad: Pad number of source to link to this @tx
34 static int adv748x_csi2_register_link(struct adv748x_csi2 *tx, in adv748x_csi2_register_link() argument
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/msm/hdmi/
Dhdmi.c1 // SPDX-License-Identifier: GPL-2.0-only
16 #include <sound/hdmi-codec.h>
17 #include "hdmi.h"
19 void msm_hdmi_set_mode(struct hdmi *hdmi, bool power_on) in msm_hdmi_set_mode() argument
24 spin_lock_irqsave(&hdmi->reg_lock, flags); in msm_hdmi_set_mode()
27 if (!hdmi->hdmi_mode) { in msm_hdmi_set_mode()
29 hdmi_write(hdmi, REG_HDMI_CTRL, ctrl); in msm_hdmi_set_mode()
38 hdmi_write(hdmi, REG_HDMI_CTRL, ctrl); in msm_hdmi_set_mode()
39 spin_unlock_irqrestore(&hdmi->reg_lock, flags); in msm_hdmi_set_mode()
40 DBG("HDMI Core: %s, HDMI_CTRL=0x%08x", in msm_hdmi_set_mode()
[all …]
/kernel/linux/linux-5.10/drivers/media/i2c/adv748x/
Dadv748x-csi2.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Driver for Analog Devices ADV748X CSI-2 Transmitter
11 #include <media/v4l2-ctrls.h>
12 #include <media/v4l2-device.h>
13 #include <media/v4l2-ioctl.h>
17 static int adv748x_csi2_set_virtual_channel(struct adv748x_csi2 *tx, in adv748x_csi2_set_virtual_channel() argument
20 return tx_write(tx, ADV748X_CSI_VC_REF, vc << ADV748X_CSI_VC_REF_SHIFT); in adv748x_csi2_set_virtual_channel()
26 * @tx: CSI2 private entity
29 * @src_pad: Pad number of source to link to this @tx
35 static int adv748x_csi2_register_link(struct adv748x_csi2 *tx, in adv748x_csi2_register_link() argument
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/msm/hdmi/
Dhdmi.c1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <sound/hdmi-codec.h>
14 #include "hdmi.h"
16 void msm_hdmi_set_mode(struct hdmi *hdmi, bool power_on) in msm_hdmi_set_mode() argument
21 spin_lock_irqsave(&hdmi->reg_lock, flags); in msm_hdmi_set_mode()
24 if (!hdmi->hdmi_mode) { in msm_hdmi_set_mode()
26 hdmi_write(hdmi, REG_HDMI_CTRL, ctrl); in msm_hdmi_set_mode()
35 hdmi_write(hdmi, REG_HDMI_CTRL, ctrl); in msm_hdmi_set_mode()
36 spin_unlock_irqrestore(&hdmi->reg_lock, flags); in msm_hdmi_set_mode()
37 DBG("HDMI Core: %s, HDMI_CTRL=0x%08x", in msm_hdmi_set_mode()
[all …]
/kernel/linux/linux-6.6/sound/soc/fsl/
Dimx-hdmi.c1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright 2017-2020 NXP
8 #include <sound/hdmi-codec.h>
12 * struct cpu_priv - CPU private data
16 * Note: [1] for tx and [0] for rx
35 struct snd_soc_pcm_runtime *rtd = substream->private_data; in imx_hdmi_hw_params()
36 struct imx_hdmi_data *data = snd_soc_card_get_drvdata(rtd->card); in imx_hdmi_hw_params()
37 bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK; in imx_hdmi_hw_params() local
39 struct snd_soc_card *card = rtd->card; in imx_hdmi_hw_params()
40 struct device *dev = card->dev; in imx_hdmi_hw_params()
[all …]
/kernel/linux/linux-5.10/sound/soc/qcom/
Dlpass.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2010-2011,2013-2015,2020 The Linux Foundation. All rights reserved.
5 * lpass.h - Definitions for the QTi LPASS
15 #include <dt-bindings/sound/qcom,lpass.h>
16 #include "lpass-hdmi.h"
27 return -EINVAL; \
58 /* AHB-I/X bus clocks inside the low-power audio subsystem (LPASS) */
76 /* low-power audio interface (LPAIF) registers */
80 /* regmap backed by the low-power audio interface (LPAIF) registers */
84 /* interrupts from the low-power audio interface (LPAIF) */
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/imx/
Dfsl,imx6-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx6-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX6 DWC HDMI TX Encoder
10 - Philipp Zabel <p.zabel@pengutronix.de>
13 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
17 - $ref: ../bridge/synopsys,dw-hdmi.yaml#
22 - fsl,imx6dl-hdmi
23 - fsl,imx6q-hdmi
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/sun4i/
Dsun4i_hdmi_i2c.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com>
25 static int fifo_transfer(struct sun4i_hdmi *hdmi, u8 *buf, int len, bool read) in fifo_transfer() argument
41 (hdmi->variant->ddc_fifo_thres_incl ? 0 : 1); in fifo_transfer()
45 * For TX the threshold is for an empty FIFO. in fifo_transfer()
50 if (regmap_field_read_poll_timeout(hdmi->field_ddc_int_status, reg, in fifo_transfer()
53 return -ETIMEDOUT; in fifo_transfer()
56 return -EIO; in fifo_transfer()
59 readsb(hdmi->base + hdmi->variant->ddc_fifo_reg, buf, len); in fifo_transfer()
61 writesb(hdmi->base + hdmi->variant->ddc_fifo_reg, buf, len); in fifo_transfer()
[all …]

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