| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/i3c/ |
| D | i3c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
11 - Miquel Raynal <miquel.raynal@bootlin.com>
15 and a set of child nodes for each I2C or I3C slave on the bus. Each of them
20 pattern: "^i3c-master@[0-9a-f]+$"
22 "#address-cells":
25 Each I2C device connected to the bus should be described in a subnode.
35 this I3C device has a static I2C address and we want to assign it a
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/i3c/ |
| D | i3c.txt | 8 -------------------
10 - #address-cells - should be <3>. Read more about addresses below.
11 - #size-cells - should be <0>.
12 - compatible - name of the I3C master controller driving the I3C bus
16 The node describing an I3C bus should be named i3c-master.
19 -------------------
24 - i3c-scl-hz: frequency of the SCL signal used for I3C transfers.
27 - i2c-scl-hz: frequency of the SCL signal used for I2C transfers.
29 values of I2C devices described in the device tree to determine
30 the maximum I2C frequency.
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| D | cdns,i3c-master.txt | 5 --------------------
6 - compatible: shall be "cdns,i3c-master"
7 - clocks: shall reference the pclk and sysclk
8 - clock-names: shall contain "pclk" and "sysclk"
9 - interrupts: the interrupt line connected to this I3C master
10 - reg: I3C master registers
15 - #address-cells: shall be set to 1
16 - #size-cells: shall be set to 0
21 - i2c-scl-hz
22 - i3c-scl-hz
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| D | snps,dw-i3c-master.txt | 5 --------------------
6 - compatible: shall be "snps,dw-i3c-master-1.00a"
7 - clocks: shall reference the core_clk
8 - interrupts: the interrupt line connected to this I3C master
9 - reg: Offset and length of I3C master registers
14 - #address-cells: shall be set to 3
15 - #size-cells: shall be set to 0
20 - i2c-scl-hz
21 - i3c-scl-hz
28 i3c-master@2000 {
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/i2c/ |
| D | i2c.txt | 1 Generic device tree bindings for I2C busses
4 This document describes generic bindings which can be used to describe I2C
8 -----------------------------
10 - #address-cells - should be <1>. Read more about addresses below.
11 - #size-cells - should be <0>.
12 - compatible - name of I2C bus controller
17 The cells properties above define that an address of children of an I2C bus
21 -----------------------------
26 - clock-frequency
27 frequency of bus clock in Hz.
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| D | st,stm32-i2c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/st,stm32-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: I2C controller embedded in STMicroelectronics STM32 I2C platform
10 - Pierre-Yves MORDRET <pierre-yves.mordret@foss.st.com>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
14 - if:
19 - st,stm32f7-i2c
20 - st,stm32mp13-i2c
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| D | i2c-rk3x.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-rk3x.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip RK3xxx I2C controller
10 This driver interfaces with the native I2C controller present in Rockchip
14 - $ref: /schemas/i2c/i2c-controller.yaml#
17 - Heiko Stuebner <heiko@sntech.de>
23 - const: rockchip,rv1108-i2c
24 - const: rockchip,rk3066-i2c
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| D | renesas,rcar-i2c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/renesas,rcar-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car I2C Controller
10 - Wolfram Sang <wsa+renesas@sang-engineering.com>
15 - items:
16 - enum:
17 - renesas,i2c-r8a7778 # R-Car M1A
18 - renesas,i2c-r8a7779 # R-Car H1
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| D | snps,designware-i2c.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/i2c/snps,designware-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare APB I2C Controller
10 - Jarkko Nikula <jarkko.nikula@linux.intel.com>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
14 - if:
19 const: mscc,ocelot-i2c
28 - description: Generic Synopsys DesignWare I2C controller
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| D | i2c-mt65xx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mt65xx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek I2C controller
10 This driver interfaces with the native I2C controller present in
14 - $ref: /schemas/i2c/i2c-controller.yaml#
17 - Qii Wang <qii.wang@mediatek.com>
22 - const: mediatek,mt2712-i2c
23 - const: mediatek,mt6577-i2c
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/i2c/ |
| D | i2c.txt | 1 Generic device tree bindings for I2C busses
4 This document describes generic bindings which can be used to describe I2C
8 -----------------------------
10 - #address-cells - should be <1>. Read more about addresses below.
11 - #size-cells - should be <0>.
12 - compatible - name of I2C bus controller
17 The cells properties above define that an address of children of an I2C bus
21 -----------------------------
26 - clock-frequency
27 frequency of bus clock in Hz.
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| D | st,stm32-i2c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/st,stm32-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: I2C controller embedded in STMicroelectronics STM32 I2C platform
10 - Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
14 - if:
19 - st,stm32f7-i2c
20 - st,stm32mp15-i2c
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| D | i2c-rk3x.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-rk3x.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip RK3xxx I2C controller
10 This driver interfaces with the native I2C controller present in Rockchip
14 - $ref: /schemas/i2c/i2c-controller.yaml#
17 - Heiko Stuebner <heiko@sntech.de>
23 - const: rockchip,rv1108-i2c
24 - const: rockchip,rk3066-i2c
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| D | i2c-st.txt | 1 ST SSC binding, for I2C mode operation
4 - compatible : Must be "st,comms-ssc-i2c" or "st,comms-ssc4-i2c"
5 - reg : Offset and length of the register set for the device
6 - interrupts : the interrupt specifier
7 - clock-names: Must contain "ssc".
8 - clocks: Must contain an entry for each name in clock-names. See the common
10 - A pinctrl state named "default" must be defined to set pins in mode of
11 operation for I2C transfer.
14 - clock-frequency : Desired I2C bus clock frequency in Hz. If not specified,
17 - st,i2c-min-scl-pulse-width-us : The minimum valid SCL pulse width that is
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| D | i2c-s3c2410.txt | 1 * Samsung's I2C controller
3 The Samsung's I2C controller is used to interface with I2C devices.
6 - compatible: value should be either of the following.
7 (a) "samsung, s3c2410-i2c", for i2c compatible with s3c2410 i2c.
8 (b) "samsung, s3c2440-i2c", for i2c compatible with s3c2440 i2c.
9 (c) "samsung, s3c2440-hdmiphy-i2c", for s3c2440-like i2c used
11 (d) "samsung, exynos5-sata-phy-i2c", for s3c2440-like i2c used as
13 - reg: physical base address of the controller and length of memory mapped
15 - interrupts: interrupt number to the cpu.
16 - samsung,i2c-sda-delay: Delay (in ns) applied to data line (SDA) edges.
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| D | i2c-at91.txt | 1 I2C for Atmel platforms
4 - compatible : Must be one of:
5 "atmel,at91rm9200-i2c",
6 "atmel,at91sam9261-i2c",
7 "atmel,at91sam9260-i2c",
8 "atmel,at91sam9g20-i2c",
9 "atmel,at91sam9g10-i2c",
10 "atmel,at91sam9x5-i2c",
11 "atmel,sama5d4-i2c",
12 "atmel,sama5d2-i2c",
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| D | renesas,i2c.txt | 1 I2C for R-Car platforms
4 - compatible:
5 "renesas,i2c-r8a7742" if the device is a part of a R8A7742 SoC.
6 "renesas,i2c-r8a7743" if the device is a part of a R8A7743 SoC.
7 "renesas,i2c-r8a7744" if the device is a part of a R8A7744 SoC.
8 "renesas,i2c-r8a7745" if the device is a part of a R8A7745 SoC.
9 "renesas,i2c-r8a77470" if the device is a part of a R8A77470 SoC.
10 "renesas,i2c-r8a774a1" if the device is a part of a R8A774A1 SoC.
11 "renesas,i2c-r8a774b1" if the device is a part of a R8A774B1 SoC.
12 "renesas,i2c-r8a774c0" if the device is a part of a R8A774C0 SoC.
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| D | snps,designware-i2c.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/i2c/snps,designware-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare APB I2C Controller
10 - Jarkko Nikula <jarkko.nikula@linux.intel.com>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
14 - if:
19 const: mscc,ocelot-i2c
28 - description: Generic Synopsys DesignWare I2C controller
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| /kernel/linux/linux-5.10/drivers/i2c/busses/ |
| D | i2c-acorn.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * ARM IOC/IOMD i2c driver.
7 * On Acorn machines, the following i2c devices are on the bus:
8 * - PCF8583 real time clock & static RAM
11 #include <linux/i2c.h>
12 #include <linux/i2c-algo-bit.h>
19 #define SCL 0x02 macro
23 * We must preserve all non-i2c output bits in IOC_CONTROL.
24 * Note also that we need to preserve the value of SCL and
32 u_int ioc_control = ioc_readb(IOC_CONTROL) & ~(SCL | SDA); in ioc_setscl()
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| D | i2c-versatile.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * i2c-versatile.c
10 #include <linux/i2c.h>
11 #include <linux/i2c-algo-bit.h>
20 #define SCL (1 << 0) macro
31 struct i2c_versatile *i2c = data; in i2c_versatile_setsda() local
33 writel(SDA, i2c->base + (state ? I2C_CONTROLS : I2C_CONTROLC)); in i2c_versatile_setsda()
38 struct i2c_versatile *i2c = data; in i2c_versatile_setscl() local
40 writel(SCL, i2c->base + (state ? I2C_CONTROLS : I2C_CONTROLC)); in i2c_versatile_setscl()
45 struct i2c_versatile *i2c = data; in i2c_versatile_getsda() local
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| D | i2c-gpio.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Bitbanging I2C bus driver using the GPIO API
11 #include <linux/i2c-algo-bit.h>
12 #include <linux/i2c.h>
17 #include <linux/platform_data/i2c-gpio.h>
23 struct gpio_desc *scl; member
44 gpiod_set_value_cansleep(priv->sda, state); in i2c_gpio_setsda_val()
48 * Toggle SCL by changing the output value of the pin. This is used
49 * for pins that are configured as open drain and for output-only
50 * pins. The latter case will break the i2c protocol, but it will
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| /kernel/linux/linux-6.6/drivers/i2c/busses/ |
| D | i2c-acorn.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * ARM IOC/IOMD i2c driver.
7 * On Acorn machines, the following i2c devices are on the bus:
8 * - PCF8583 real time clock & static RAM
11 #include <linux/i2c.h>
12 #include <linux/i2c-algo-bit.h>
19 #define SCL 0x02 macro
23 * We must preserve all non-i2c output bits in IOC_CONTROL.
24 * Note also that we need to preserve the value of SCL and
32 u_int ioc_control = ioc_readb(IOC_CONTROL) & ~(SCL | SDA); in ioc_setscl()
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| D | i2c-versatile.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * i2c-versatile.c
10 #include <linux/i2c.h>
11 #include <linux/i2c-algo-bit.h>
20 #define SCL (1 << 0) macro
31 struct i2c_versatile *i2c = data; in i2c_versatile_setsda() local
33 writel(SDA, i2c->base + (state ? I2C_CONTROLS : I2C_CONTROLC)); in i2c_versatile_setsda()
38 struct i2c_versatile *i2c = data; in i2c_versatile_setscl() local
40 writel(SCL, i2c->base + (state ? I2C_CONTROLS : I2C_CONTROLC)); in i2c_versatile_setscl()
45 struct i2c_versatile *i2c = data; in i2c_versatile_getsda() local
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| D | i2c-gpio.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Bitbanging I2C bus driver using the GPIO API
11 #include <linux/i2c-algo-bit.h>
12 #include <linux/i2c.h>
16 #include <linux/platform_data/i2c-gpio.h>
23 struct gpio_desc *scl; member
44 gpiod_set_value_cansleep(priv->sda, state); in i2c_gpio_setsda_val()
48 * Toggle SCL by changing the output value of the pin. This is used
49 * for pins that are configured as open drain and for output-only
50 * pins. The latter case will break the i2c protocol, but it will
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | rk3288-veyron.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/clock/rockchip,rk808.h>
9 #include <dt-bindings/input/input.h>
14 stdout-path = "serial2:115200n8";
27 power_button: power-button {
28 compatible = "gpio-keys";
29 pinctrl-names = "default";
30 pinctrl-0 = <&pwr_key_l>;
36 debounce-interval = <100>;
37 wakeup-source;
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