Searched +full:i2c +full:- +full:tegra (Results 1 – 25 of 213) sorted by relevance
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| /kernel/linux/linux-6.6/sound/soc/tegra/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "SoC Audio for the Tegra System-on-Chip"
10 Say Y or M here if you want support for SoC audio on Tegra.
82 Config to enable the Inter-IC Sound (I2S) Controller which
83 implements full-duplex and bidirectional and single direction
84 point-to-point serial interfaces. It can interface with I2S
113 converts the multi-bit Pulse Code Modulation (PCM) audio input to
114 oversampled 1-bit Pulse Density Modulation (PDM) output. From the
116 that up-samples the input to the desired sampling rate by
118 the desired 1-bit output via Delta Sigma Modulation (DSM).
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| /kernel/linux/linux-5.10/sound/soc/tegra/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "SoC Audio for the Tegra System-on-Chip"
10 Say Y or M here if you want support for SoC audio on Tegra.
90 Config to enable the Inter-IC Sound (I2S) Controller which
91 implements full-duplex and bidirectional and single direction
92 point-to-point serial interfaces. It can interface with I2S
101 converts the multi-bit Pulse Code Modulation (PCM) audio input to
102 oversampled 1-bit Pulse Density Modulation (PDM) output. From the
104 that up-samples the input to the desired sampling rate by
106 the desired 1-bit output via Delta Sigma Modulation (DSM).
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/tegra/ |
| D | nvidia,tegra20-pmc.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra20-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra Power Management Controller (PMC)
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra20-pmc
17 - nvidia,tegra20-pmc
18 - nvidia,tegra30-pmc
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/tegra/ |
| D | nvidia,tegra20-pmc.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra20-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra Power Management Controller (PMC)
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra20-pmc
17 - nvidia,tegra30-pmc
18 - nvidia,tegra114-pmc
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| /kernel/linux/linux-6.6/drivers/staging/nvec/ |
| D | README | 4 embedded controller (EC) via I2C bus. The EC is an I2C master while the host
5 processor is the I2C slave. Requests from the host processor to the EC are
11 that other Tegra boards (not yet mainlined, if ever) also use it.
13 [1] e.g. https://nv-tegra.nvidia.com/gitweb/?p=linux-2.6.git;a=tree;f=arch/arm/mach-tegra/nvec;hb=a…
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| /kernel/linux/linux-5.10/drivers/staging/nvec/ |
| D | README | 4 embedded controller (EC) via I2C bus. The EC is an I2C master while the host
5 processor is the I2C slave. Requests from the host processor to the EC are
11 that other Tegra boards (not yet mainlined, if ever) also use it.
13 [1] e.g. https://nv-tegra.nvidia.com/gitweb/?p=linux-2.6.git;a=tree;f=arch/arm/mach-tegra/nvec;hb=a…
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| /kernel/linux/linux-6.6/drivers/i2c/busses/ |
| D | i2c-tegra-bpmp.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * drivers/i2c/busses/i2c-tegra-bpmp.c
11 #include <linux/i2c.h>
19 #include <soc/tegra/bpmp-abi.h>
20 #include <soc/tegra/bpmp.h>
23 * Serialized I2C message header size is 6 bytes and includes address, flags
37 * Linux flags are translated to BPMP defined I2C flags that are used in BPMP
38 * firmware I2C driver to avoid any issues in future if Linux I2C flags are
69 * The serialized I2C format is simply the following:
70 * [addr little-endian][flags little-endian][len little-endian][data if write]
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| /kernel/linux/linux-5.10/drivers/i2c/busses/ |
| D | i2c-tegra-bpmp.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * drivers/i2c/busses/i2c-tegra-bpmp.c
11 #include <linux/i2c.h>
19 #include <soc/tegra/bpmp-abi.h>
20 #include <soc/tegra/bpmp.h>
23 * Serialized I2C message header size is 6 bytes and includes address, flags
37 * Linux flags are translated to BPMP defined I2C flags that are used in BPMP
38 * firmware I2C driver to avoid any issues in future if Linux I2C flags are
87 * The serialized I2C format is simply the following:
88 * [addr little-endian][flags little-endian][len little-endian][data if write]
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| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0
3 # Makefile for the i2c bus drivers.
7 obj-$(CONFIG_I2C_SCMI) += i2c-scmi.o
10 obj-$(CONFIG_I2C_ALI1535) += i2c-ali1535.o
11 obj-$(CONFIG_I2C_ALI1563) += i2c-ali1563.o
12 obj-$(CONFIG_I2C_ALI15X3) += i2c-ali15x3.o
13 obj-$(CONFIG_I2C_AMD756) += i2c-amd756.o
14 obj-$(CONFIG_I2C_AMD756_S4882) += i2c-amd756-s4882.o
15 obj-$(CONFIG_I2C_AMD8111) += i2c-amd8111.o
16 obj-$(CONFIG_I2C_CHT_WC) += i2c-cht-wc.o
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/tegra/ |
| D | nvidia,tegra20-host1x.txt | 1 NVIDIA Tegra host1x
4 - compatible: "nvidia,tegra<chip>-host1x"
5 - reg: Physical base address and length of the controller's registers.
6 For pre-Tegra186, one entry describing the whole register area.
7 For Tegra186, one entry for each entry in reg-names:
8 "vm" - VM region assigned to Linux
9 "hypervisor" - Hypervisor region (only if Linux acts as hypervisor)
10 - interrupts: The interrupt outputs from the controller.
11 - #address-cells: The number of cells used to represent physical base addresses
13 - #size-cells: The number of cells used to represent the size of an address
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/ |
| D | nvidia,tegra124-dpaux-padctl.txt | 1 Device tree binding for NVIDIA Tegra DPAUX pad controller
4 The Tegra Display Port Auxiliary (DPAUX) pad controller manages two pins
5 which can be assigned to either the DPAUX channel or to an I2C
8 This document defines the device-specific binding for the DPAUX pad
9 controller. Refer to pinctrl-bindings.txt in this directory for generic
11 the binding document ../display/tegra/nvidia,tegra20-host1x.txt for more
15 -----------
18 from the pinctrl-bindings.txt document.
27 - groups: Must be "dpaux-io"
28 - function: Must be either "aux", "i2c" or "off".
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/tegra/ |
| D | nvidia,tegra124-dpaux.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-dpaux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra DisplayPort AUX Interface
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
14 The Tegra Display Port Auxiliary (DPAUX) pad controller manages two
15 pins which can be assigned to either the DPAUX channel or to an I2C
24 pattern: "^dpaux@[0-9a-f]+$"
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| D | nvidia,tegra20-hdmi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra HDMI Output Encoder
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 pattern: "^hdmi@[0-9a-f]+$"
19 - enum:
20 - nvidia,tegra20-hdmi
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| D | nvidia,tegra124-sor.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-sor.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra SOR Output Encoder
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
19 pattern: "^sor@[0-9a-f]+$"
23 - enum:
24 - nvidia,tegra124-sor
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/soc/tegra/ |
| D | nvidia,nvec.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/tegra/nvidia,nvec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
26 - description: divider clock
27 - description: fast clock
29 clock-names:
32 - const: div-clk
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| /kernel/linux/linux-6.6/sound/pci/hda/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "HD-Audio"
23 This option enables the HD-audio controller. Don't forget
27 will be called snd-hda-intel.
30 tristate "NVIDIA Tegra HD Audio"
36 Tegra SoCs
39 present in some NVIDIA Tegra SoCs, used to communicate audio
43 will be called snd-hda-tegra.
48 bool "Build hwdep interface for HD-audio driver"
51 Say Y here to build a hwdep interface for HD-audio driver.
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| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0
2 snd-hda-intel-objs := hda_intel.o
3 snd-hda-tegra-objs := hda_tegra.o
5 snd-hda-codec-y := hda_bind.o hda_codec.o hda_jack.o hda_auto_parser.o hda_sysfs.o
6 snd-hda-codec-y += hda_controller.o
7 snd-hda-codec-$(CONFIG_SND_PROC_FS) += hda_proc.o
9 snd-hda-codec-$(CONFIG_SND_HDA_HWDEP) += hda_hwdep.o
10 snd-hda-codec-$(CONFIG_SND_HDA_INPUT_BEEP) += hda_beep.o
12 # for trace-points
13 CFLAGS_hda_controller.o := -I$(src)
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| /kernel/linux/linux-6.6/drivers/soc/tegra/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
4 # 32-bit ARM SoCs
21 Support for NVIDIA Tegra AP20 and T20 processors, based on the
35 Support for NVIDIA Tegra T30 processor family, based on the
47 Support for NVIDIA Tegra T114 processor family, based on the
58 Support for NVIDIA Tegra T124 processor family, based on the
63 # 64-bit ARM SoCs
75 Tegra124's "4+1" Cortex-A15 CPU complex.
84 Enable support for the NVIDIA Tegra210 SoC. Also known as Tegra X1,
85 the Tegra210 has four Cortex-A57 cores paired with four Cortex-A53
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| /kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/include/nvif/ |
| D | os.h | 1 /* SPDX-License-Identifier: MIT */
14 #include <linux/i2c.h>
15 #include <linux/i2c-algo-bit.h>
17 #include <linux/io-mapping.h>
35 #include <soc/tegra/fuse.h>
36 #include <soc/tegra/pmc.h>
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| /kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/include/nvif/ |
| D | os.h | 1 /* SPDX-License-Identifier: MIT */
14 #include <linux/i2c.h>
15 #include <linux/i2c-algo-bit.h>
17 #include <linux/io-mapping.h>
35 #include <soc/tegra/fuse.h>
36 #include <soc/tegra/pmc.h>
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/i2c/ |
| D | nvidia,tegra20-i2c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/nvidia,tegra20-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 - Thierry Reding <thierry.reding@gmail.com>
9 - Jon Hunter <jonathanh@nvidia.com>
11 title: NVIDIA Tegra I2C controller driver
16 - description: Tegra20 has 4 generic I2C controller. This can support
17 master and slave mode of I2C communication. The i2c-tegra driver
18 only support master mode of I2C communication. Driver of I2C
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| /kernel/linux/linux-5.10/drivers/soc/tegra/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
4 # 32-bit ARM SoCs
21 Support for NVIDIA Tegra AP20 and T20 processors, based on the
35 Support for NVIDIA Tegra T30 processor family, based on the
47 Support for NVIDIA Tegra T114 processor family, based on the
58 Support for NVIDIA Tegra T124 processor family, based on the
63 # 64-bit ARM SoCs
75 Tegra124's "4+1" Cortex-A15 CPU complex.
84 Enable support for the NVIDIA Tegra210 SoC. Also known as Tegra X1,
85 the Tegra210 has four Cortex-A57 cores paired with four Cortex-A53
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/firmware/ |
| D | nvidia,tegra186-bpmp.txt | 1 NVIDIA Tegra Boot and Power Management Processor (BPMP)
3 The BPMP is a specific processor in Tegra chip, which is designed for
11 - compatible
14 - "nvidia,tegra186-bpmp"
15 - mboxes : The phandle of mailbox controller and the mailbox specifier.
16 - shmem : List of the phandle of the TX and RX shared memory area that
18 - #clock-cells : Should be 1.
19 - #power-domain-cells : Should be 1.
20 - #reset-cells : Should be 1.
26 - .../mailbox/mailbox.txt
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/nvidia/ |
| D | tegra20-ventana.dts | 1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/thermal/thermal.h>
7 #include "tegra20-cpu-opp.dtsi"
8 #include "tegra20-cpu-opp-microvolt.dtsi"
15 rtc0 = "/i2c@7000d000/tps6586x@34";
21 stdout-path = "serial0:115200n8";
40 vdd-supply = <&hdmi_vdd_reg>;
41 pll-supply = <&hdmi_pll_reg>;
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/firmware/ |
| D | nvidia,tegra186-bpmp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/firmware/nvidia,tegra186-bpmp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra Boot and Power Management Processor (BPMP)
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
14 The BPMP is a specific processor in Tegra chip, which is designed for
25 - .../mailbox/mailbox.txt
26 - .../mailbox/nvidia,tegra186-hsp.yaml
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