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/kernel/linux/linux-5.10/include/linux/i3c/
Dmaster.h1 /* SPDX-License-Identifier: GPL-2.0 */
15 #include <linux/i3c/ccc.h>
16 #include <linux/i3c/device.h>
31 * struct i3c_i2c_dev_desc - Common part of the I3C/I2C device descriptor
32 * @node: node element used to insert the slot into the I2C or I3C device
34 * @master: I3C master that instantiated this device. Will be used to do
35 * I2C/I3C transfers
36 * @master_priv: master private data assigned to the device. Can be used to
37 * add master specific information
39 * This structure is describing common I3C/I2C dev information.
[all …]
Dccc.h1 /* SPDX-License-Identifier: GPL-2.0 */
12 #include <linux/i3c/device.h>
14 /* I3C CCC (Common Command Codes) related definitions */
30 /* Broadcast-only commands */
36 /* Unicast-only commands */
56 * struct i3c_ccc_events - payload passed to ENEC/DISEC CCC
69 * struct i3c_ccc_mwl - payload passed to SETMWL/GETMWL CCC
81 * struct i3c_ccc_mrl - payload passed to SETMRL/GETMRL CCC
88 * The IBI length is only valid if the I3C slave is IBI capable
97 * struct i3c_ccc_dev_desc - I3C/I2C device descriptor used for DEFSLVS
[all …]
/kernel/linux/linux-6.6/include/linux/i3c/
Dmaster.h1 /* SPDX-License-Identifier: GPL-2.0 */
15 #include <linux/i3c/ccc.h>
16 #include <linux/i3c/device.h>
32 * struct i3c_i2c_dev_desc - Common part of the I3C/I2C device descriptor
33 * @node: node element used to insert the slot into the I2C or I3C device
35 * @master: I3C master that instantiated this device. Will be used to do
36 * I2C/I3C transfers
37 * @master_priv: master private data assigned to the device. Can be used to
38 * add master specific information
40 * This structure is describing common I3C/I2C dev information.
[all …]
Dccc.h1 /* SPDX-License-Identifier: GPL-2.0 */
12 #include <linux/i3c/device.h>
14 /* I3C CCC (Common Command Codes) related definitions */
30 /* Broadcast-only commands */
36 /* Unicast-only commands */
56 * struct i3c_ccc_events - payload passed to ENEC/DISEC CCC
69 * struct i3c_ccc_mwl - payload passed to SETMWL/GETMWL CCC
81 * struct i3c_ccc_mrl - payload passed to SETMRL/GETMRL CCC
88 * The IBI length is only valid if the I3C slave is IBI capable
97 * struct i3c_ccc_dev_desc - I3C/I2C device descriptor used for DEFSLVS
[all …]
/kernel/linux/linux-6.6/drivers/i3c/master/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "Cadence I3C master driver"
4 depends on I3C
8 Enable this driver if you want to support Cadence I3C master block.
11 tristate "Synospsys DesignWare I3C master driver"
12 depends on I3C
17 Support for Synopsys DesignWare MIPI I3C Controller.
23 will be called dw-i3c-master.
26 tristate "ASPEED AST2600 I3C master driver"
31 Support for ASPEED AST2600 I3C Controller.
[all …]
DMakefile1 # SPDX-License-Identifier: GPL-2.0-only
2 obj-$(CONFIG_CDNS_I3C_MASTER) += i3c-master-cdns.o
3 obj-$(CONFIG_DW_I3C_MASTER) += dw-i3c-master.o
4 obj-$(CONFIG_AST2600_I3C_MASTER) += ast2600-i3c-master.o
5 obj-$(CONFIG_SVC_I3C_MASTER) += svc-i3c-master.o
6 obj-$(CONFIG_MIPI_I3C_HCI) += mipi-i3c-hci/
Dsvc-i3c-master.c1 // SPDX-License-Identifier: GPL-2.0
3 * Silvaco dual-role I3C master driver
14 #include <linux/i3c/master.h>
24 /* Master Mode Registers */
160 * struct svc_i3c_master - Silvaco I3C Master structure
161 * @base: I3C master controller
168 * @hj_work: Hot-join work
183 * @lock: Transfer lock, protect between IBI work thread and callbacks from master
220 * struct svc_i3c_i2c_dev_data - Device specific data
221 * @index: Index in the master tables corresponding to this device
[all …]
Dast2600-i3c-master.c1 // SPDX-License-Identifier: GPL-2.0
14 #include "dw-i3c-master.h"
16 /* AST2600-specific global register set */
68 return -EINVAL; in ast2600_i3c_pullup_to_reg()
79 struct ast2600_i3c *i3c = to_ast2600_i3c(dw); in ast2600_i3c_init() local
84 rc = ast2600_i3c_pullup_to_reg(i3c->sda_pullup, &reg); in ast2600_i3c_init()
88 rc = regmap_write(i3c->global_regs, in ast2600_i3c_init()
89 AST2600_I3CG_REG0(i3c->global_idx), reg); in ast2600_i3c_init()
96 reg = AST2600_I3CG_REG1_INST_ID(i3c->global_idx); in ast2600_i3c_init()
97 rc = regmap_write(i3c->global_regs, in ast2600_i3c_init()
[all …]
Ddw-i3c-master.h1 /* SPDX-License-Identifier: GPL-2.0 */
9 #include <linux/i3c/master.h>
44 * Per-device hardware data, used to manage the device address table
51 * insertions/removals from the array by the global i3c infrastructure.
52 * So, devs_lock protects against concurrent updates to devs->ibi_dev
58 /* platform-specific data */
66 * Called on early bus init: the i3c has been set up, but before any
68 * perform actual device enabling with the i3c core ready.
70 int (*init)(struct dw_i3c_master *i3c);
79 void (*set_dat_ibi)(struct dw_i3c_master *i3c,
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/kernel/linux/linux-5.10/Documentation/ABI/testing/
Dsysfs-bus-i3c1 What: /sys/bus/i3c/devices/i3c-<bus-id>
3 Contact: linux-i3c@vger.kernel.org
5 An I3C bus. This directory will contain one sub-directory per
6 I3C device present on the bus.
8 What: /sys/bus/i3c/devices/i3c-<bus-id>/current_master
10 Contact: linux-i3c@vger.kernel.org
12 Expose the master that owns the bus (<bus-id>-<master-pid>) at
17 What: /sys/bus/i3c/devices/i3c-<bus-id>/mode
19 Contact: linux-i3c@vger.kernel.org
21 I3C bus mode. Can be "pure", "mixed-fast" or "mixed-slow". See
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/kernel/linux/linux-6.6/Documentation/ABI/testing/
Dsysfs-bus-i3c1 What: /sys/bus/i3c/devices/i3c-<bus-id>
3 Contact: linux-i3c@vger.kernel.org
5 An I3C bus. This directory will contain one sub-directory per
6 I3C device present on the bus.
8 What: /sys/bus/i3c/devices/i3c-<bus-id>/current_master
10 Contact: linux-i3c@vger.kernel.org
12 Expose the master that owns the bus (<bus-id>-<master-pid>) at
17 What: /sys/bus/i3c/devices/i3c-<bus-id>/mode
19 Contact: linux-i3c@vger.kernel.org
21 I3C bus mode. Can be "pure", "mixed-fast" or "mixed-slow". See
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/i3c/
Dcdns,i3c-master.txt1 Bindings for cadence I3C master block
5 --------------------
6 - compatible: shall be "cdns,i3c-master"
7 - clocks: shall reference the pclk and sysclk
8 - clock-names: shall contain "pclk" and "sysclk"
9 - interrupts: the interrupt line connected to this I3C master
10 - reg: I3C master registers
13 Documentation/devicetree/bindings/i3c/i3c.txt for more details):
15 - #address-cells: shall be set to 1
16 - #size-cells: shall be set to 0
[all …]
Dsnps,dw-i3c-master.txt1 Bindings for Synopsys DesignWare I3C master block
5 --------------------
6 - compatible: shall be "snps,dw-i3c-master-1.00a"
7 - clocks: shall reference the core_clk
8 - interrupts: the interrupt line connected to this I3C master
9 - reg: Offset and length of I3C master registers
12 Documentation/devicetree/bindings/i3c/i3c.txt for more details):
14 - #address-cells: shall be set to 3
15 - #size-cells: shall be set to 0
18 Documentation/devicetree/bindings/i3c/i3c.txt for more details):
[all …]
Di3c.txt1 Generic device tree bindings for I3C busses
4 This document describes generic bindings that should be used to describe I3C
8 -------------------
10 - #address-cells - should be <3>. Read more about addresses below.
11 - #size-cells - should be <0>.
12 - compatible - name of the I3C master controller driving the I3C bus
16 The node describing an I3C bus should be named i3c-master.
19 -------------------
21 These properties may not be supported by all I3C master drivers. Each I3C
22 master bindings should specify which of them are supported.
[all …]
/kernel/linux/linux-5.10/Documentation/driver-api/i3c/
Dprotocol.rst1 .. SPDX-License-Identifier: GPL-2.0
4 I3C protocol
12 collisions are prevented, ...) please have a look at the I3C specification.
14 This document is just a brief introduction to the I3C protocol and the concepts
16 I3C specification (can be downloaded here
17 https://resources.mipi.org/mipi-i3c-v1-download).
22 The I3C (pronounced 'eye-three-see') is a MIPI standardized protocol designed
25 while remaining power-efficient.
27 I3C Bus
30 An I3C bus is made of several I3C devices and possibly some I2C devices as
[all …]
/kernel/linux/linux-6.6/Documentation/driver-api/i3c/
Dprotocol.rst1 .. SPDX-License-Identifier: GPL-2.0
4 I3C protocol
12 collisions are prevented, ...) please have a look at the I3C specification.
14 This document is just a brief introduction to the I3C protocol and the concepts
16 I3C specification (can be downloaded here
17 https://resources.mipi.org/mipi-i3c-v1-download).
22 The I3C (pronounced 'eye-three-see') is a MIPI standardized protocol designed
25 while remaining power-efficient.
27 I3C Bus
30 An I3C bus is made of several I3C devices and possibly some I2C devices as
[all …]
/kernel/linux/linux-5.10/drivers/i3c/
Dmaster.c1 // SPDX-License-Identifier: GPL-2.0
26 * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation
27 * @bus: I3C bus to take the lock on
31 * - enabling/disabling slave events
32 * - re-triggering DAA
33 * - changing the dynamic address of a device
34 * - relinquishing mastership
35 * - ...
38 * logic to rely on I3C device information that could be changed behind their
43 down_write(&bus->lock); in i3c_bus_maintenance_lock()
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0
3 menuconfig I3C config
4 tristate "I3C support"
7 I3C is a serial protocol standardized by the MIPI alliance.
13 The I3C protocol also standardizes the slave device types and is
16 If you want I3C support, you should say Y here and also to the
19 This I3C support can also be built as a module. If so, the module
20 will be called i3c.
22 if I3C
23 source "drivers/i3c/master/Kconfig"
[all …]
/kernel/linux/linux-6.6/drivers/i3c/
Dmaster.c1 // SPDX-License-Identifier: GPL-2.0
27 * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation
28 * @bus: I3C bus to take the lock on
32 * - enabling/disabling slave events
33 * - re-triggering DAA
34 * - changing the dynamic address of a device
35 * - relinquishing mastership
36 * - ...
39 * logic to rely on I3C device information that could be changed behind their
44 down_write(&bus->lock); in i3c_bus_maintenance_lock()
[all …]
/kernel/linux/linux-5.10/drivers/i3c/master/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "Cadence I3C master driver"
4 depends on I3C
8 Enable this driver if you want to support Cadence I3C master block.
11 tristate "Synospsys DesignWare I3C master driver"
12 depends on I3C
17 Support for Synopsys DesignWare MIPI I3C Controller.
23 will be called dw-i3c-master.
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/i3c/
Dsnps,dw-i3c-master.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i3c/snps,dw-i3c-master.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare I3C master block
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
13 - $ref: i3c.yaml#
17 const: snps,dw-i3c-master-1.00a
29 - compatible
30 - reg
[all …]
Dcdns,i3c-master.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i3c/cdns,i3c-master.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cadence I3C master block
10 - Boris Brezillon <bbrezillon@kernel.org>
13 - $ref: i3c.yaml#
17 const: cdns,i3c-master
25 clock-names:
27 - const: pclk
[all …]
Dsilvaco,i3c-master.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/i3c/silvaco,i3c-master.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Silvaco I3C master
10 - Conor Culhane <conor.culhane@silvaco.com>
13 - $ref: i3c.yaml#
17 const: silvaco,i3c-master-v1
27 - description: system clock
28 - description: bus clock
[all …]
Di3c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i3c/i3c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: I3C bus
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
11 - Miquel Raynal <miquel.raynal@bootlin.com>
14 I3C busses can be described with a node for the primary I3C controller device
15 and a set of child nodes for each I2C or I3C slave on the bus. Each of them
20 pattern: "^i3c-master@[0-9a-f]+$"
[all …]
/kernel/linux/linux-6.6/drivers/i3c/master/mipi-i3c-hci/
Dxfer_mode_rate.h1 /* SPDX-License-Identifier: BSD-3-Clause */
9 * This applies starting from I3C HCI v2.0.
16 * Master Transfer Mode Table Fixed Indexes.
22 #define XFERMODE_IDX_I3C_SDR 0x00 /* I3C SDR Mode */
23 #define XFERMODE_IDX_I3C_HDR_DDR 0x01 /* I3C HDR-DDR Mode */
24 #define XFERMODE_IDX_I3C_HDR_T 0x02 /* I3C HDR-Ternary Mode */
25 #define XFERMODE_IDX_I3C_HDR_BT 0x03 /* I3C HDR-BT Mode */
38 * Master Data Transfer Rate Selector Values.
67 * Master Data Transfer Rate Table Mode ID values.
73 * Master Data Transfer Rate Table Entry Bits Definitions

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