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/kernel/linux/linux-6.6/drivers/mtd/nand/raw/
Dfsl_ifc_nand.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Freescale Integrated Flash Controller NAND driver
5 * Copyright 2011-2012 Freescale Semiconductor, Inc
25 for IFC NAND Machine */
40 /* overview of the fsl ifc controller */
45 void __iomem *addr; /* Address of assigned IFC buffer */
51 unsigned int eccread; /* Non zero for a full-page ECC read */
67 .offs = 2, /* 0 on 8-bit small page */
77 .offs = 2, /* 0 on 8-bit small page */
90 return -ERANGE; in fsl_ifc_ooblayout_ecc()
[all …]
/kernel/linux/linux-5.10/drivers/mtd/nand/raw/
Dfsl_ifc_nand.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Freescale Integrated Flash Controller NAND driver
5 * Copyright 2011-2012 Freescale Semiconductor, Inc
25 for IFC NAND Machine */
40 /* overview of the fsl ifc controller */
45 void __iomem *addr; /* Address of assigned IFC buffer */
51 unsigned int eccread; /* Non zero for a full-page ECC read */
67 .offs = 2, /* 0 on 8-bit small page */
77 .offs = 2, /* 0 on 8-bit small page */
90 return -ERANGE; in fsl_ifc_ooblayout_ecc()
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/memory-controllers/fsl/
Difc.txt4 - name : Should be ifc
5 - compatible : should contain "fsl,ifc". The version of the integrated
9 - #address-cells : Should be either two or three. The first cell is the
12 - #size-cells : Either one or two, depending on how large each chipselect
14 - reg : Offset and length of the register set for the device
15 - interrupts: IFC may have one or two interrupts. If two interrupt
17 interrupt (CM_EVTER_STAT), and the second is the NAND
21 - little-endian : If this property is absent, the big-endian mode will
24 - ranges : Each range corresponds to a single chipselect, and covers
27 Child device nodes describe the devices connected to IFC such as NOR (e.g.
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/memory-controllers/fsl/
Dfsl,ifc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/fsl/fsl,ifc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Li Yang <leoyang.li@nxp.com>
13 NXP's integrated flash controller (IFC) is an advanced version of the
15 interfaces with an extended feature set. The IFC provides access to multiple
16 external memory types, such as NAND flash (SLC and MLC), NOR flash, EPROM,
21 pattern: "^memory-controller@[0-9a-f]+$"
24 const: fsl,ifc
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/kernel/linux/linux-5.10/drivers/memory/
Dfsl_ifc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
29 * convert_ifc_address - convert the base address
39 * fsl_ifc_find - find IFC bank
42 * This function walks IFC banks comparing "Base address" field of the CSPR
51 if (!fsl_ifc_ctrl_dev || !fsl_ifc_ctrl_dev->gregs) in fsl_ifc_find()
52 return -ENODEV; in fsl_ifc_find()
54 for (i = 0; i < fsl_ifc_ctrl_dev->banks; i++) { in fsl_ifc_find()
55 u32 cspr = ifc_in32(&fsl_ifc_ctrl_dev->gregs->cspr_cs[i].cspr); in fsl_ifc_find()
62 return -ENOENT; in fsl_ifc_find()
68 struct fsl_ifc_global __iomem *ifc = ctrl->gregs; in fsl_ifc_ctrl_init() local
[all …]
/kernel/linux/linux-6.6/drivers/memory/
Dfsl_ifc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
29 * convert_ifc_address - convert the base address
39 * fsl_ifc_find - find IFC bank
42 * This function walks IFC banks comparing "Base address" field of the CSPR
51 if (!fsl_ifc_ctrl_dev || !fsl_ifc_ctrl_dev->gregs) in fsl_ifc_find()
52 return -ENODEV; in fsl_ifc_find()
54 for (i = 0; i < fsl_ifc_ctrl_dev->banks; i++) { in fsl_ifc_find()
55 u32 cspr = ifc_in32(&fsl_ifc_ctrl_dev->gregs->cspr_cs[i].cspr); in fsl_ifc_find()
62 return -ENOENT; in fsl_ifc_find()
68 struct fsl_ifc_global __iomem *ifc = ctrl->gregs; in fsl_ifc_ctrl_init() local
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/kernel/linux/linux-6.6/include/linux/
Dfsl_ifc.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
20 * The actual number of banks implemented depends on the IFC version
21 * - IFC version 1.0 implements 4 banks.
22 * - IFC version 1.1 onward implements 8 banks.
35 * CSPR - Chip Select Property Register
55 /* NAND */
69 (__ilog2(n) - IFC_AMASK_SHIFT))
110 #define CSOR_NAND_PB(n) ((__ilog2(n) - 5) << CSOR_NAND_PB_SHIFT)
123 * Chip Select Option Register - NOR Flash Mode
150 * Chip Select Option Register - GPCM Mode
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/kernel/linux/linux-5.10/include/linux/
Dfsl_ifc.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
20 * The actual number of banks implemented depends on the IFC version
21 * - IFC version 1.0 implements 4 banks.
22 * - IFC version 1.1 onward implements 8 banks.
35 * CSPR - Chip Select Property Register
55 /* NAND */
69 (__ilog2(n) - IFC_AMASK_SHIFT))
110 #define CSOR_NAND_PB(n) ((__ilog2(n) - 5) << CSOR_NAND_PB_SHIFT)
123 * Chip Select Option Register - NOR Flash Mode
150 * Chip Select Option Register - GPCM Mode
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/kernel/linux/linux-5.10/arch/powerpc/boot/dts/fsl/
Dc293pcie.dts35 /include/ "c293si-pre.dtsi"
45 ifc: ifc@fffe1e000 { label
73 &ifc {
75 #address-cells = <1>;
76 #size-cells = <1>;
77 compatible = "cfi-flash";
79 bank-width = <2>;
80 device-width = <1>;
107 /* 512KB for u-boot Bootloader Image and evn */
109 label = "NOR U-Boot Image";
[all …]
Dbsc9131rdb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2011-2012 Freescale Semiconductor Inc.
8 /include/ "bsc9131si-pre.dtsi"
18 board_ifc: ifc: ifc@ff71e000 {
19 /* NAND Flash on board */
30 /include/ "bsc9131si-post.dtsi"
Dbsc9132qds.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /include/ "bsc9132si-pre.dtsi"
18 ifc: ifc@ff71e000 { label
19 /* NOR, NAND Flash on board */
46 /include/ "bsc9132si-post.dtsi"
Dbsc9132qds.dtsi2 * BSC9132 QDS Device Tree Source stub (no addresses or top-level ranges)
35 &ifc {
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
41 bank-width = <2>;
42 device-width = <1>;
45 nand@1,0 {
46 #address-cells = <1>;
47 #size-cells = <1>;
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/kernel/linux/linux-6.6/arch/powerpc/boot/dts/fsl/
Dc293pcie.dts35 /include/ "c293si-pre.dtsi"
45 ifc: ifc@fffe1e000 { label
73 &ifc {
75 #address-cells = <1>;
76 #size-cells = <1>;
77 compatible = "cfi-flash";
79 bank-width = <2>;
80 device-width = <1>;
107 /* 512KB for u-boot Bootloader Image and evn */
109 label = "NOR U-Boot Image";
[all …]
Dbsc9131rdb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2011-2012 Freescale Semiconductor Inc.
8 /include/ "bsc9131si-pre.dtsi"
18 board_ifc: ifc: ifc@ff71e000 {
19 /* NAND Flash on board */
30 /include/ "bsc9131si-post.dtsi"
Dbsc9132qds.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /include/ "bsc9132si-pre.dtsi"
18 ifc: ifc@ff71e000 { label
19 /* NOR, NAND Flash on board */
46 /include/ "bsc9132si-post.dtsi"
/kernel/linux/linux-6.6/arch/arm64/boot/dts/freescale/
Dfsl-ls1046a-frwy.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-1046A family SoC.
9 /dts-v1/;
11 #include "fsl-ls1046a.dtsi"
15 compatible = "fsl,ls1046a-frwy", "fsl,ls1046a";
25 stdout-path = "serial0:115200n8";
28 sb_3v3: regulator-sb3v3 {
29 compatible = "regulator-fixed";
30 regulator-name = "LT8642SEV-3.3V";
31 regulator-min-microvolt = <3300000>;
[all …]
Dfsl-ls1046a-rdb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-1046A family SoC.
6 * Copyright 2019-2020 NXP
11 /dts-v1/;
13 #include "fsl-ls1046a.dtsi"
17 compatible = "fsl,ls1046a-rdb", "fsl,ls1046a";
27 stdout-path = "serial0:115200n8";
40 mmc-hs200-1_8v;
41 sd-uhs-sdr104;
42 sd-uhs-sdr50;
[all …]
Dfsl-ls208xa-rdb.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * Copyright 2017-2020 NXP
16 &ifc {
18 #address-cells = <2>;
19 #size-cells = <1>;
25 #address-cells = <1>;
26 #size-cells = <1>;
27 compatible = "cfi-flash";
29 bank-width = <2>;
30 device-width = <1>;
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/
Dfsl-ls1046a-frwy.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-1046A family SoC.
9 /dts-v1/;
11 #include "fsl-ls1046a.dtsi"
15 compatible = "fsl,ls1046a-frwy", "fsl,ls1046a";
25 stdout-path = "serial0:115200n8";
28 sb_3v3: regulator-sb3v3 {
29 compatible = "regulator-fixed";
30 regulator-name = "LT8642SEV-3.3V";
31 regulator-min-microvolt = <3300000>;
[all …]
Dfsl-ls1043a-qds.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-1043A family SoC.
5 * Copyright 2014-2015 Freescale Semiconductor, Inc.
11 /dts-v1/;
12 #include "fsl-ls1043a.dtsi"
16 compatible = "fsl,ls1043a-qds", "fsl,ls1043a";
30 stdout-path = "serial0:115200n8";
42 &ifc {
43 #address-cells = <2>;
44 #size-cells = <1>;
[all …]
Dfsl-ls1088a-rdb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 /dts-v1/;
13 #include "fsl-ls1088a.dtsi"
17 compatible = "fsl,ls1088a-rdb", "fsl,ls1088a";
23 i2c-switch@77 {
26 #address-cells = <1>;
27 #size-cells = <0>;
30 #address-cells = <1>;
31 #size-cells = <0>;
37 shunt-resistor = <1000>;
[all …]
Dfsl-ls208xa-rdb.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
16 &ifc {
18 #address-cells = <2>;
19 #size-cells = <1>;
25 #address-cells = <1>;
26 #size-cells = <1>;
27 compatible = "cfi-flash";
29 bank-width = <2>;
30 device-width = <1>;
33 nand@2,0 {
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Dfsl-ls1046a-rdb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-1046A family SoC.
10 /dts-v1/;
12 #include "fsl-ls1046a.dtsi"
16 compatible = "fsl,ls1046a-rdb", "fsl,ls1046a";
26 stdout-path = "serial0:115200n8";
39 mmc-hs200-1_8v;
40 sd-uhs-sdr104;
41 sd-uhs-sdr50;
42 sd-uhs-sdr25;
[all …]
Dfsl-ls1046a-qds.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-1046A family SoC.
11 /dts-v1/;
13 #include "fsl-ls1046a.dtsi"
17 compatible = "fsl,ls1046a-qds", "fsl,ls1046a";
31 stdout-path = "serial0:115200n8";
36 bus-num = <0>;
40 #address-cells = <1>;
41 #size-cells = <1>;
42 compatible = "n25q128a11", "jedec,spi-nor";
[all …]
/kernel/linux/patches/linux-5.10/imx8mm_patch/patches/drivers/
D0028_linux_drivers_memory.patch7 Change-Id: Ibad807aa57c6eb144ed04e5d02d702fb2c50893e
9 diff --git a/drivers/memory/fsl_ifc.c b/drivers/memory/fsl_ifc.c
11 --- a/drivers/memory/fsl_ifc.c
13 @@ -11,6 +11,7 @@
21 @@ -24,6 +25,8 @@
29 * convert_ifc_address - convert the base address
30 @@ -298,6 +301,261 @@ static int fsl_ifc_ctrl_probe(struct platform_device *dev)
35 +/* save ifc registers */
39 + struct fsl_ifc_global __iomem *fcm = ctrl->gregs;
40 + struct fsl_ifc_runtime __iomem *runtime = ctrl->rregs;
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