Searched +full:implementation +full:- +full:defined (Results 1 – 25 of 1030) sorted by relevance
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| /kernel/liteos_a/bsd/dev/usb/ |
| D | BUILD.gn | 1 # Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
2 # Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
32 module_switch = defined(LOSCFG_DRIVERS_USB)
36 "implementation/bsd_busspace.c",
37 "implementation/bsd_kernel.c",
38 "implementation/usb_btree.c",
39 "implementation/usb_busdma_loader.c",
40 "implementation/usb_init.c",
41 "implementation/usb_version.c",
45 if (defined(LOSCFG_DRIVERS_USB)) {
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| /kernel/linux/linux-6.6/Documentation/watchdog/ |
| D | mlx-wdt.rst | 16 Actual HW timeout can be defined as a power of 2 msec.
19 Get time-left isn't supported
22 Actual HW timeout is defined in sec. and it's the same as
23 a user-defined timeout.
25 Get time-left is supported.
31 Type 1 HW watchdog implementation exist in old systems and
33 Two types of HW implementation have also different register map.
35 Type 3 HW watchdog implementation can exist on all Mellanox systems
43 There are several actions that can be defined in the watchdog:
54 This mlx-wdt driver supports both HW watchdog implementations.
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| /kernel/linux/linux-5.10/Documentation/watchdog/ |
| D | mlx-wdt.rst | 16 Actual HW timeout can be defined as a power of 2 msec.
19 Get time-left isn't supported
22 Actual HW timeout is defined in sec. and it's the same as
23 a user-defined timeout.
25 Get time-left is supported.
31 Type 1 HW watchdog implementation exist in old systems and
33 Two types of HW implementation have also different register map.
35 Type 3 HW watchdog implementation can exist on all Mellanox systems
43 There are several actions that can be defined in the watchdog:
54 This mlx-wdt driver supports both HW watchdog implementations.
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/ |
| D | arm,coresight-cti.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 ---
5 $id: http://devicetree.org/schemas/arm/arm,coresight-cti.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
21 number is defined at design time, the maximum of each defined in the DEVID
25 programmable channels, usually 4, but again implementation defined and
31 are implementation defined, except when the CTI is connected to an ARM v8
37 indicate this feature (arm,coresight-cti-v8-arch).
51 and usages. These can be defined along with the signal indexes with the
52 constants defined in <dt-bindings/arm/coresight-cti-dt.h>
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/ |
| D | coresight-cti.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
4 ---
5 $id: http://devicetree.org/schemas/arm/coresight-cti.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
22 number is defined at design time, the maximum of each defined in the DEVID
26 programmable channels, usually 4, but again implementation defined and
32 are implementation defined, except when the CTI is connected to an ARM v8
38 indicate this feature (arm,coresight-cti-v8-arch).
52 and usages. These can be defined along with the signal indexes with the
53 constants defined in <dt-bindings/arm/coresight-cti-dt.h>
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| /kernel/linux/linux-6.6/tools/testing/selftests/powerpc/tm/ |
| D | tm.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
22 printf("PPC_FEATURE2_HTM not defined, can't check AT_HWCAP2\n"); in have_htm()
32 printf("PPC_FEATURE2_HTM_NOSC not defined, can't check AT_HWCAP2\n"); in have_htm_nosc()
38 * Transactional Memory was removed in ISA 3.1. A synthetic TM implementation
40 * synthetic implementation immediately fails after tbegin. This failure sets
41 * Bit 7 (Failure Persistent) and Bit 15 (Implementation-specific).
49 * times in case we got an Implementation-specific failure on a non ISA in htm_is_synthetic()
50 * v3.1 system. On these systems the Implementation-specific failure in htm_is_synthetic()
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| /kernel/linux/linux-5.10/Documentation/networking/device_drivers/ethernet/altera/ |
| D | altera_tse.rst | 1 .. SPDX-License-Identifier: GPL-2.0
6 Altera Triple-Speed Ethernet MAC driver
9 Copyright |copy| 2008-2014 Altera Corporation
11 This is the driver for the Altera Triple-Speed Ethernet (TSE) controllers
24 The Triple-Speed Ethernet, SGDMA, and MSGDMA components are all soft IP
31 Triple-Speed Ethernet instance is using an SGDMA or MSGDMA component. The
36 The SGDMA component is to be deprecated in the near future (over the next 1-2
46 Scatter-gather DMA is not supported by the SGDMA or MSGDMA at this time.
47 Scatter-gather DMA will be added to a future maintenance update to this
60 Device Drivers ---> Network device support ---> Ethernet driver support --->
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| /kernel/linux/linux-6.6/Documentation/networking/device_drivers/ethernet/altera/ |
| D | altera_tse.rst | 1 .. SPDX-License-Identifier: GPL-2.0
6 Altera Triple-Speed Ethernet MAC driver
9 Copyright |copy| 2008-2014 Altera Corporation
11 This is the driver for the Altera Triple-Speed Ethernet (TSE) controllers
24 The Triple-Speed Ethernet, SGDMA, and MSGDMA components are all soft IP
31 Triple-Speed Ethernet instance is using an SGDMA or MSGDMA component. The
36 The SGDMA component is to be deprecated in the near future (over the next 1-2
46 Scatter-gather DMA is not supported by the SGDMA or MSGDMA at this time.
47 Scatter-gather DMA will be added to a future maintenance update to this
60 Device Drivers ---> Network device support ---> Ethernet driver support --->
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| /kernel/linux/linux-6.6/arch/arm/include/asm/ |
| D | cp15.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
14 #define CR_P (1 << 4) /* 32-bit exception handler */
15 #define CR_D (1 << 5) /* 32-bit data address range */
16 #define CR_L (1 << 6) /* Implementation defined */
20 #define CR_F (1 << 10) /* Implementation defined */
21 #define CR_Z (1 << 11) /* Implementation defined */
55 extern unsigned long cr_alignment; /* defined in entry-armv.S */
109 * read-only) is fine for most cases and saves quite some #ifdeffery.
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| /kernel/linux/linux-5.10/arch/arm/include/asm/ |
| D | cp15.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
14 #define CR_P (1 << 4) /* 32-bit exception handler */
15 #define CR_D (1 << 5) /* 32-bit data address range */
16 #define CR_L (1 << 6) /* Implementation defined */
20 #define CR_F (1 << 10) /* Implementation defined */
21 #define CR_Z (1 << 11) /* Implementation defined */
55 extern unsigned long cr_alignment; /* defined in entry-armv.S */
109 * read-only) is fine for most cases and saves quite some #ifdeffery.
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| /kernel/linux/linux-6.6/include/uapi/linux/ |
| D | tee.h | 2 * Copyright (c) 2015-2016, Linaro Limited
52 #define TEE_MEMREF_NULL (__u64)(-1) /* NULL MemRef Buffer */
55 * TEE Implementation ID
61 * OP-TEE specific capabilities
66 * struct tee_ioctl_version_data - TEE version
67 * @impl_id: [out] TEE implementation id
68 * @impl_caps: [out] Implementation specific capabilities
69 * @gen_caps: [out] Generic capabilities, defined by TEE_GEN_CAPS_* above
71 * Identifies the TEE implementation, @impl_id is one of TEE_IMPL_ID_* above.
72 * @impl_caps is implementation specific, for example TEE_OPTEE_CAP_*
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| /kernel/linux/linux-5.10/arch/openrisc/include/asm/ |
| D | unaligned.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
9 * OpenRISC implementation:
11 * Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se>
19 * This is copied from the generic implementation and the C-struct
21 * for the OR32 arch optimizes too aggressively for the C-struct
31 #if defined(__LITTLE_ENDIAN)
37 #elif defined(__BIG_ENDIAN)
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| /kernel/linux/linux-5.10/Documentation/networking/caif/ |
| D | linux_caif.rst | 1 .. SPDX-License-Identifier: GPL-2.0
8 Copyright |copy| ST-Ericsson AB 2010
17 CAIF is a MUX protocol used by ST-Ericsson cellular modems for
22 ST-Ericsson modems support a number of transports between modem
29 The implementation of CAIF is divided into:
32 * CAIF Core Protocol Implementation
39 ! +------+ +------+
40 ! +------+! +------+!
42 +-------> !interf!+ ! API !+ <- CAIF Client APIs
43 ! +------+ +------!
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| /kernel/linux/linux-6.6/Documentation/networking/caif/ |
| D | linux_caif.rst | 1 .. SPDX-License-Identifier: GPL-2.0
8 Copyright |copy| ST-Ericsson AB 2010
17 CAIF is a MUX protocol used by ST-Ericsson cellular modems for
22 ST-Ericsson modems support a number of transports between modem
29 The implementation of CAIF is divided into:
32 * CAIF Core Protocol Implementation
39 ! +------+ +------+
40 ! +------+! +------+!
42 +-------> !interf!+ ! API !+ <- CAIF Client APIs
43 ! +------+ +------!
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| /kernel/linux/linux-5.10/include/linux/soundwire/ |
| D | sdw.h | 1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
2 /* Copyright(c) 2015-17 Intel Corporation. */
13 /* SDW spec defines and enums, as defined by MIPI 1.1. Spec */
71 * enum sdw_slave_status - Slave status
89 * @SDW_CLK_PRE_DEPREPARE: pre clock stop de-prepare
90 * @SDW_CLK_POST_DEPREPARE: post clock stop de-prepare
100 * enum sdw_command_response - Command response as defined by SDW spec
110 * SDW_CMD_TIMEOUT/FAIL_OTHER is defined for SW use, not in spec
134 * spec doesn't define this, but is used in implementation
173 * SDW properties, defined in MIPI DisCo spec v1.0
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| /kernel/linux/linux-5.10/Documentation/driver-api/ |
| D | io-mapping.rst | 8 The io_mapping functions in linux/io-mapping.h provide an abstraction for
10 usage is to support the large graphics aperture on 32-bit processors where
33 'offset' is the offset within the defined mapping region.
39 This _wc variant returns a write-combining map to the
54 If you need to sleep while holding the lock, you can use the non-atomic
77 Current Implementation
80 The initial implementation of these functions uses existing mapping
84 On 64-bit processors, io_mapping_create_wc calls ioremap_wc for the whole
85 range, creating a permanent kernel-visible mapping to the resource. The
89 On 32-bit processors with HIGHMEM defined, io_mapping_map_atomic_wc uses
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| /kernel/linux/linux-5.10/Documentation/livepatch/ |
| D | livepatch.rst | 15 5. Livepatch life-cycle
43 - The kernel probes are the most generic. The code can be redirected by
46 - The function tracer calls the code from a predefined location that is
48 compiler using the '-pg' gcc option.
50 - Livepatching typically needs to redirect the code at the very beginning
67 release locks, read, process, and even write some data in a defined way,
68 have return values. In other words, each function has a defined semantic.
87 The aim is to define a so-called consistency model. It attempts to define
88 conditions when the new implementation could be used so that the system
92 kpatch: it uses kGraft's per-task consistency and syscall barrier
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| /kernel/linux/linux-6.6/Documentation/livepatch/ |
| D | livepatch.rst | 30 - The kernel probes are the most generic. The code can be redirected by
33 - The function tracer calls the code from a predefined location that is
35 compiler using the '-pg' gcc option.
37 - Livepatching typically needs to redirect the code at the very beginning
54 release locks, read, process, and even write some data in a defined way,
55 have return values. In other words, each function has a defined semantic.
74 The aim is to define a so-called consistency model. It attempts to define
75 conditions when the new implementation could be used so that the system
79 kpatch: it uses kGraft's per-task consistency and syscall barrier
83 Patches are applied on a per-task basis, when the task is deemed safe to
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| /kernel/linux/linux-6.6/Documentation/driver-api/soundwire/ |
| D | summary.rst | 10 SoundWire is a 2-pin multi-drop interface with data and clock line. It
15 commands over a single two-pin interface.
23 (4) Device status monitoring, including interrupt-style alerts to the Master.
38 +---------------+ +---------------+
40 | Master |-------+-------------------------------| Slave |
42 | |-------|-------+-----------------------| |
43 +---------------+ | | +---------------+
47 +--+-------+--+
52 +-------------+
64 3rd-party vendors to enable implementation-defined functionality while
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| /kernel/linux/linux-5.10/Documentation/driver-api/soundwire/ |
| D | summary.rst | 10 SoundWire is a 2-pin multi-drop interface with data and clock line. It
15 commands over a single two-pin interface.
23 (4) Device status monitoring, including interrupt-style alerts to the Master.
38 +---------------+ +---------------+
40 | Master |-------+-------------------------------| Slave |
42 | |-------|-------+-----------------------| |
43 +---------------+ | | +---------------+
47 +--+-------+--+
52 +-------------+
64 3rd-party vendors to enable implementation-defined functionality while
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| /kernel/linux/linux-5.10/include/uapi/linux/ |
| D | tee.h | 2 * Copyright (c) 2015-2016, Linaro Limited
47 #define TEE_IOCTL_SHM_DMA_BUF 0x2 /* dma-buf handle on shared memory */
56 #define TEE_MEMREF_NULL (__u64)(-1) /* NULL MemRef Buffer */
59 * TEE Implementation ID
65 * OP-TEE specific capabilities
70 * struct tee_ioctl_version_data - TEE version
71 * @impl_id: [out] TEE implementation id
72 * @impl_caps: [out] Implementation specific capabilities
73 * @gen_caps: [out] Generic capabilities, defined by TEE_GEN_CAPS_* above
75 * Identifies the TEE implementation, @impl_id is one of TEE_IMPL_ID_* above.
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| /kernel/linux/linux-6.6/Documentation/virt/kvm/devices/ |
| D | arm-vgic.rst | 1 .. SPDX-License-Identifier: GPL-2.0
9 - KVM_DEV_TYPE_ARM_VGIC_V2 ARM Generic Interrupt Controller v2.0
13 controller, requiring emulated user-space devices to inject interrupts to the
18 device and guest ITS devices, see arm-vgic-v3.txt. It is not possible to
26 KVM_VGIC_V2_ADDR_TYPE_DIST (rw, 64-bit)
31 KVM_VGIC_V2_ADDR_TYPE_CPU (rw, 64-bit)
39 -E2BIG Address outside of addressable IPA range
40 -EINVAL Incorrectly aligned address
41 -EEXIST Address already configured
42 -ENXIO The group or attribute is unknown/unsupported for this device
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| /kernel/linux/linux-5.10/Documentation/virt/kvm/devices/ |
| D | arm-vgic.rst | 1 .. SPDX-License-Identifier: GPL-2.0
9 - KVM_DEV_TYPE_ARM_VGIC_V2 ARM Generic Interrupt Controller v2.0
13 controller, requiring emulated user-space devices to inject interrupts to the
18 device and guest ITS devices, see arm-vgic-v3.txt. It is not possible to
26 KVM_VGIC_V2_ADDR_TYPE_DIST (rw, 64-bit)
31 KVM_VGIC_V2_ADDR_TYPE_CPU (rw, 64-bit)
39 -E2BIG Address outside of addressable IPA range
40 -EINVAL Incorrectly aligned address
41 -EEXIST Address already configured
42 -ENXIO The group or attribute is unknown/unsupported for this device
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| /kernel/linux/linux-5.10/tools/lib/ |
| D | find_bit.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* bit search implementation
11 * (Inspired by David Howell's find_next_bit implementation)
21 #if !defined(find_next_bit) || !defined(find_next_zero_bit) || \
22 !defined(find_next_and_bit)
27 * - The "invert" argument, which is XORed with each fetched word before
29 * - The optional "addr2", which is anded with "addr1" if present.
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| /kernel/linux/linux-5.10/lib/ |
| D | find_bit.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* bit search implementation
9 * (Inspired by David Howell's find_next_bit implementation)
21 #if !defined(find_next_bit) || !defined(find_next_zero_bit) || \
22 !defined(find_next_bit_le) || !defined(find_next_zero_bit_le) || \
23 !defined(find_next_and_bit)
27 * - The "invert" argument, which is XORed with each fetched word before
29 * - The optional "addr2", which is anded with "addr1" if present.
93 #if !defined(find_next_and_bit)
144 unsigned long idx = (size-1) / BITS_PER_LONG; in find_last_bit()
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