Searched +full:imx51 +full:- +full:src (Results 1 – 25 of 43) sorted by relevance
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/reset/ |
| D | fsl,imx-src.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/reset/fsl,imx-src.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Philipp Zabel <p.zabel@pengutronix.de> 15 nodes should specify the reset line on the SRC in their resets 16 property, containing a phandle to the SRC device node and a 31 - const: "fsl,imx51-src" 32 - items: 33 - const: "fsl,imx50-src" [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/reset/ |
| D | fsl,imx-src.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/reset/fsl,imx-src.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Philipp Zabel <p.zabel@pengutronix.de> 15 nodes should specify the reset line on the SRC in their resets 16 property, containing a phandle to the SRC device node and a 31 - const: "fsl,imx51-src" 32 - items: 33 - const: "fsl,imx50-src" [all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | imx51.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include "imx51-pinfunc.h" 7 #include <dt-bindings/clock/imx5-clock.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 13 #address-cells = <1>; 14 #size-cells = <1>; 17 * pre-existing /chosen node to be available to insert the 42 tzic: tz-interrupt-controller@e0000000 { [all …]
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| D | imx50.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 7 #include "imx50-pinfunc.h" 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/clock/imx5-clock.h> 12 #address-cells = <1>; 13 #size-cells = <1>; 16 * pre-existing /chosen node to be available to insert the 47 #address-cells = <1>; 48 #size-cells = <0>; 51 compatible = "arm,cortex-a8"; [all …]
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| D | imx53.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include "imx53-pinfunc.h" 7 #include <dt-bindings/clock/imx5-clock.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 13 #address-cells = <1>; 14 #size-cells = <1>; 17 * pre-existing /chosen node to be available to insert the 50 #address-cells = <1>; [all …]
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| D | imx6sll.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 4 * Copyright 2017-2018 NXP. 8 #include <dt-bindings/clock/imx6sll-clock.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include "imx6sll-pinfunc.h" 14 #address-cells = <1>; 15 #size-cells = <1>; 46 #address-cells = <1>; 47 #size-cells = <0>; [all …]
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| D | imx6qdl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/clock/imx6qdl-clock.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 15 * pre-existing /chosen node to be available to insert the 58 compatible = "fsl,imx-ckil", "fixed-clock"; 59 #clock-cells = <0>; 60 clock-frequency = <32768>; [all …]
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| D | imx6sl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/interrupt-controller/irq.h> 6 #include "imx6sl-pinfunc.h" 7 #include <dt-bindings/clock/imx6sl-clock.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 14 * pre-existing /chosen node to be available to insert the 50 #address-cells = <1>; 51 #size-cells = <0>; 54 compatible = "arm,cortex-a9"; [all …]
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| D | imx6sx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/clock/imx6sx-clock.h> 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include "imx6sx-pinfunc.h" 12 #address-cells = <1>; 13 #size-cells = <1>; 16 * pre-existing /chosen node to be available to insert the 60 #address-cells = <1>; [all …]
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| D | imx6ul.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/clock/imx6ul-clock.h> 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include "imx6ul-pinfunc.h" 12 #address-cells = <1>; 13 #size-cells = <1>; 16 * pre-existing /chosen node to be available to insert the 57 #address-cells = <1>; [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/nxp/imx/ |
| D | imx51.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include "imx51-pinfunc.h" 7 #include <dt-bindings/clock/imx5-clock.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 13 #address-cells = <1>; 14 #size-cells = <1>; 17 * pre-existing /chosen node to be available to insert the 42 tzic: tz-interrupt-controller@e0000000 { [all …]
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| D | imx50.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 7 #include "imx50-pinfunc.h" 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/clock/imx5-clock.h> 12 #address-cells = <1>; 13 #size-cells = <1>; 16 * pre-existing /chosen node to be available to insert the 47 #address-cells = <1>; 48 #size-cells = <0>; 51 compatible = "arm,cortex-a8"; [all …]
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| D | imx53.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include "imx53-pinfunc.h" 7 #include <dt-bindings/clock/imx5-clock.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 13 #address-cells = <1>; 14 #size-cells = <1>; 17 * pre-existing /chosen node to be available to insert the 50 #address-cells = <1>; [all …]
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| D | imx6sll.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 4 * Copyright 2017-2018 NXP. 8 #include <dt-bindings/clock/imx6sll-clock.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include "imx6sll-pinfunc.h" 14 #address-cells = <1>; 15 #size-cells = <1>; 46 #address-cells = <1>; 47 #size-cells = <0>; [all …]
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| D | imx6qdl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/clock/imx6qdl-clock.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 15 * pre-existing /chosen node to be available to insert the 58 compatible = "fixed-clock"; 59 #clock-cells = <0>; 60 clock-frequency = <32768>; [all …]
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| D | imx6sl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/interrupt-controller/irq.h> 6 #include "imx6sl-pinfunc.h" 7 #include <dt-bindings/clock/imx6sl-clock.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 14 * pre-existing /chosen node to be available to insert the 50 #address-cells = <1>; 51 #size-cells = <0>; 54 compatible = "arm,cortex-a9"; [all …]
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| D | imx6sx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/clock/imx6sx-clock.h> 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include "imx6sx-pinfunc.h" 12 #address-cells = <1>; 13 #size-cells = <1>; 16 * pre-existing /chosen node to be available to insert the 60 #address-cells = <1>; [all …]
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| D | imx6ul.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/clock/imx6ul-clock.h> 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include "imx6ul-pinfunc.h" 12 #address-cells = <1>; 13 #size-cells = <1>; 16 * pre-existing /chosen node to be available to insert the 57 #address-cells = <1>; [all …]
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| /kernel/linux/linux-6.6/arch/arm/mach-imx/ |
| D | src.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 13 #include <linux/reset-controller.h> 61 return -EINVAL; in imx_src_reset_module() 74 return -ETIME; in imx_src_reset_module() 132 mask = 1 << (BP_SRC_A7RCR1_A7_CORE1_ENABLE + cpu - 1); in imx_enable_cpu() 137 mask = 1 << (BP_SRC_SCR_CORE1_ENABLE + cpu - 1); in imx_enable_cpu() 140 val |= 1 << (BP_SRC_SCR_CORE1_RST + cpu - 1); in imx_enable_cpu() 170 np = of_find_compatible_node(NULL, NULL, "fsl,imx51-src"); in imx_src_init() 193 np = of_find_compatible_node(NULL, NULL, "fsl,imx7d-src"); in imx7_src_init() 201 np = of_find_compatible_node(NULL, NULL, "fsl,imx7d-gpc"); in imx7_src_init() [all …]
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| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 2 obj-y := cpu.o system.o irq-common.o 4 obj-$(CONFIG_SOC_IMX25) += cpu-imx25.o mach-imx25.o pm-imx25.o 6 obj-$(CONFIG_SOC_IMX27) += cpu-imx27.o pm-imx27.o mach-imx27.o 8 obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o mach-imx31.o 9 obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o mach-imx35.o 11 imx5-pm-$(CONFIG_PM) += pm-imx5.o 12 obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o $(imx5-pm-y) 14 obj-$(CONFIG_MXC_TZIC) += tzic.o 15 obj-$(CONFIG_MXC_AVIC) += avic.o [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/media/ |
| D | coda.txt | 1 Chips&Media Coda multi-standard codec IP 8 - compatible : should be "fsl,<chip>-src" for i.MX SoCs: 9 (a) "fsl,imx27-vpu" for CodaDx6 present in i.MX27 10 (b) "fsl,imx51-vpu" for CodaHx4 present in i.MX51 11 (c) "fsl,imx53-vpu" for CODA7541 present in i.MX53 12 (d) "fsl,imx6q-vpu" for CODA960 present in i.MX6q 13 - reg: should be register base and length as documented in the 15 - interrupts : Should contain the VPU interrupt. For CODA960, 17 - clocks : Should contain the ahb and per clocks, in the order 18 determined by the clock-names property. [all …]
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| /kernel/linux/linux-5.10/arch/arm/mach-imx/ |
| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 2 obj-y := cpu.o system.o irq-common.o 4 obj-$(CONFIG_SOC_IMX25) += cpu-imx25.o mach-imx25.o pm-imx25.o 6 obj-$(CONFIG_SOC_IMX27) += cpu-imx27.o pm-imx27.o mach-imx27.o 8 obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o mach-imx31.o 9 obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o mach-imx35.o 11 imx5-pm-$(CONFIG_PM) += pm-imx5.o 12 obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o $(imx5-pm-y) 14 obj-$(CONFIG_MXC_TZIC) += tzic.o 15 obj-$(CONFIG_MXC_AVIC) += avic.o [all …]
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| D | src.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 11 #include <linux/reset-controller.h> 47 return -EINVAL; in imx_src_reset_module() 60 return -ETIME; in imx_src_reset_module() 81 mask = 1 << (BP_SRC_SCR_CORE1_ENABLE + cpu - 1); in imx_enable_cpu() 85 val |= 1 << (BP_SRC_SCR_CORE1_RST + cpu - 1); in imx_enable_cpu() 114 np = of_find_compatible_node(NULL, NULL, "fsl,imx51-src"); in imx_src_init()
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/imx/ |
| D | fsl-imx-drm.txt | 8 - compatible: Should be "fsl,imx-display-subsystem" 9 - ports: Should contain a list of phandles pointing to display interface ports 14 display-subsystem { 15 compatible = "fsl,imx-display-subsystem"; 24 - compatible: Should be "fsl,<chip>-ipu" where <chip> is one of 25 - imx51 26 - imx53 27 - imx6q 28 - imx6qp 29 - reg: should be register base and length as documented in the [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/imx/ |
| D | fsl-imx-drm.txt | 8 - compatible: Should be "fsl,imx-display-subsystem" 9 - ports: Should contain a list of phandles pointing to display interface ports 14 display-subsystem { 15 compatible = "fsl,display-subsystem"; 24 - compatible: Should be "fsl,<chip>-ipu" where <chip> is one of 25 - imx51 26 - imx53 27 - imx6q 28 - imx6qp 29 - reg: should be register base and length as documented in the [all …]
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