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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/bridge/
Dadi,adv7511.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
15 space conversion, S/PDIF, CEC and HDCP. The transmitter input is
21 - adi,adv7511
22 - adi,adv7511w
23 - adi,adv7513
37 reg-names:
40 needing a non-default address.
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/bridge/
Dadi,adv7511.txt2 ------------------------------------------------
6 conversion, S/PDIF, CEC and HDCP. ADV7533/5 supports the DSI interface for input
11 - compatible: Should be one of:
18 - reg: I2C slave addresses
26 The ADV7511 supports a large number of input data formats that differ by their
27 color depth, color format, clock mode, bit justification and random
29 properties describe the input and map directly to the video input tables of the
32 - adi,input-depth: Number of bits per color component at the input (8, 10 or
34 - adi,input-colorspace: The input color space, one of "rgb", "yuv422" or
36 - adi,input-clock: The input clock type, one of "1x" (one clock cycle per
[all …]
/kernel/linux/linux-5.10/include/sound/
Dcs8427.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
14 #define CS8427_REG_AUTOINC 0x80 /* flag - autoincrement */
34 #define CS8427_REG_QSUBCODE 0x14 /* 0x14-0x1d (10 bytes) */
48 #define CS8427_TCBLDIR (1<<0) /* 0 = TCBL is an input, 1 = TCBL is an output */
63 #define CS8427_AESBP (1<<5) /* AES3 hardware bypass mode, 0 = normal, 1 = bypass (RX->TX) */
65 #define CS8427_TXDSERIAL (1<<3) /* TXD - serial audio input port */
66 #define CS8427_TXAES3DRECEIVER (2<<3) /* TXD - AES3 receiver */
68 #define CS8427_SPDSERIAL (1<<1) /* SPD - serial audio input port */
69 #define CS8427_SPDAES3RECEIVER (2<<1) /* SPD - AES3 receiver */
77 #define CS8427_OUTC (1<<3) /* Output Time Base, 0 = OMCK, 1 = recovered input clock */
[all …]
/kernel/linux/linux-6.6/include/sound/
Dcs8427.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
14 #define CS8427_REG_AUTOINC 0x80 /* flag - autoincrement */
34 #define CS8427_REG_QSUBCODE 0x14 /* 0x14-0x1d (10 bytes) */
48 #define CS8427_TCBLDIR (1<<0) /* 0 = TCBL is an input, 1 = TCBL is an output */
63 #define CS8427_AESBP (1<<5) /* AES3 hardware bypass mode, 0 = normal, 1 = bypass (RX->TX) */
65 #define CS8427_TXDSERIAL (1<<3) /* TXD - serial audio input port */
66 #define CS8427_TXAES3DRECEIVER (2<<3) /* TXD - AES3 receiver */
68 #define CS8427_SPDSERIAL (1<<1) /* SPD - serial audio input port */
69 #define CS8427_SPDAES3RECEIVER (2<<1) /* SPD - AES3 receiver */
77 #define CS8427_OUTC (1<<3) /* Output Time Base, 0 = OMCK, 1 = recovered input clock */
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/i2c/
Di2c-demux-pinctrl.txt1 Pinctrl-based I2C Bus DeMux
10 +-------------------------------+
12 | | +-----+ +-----+
13 | +------------+ | | dev | | dev |
14 | |I2C IP Core1|--\ | +-----+ +-----+
15 | +------------+ \-------+ | | |
16 | |Pinctrl|--|------+--------+
17 | +------------+ +-------+ |
18 | |I2C IP Core2|--/ |
19 | +------------+ |
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/i2c/
Di2c-demux-pinctrl.txt1 Pinctrl-based I2C Bus DeMux
10 +-------------------------------+
12 | | +-----+ +-----+
13 | +------------+ | | dev | | dev |
14 | |I2C IP Core1|--\ | +-----+ +-----+
15 | +------------+ \-------+ | | |
16 | |Pinctrl|--|------+--------+
17 | +------------+ +-------+ |
18 | |I2C IP Core2|--/ |
19 | +------------+ |
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dzynq-zc706.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 - 2014 Xilinx
6 /dts-v1/;
7 #include "zynq-7000.dtsi"
11 compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000";
27 stdout-path = "serial0:115200n8";
31 compatible = "usb-nop-xceiv";
32 #phy-cells = <0>;
37 ps-clk-frequency = <33333333>;
42 phy-mode = "rgmii-id";
[all …]
Dzynq-zc702.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 - 2014 Xilinx
6 /dts-v1/;
7 #include "zynq-7000.dtsi"
11 compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
27 stdout-path = "serial0:115200n8";
30 gpio-keys {
31 compatible = "gpio-keys";
37 wakeup-source;
44 wakeup-source;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/xilinx/
Dzynq-zc706.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 - 2014 Xilinx
6 /dts-v1/;
7 #include "zynq-7000.dtsi"
11 compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000";
27 stdout-path = "serial0:115200n8";
31 compatible = "usb-nop-xceiv";
32 #phy-cells = <0>;
37 ps-clk-frequency = <33333333>;
42 phy-mode = "rgmii-id";
[all …]
Dzynq-zc702.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 - 2014 Xilinx
6 /dts-v1/;
7 #include "zynq-7000.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
12 compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
28 stdout-path = "serial0:115200n8";
31 gpio-keys {
32 compatible = "gpio-keys";
34 switch-14 {
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/omapdrm/dss/
Dhdmi4_core.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/
32 return core->base + HDMI_CORE_AV; in hdmi_av_base()
37 void __iomem *base = core->base; in hdmi4_core_ddc_init()
50 return -ETIMEDOUT; in hdmi4_core_ddc_init()
61 return -ETIMEDOUT; in hdmi4_core_ddc_init()
71 return -ETIMEDOUT; in hdmi4_core_ddc_init()
80 void __iomem *base = core->base; in hdmi4_core_ddc_read()
87 return -ETIMEDOUT; in hdmi4_core_ddc_read()
112 return -EIO; in hdmi4_core_ddc_read()
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/omapdrm/dss/
Dhdmi4_core.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com/
32 return core->base + HDMI_CORE_AV; in hdmi_av_base()
37 void __iomem *base = core->base; in hdmi4_core_ddc_init()
50 return -ETIMEDOUT; in hdmi4_core_ddc_init()
61 return -ETIMEDOUT; in hdmi4_core_ddc_init()
71 return -ETIMEDOUT; in hdmi4_core_ddc_init()
80 void __iomem *base = core->base; in hdmi4_core_ddc_read()
87 return -ETIMEDOUT; in hdmi4_core_ddc_read()
112 return -EIO; in hdmi4_core_ddc_read()
[all …]
/kernel/linux/linux-5.10/drivers/video/fbdev/omap2/omapfb/dss/
Dhdmi4_core.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com/
33 return core->base + HDMI_CORE_AV; in hdmi_av_base()
38 void __iomem *base = core->base; in hdmi_core_ddc_init()
51 return -ETIMEDOUT; in hdmi_core_ddc_init()
62 return -ETIMEDOUT; in hdmi_core_ddc_init()
72 return -ETIMEDOUT; in hdmi_core_ddc_init()
81 void __iomem *base = core->base; in hdmi_core_ddc_edid()
90 return -ETIMEDOUT; in hdmi_core_ddc_edid()
118 return -EIO; in hdmi_core_ddc_edid()
[all …]
/kernel/linux/linux-6.6/drivers/video/fbdev/omap2/omapfb/dss/
Dhdmi4_core.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com/
33 return core->base + HDMI_CORE_AV; in hdmi_av_base()
38 void __iomem *base = core->base; in hdmi_core_ddc_init()
51 return -ETIMEDOUT; in hdmi_core_ddc_init()
62 return -ETIMEDOUT; in hdmi_core_ddc_init()
72 return -ETIMEDOUT; in hdmi_core_ddc_init()
81 void __iomem *base = core->base; in hdmi_core_ddc_edid()
90 return -ETIMEDOUT; in hdmi_core_ddc_edid()
118 return -EIO; in hdmi_core_ddc_edid()
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/bridge/adv7511/
Dadv7511.h1 /* SPDX-License-Identifier: GPL-2.0-only */
62 #define ADV7511_REG_GC(x) (0x4b + (x)) /* 0x4b - 0x51 */
66 #define ADV7511_REG_AVI_INFOFRAME(x) (0x55 + (x)) /* 0x55 - 0x6f */
70 #define ADV7511_REG_AUDIO_INFOFRAME(x) (0x73 + (x)) /* 0x73 - 0x7c */
77 #define ADV7511_REG_AN(x) (0xb0 + (x)) /* 0xb0 - 0xb7 */
80 #define ADV7511_REG_BKSV(x) (0xc0 + (x)) /* 0xc0 - 0xc3 */
84 #define ADV7511_REG_BSTATUS(x) (0xca + (x)) /* 0xca - 0xcb */
89 #define ADV7511_REG_SYNC_ADJUSTMENT(x) (0xd7 + (x)) /* 0xd7 - 0xdc */
251 * enum adv7511_sync_polarity - Polarity for the input sync signals
272 * struct adv7511_link_config - Describes adv7511 hardware configuration
[all …]
Dadv7511_drv.c1 // SPDX-License-Identifier: GPL-2.0-only
38 /* -----------------------------------------------------------------------------
131 /* -----------------------------------------------------------------------------
141 regmap_update_bits(adv7511->regmap, ADV7511_REG_CSC_UPPER(1), in adv7511_set_colormap()
146 regmap_update_bits(adv7511->regmap, in adv7511_set_colormap()
149 regmap_write(adv7511->regmap, in adv7511_set_colormap()
156 regmap_update_bits(adv7511->regmap, ADV7511_REG_CSC_UPPER(0), in adv7511_set_colormap()
159 regmap_update_bits(adv7511->regmap, ADV7511_REG_CSC_UPPER(0), in adv7511_set_colormap()
162 regmap_update_bits(adv7511->regmap, ADV7511_REG_CSC_UPPER(1), in adv7511_set_colormap()
169 regmap_update_bits(adv7511->regmap, ADV7511_REG_PACKET_ENABLE0, in adv7511_packet_enable()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/bridge/adv7511/
Dadv7511.h1 /* SPDX-License-Identifier: GPL-2.0-only */
62 #define ADV7511_REG_GC(x) (0x4b + (x)) /* 0x4b - 0x51 */
66 #define ADV7511_REG_AVI_INFOFRAME(x) (0x55 + (x)) /* 0x55 - 0x6f */
70 #define ADV7511_REG_AUDIO_INFOFRAME(x) (0x73 + (x)) /* 0x73 - 0x7c */
77 #define ADV7511_REG_AN(x) (0xb0 + (x)) /* 0xb0 - 0xb7 */
80 #define ADV7511_REG_BKSV(x) (0xc0 + (x)) /* 0xc0 - 0xc3 */
84 #define ADV7511_REG_BSTATUS(x) (0xca + (x)) /* 0xca - 0xcb */
89 #define ADV7511_REG_SYNC_ADJUSTMENT(x) (0xd7 + (x)) /* 0xd7 - 0xdc */
244 * enum adv7511_sync_polarity - Polarity for the input sync signals
265 * struct adv7511_link_config - Describes adv7511 hardware configuration
[all …]
Dadv7511_drv.c1 // SPDX-License-Identifier: GPL-2.0-only
38 /* -----------------------------------------------------------------------------
131 /* -----------------------------------------------------------------------------
141 regmap_update_bits(adv7511->regmap, ADV7511_REG_CSC_UPPER(1), in adv7511_set_colormap()
146 regmap_update_bits(adv7511->regmap, in adv7511_set_colormap()
149 regmap_write(adv7511->regmap, in adv7511_set_colormap()
156 regmap_update_bits(adv7511->regmap, ADV7511_REG_CSC_UPPER(0), in adv7511_set_colormap()
159 regmap_update_bits(adv7511->regmap, ADV7511_REG_CSC_UPPER(0), in adv7511_set_colormap()
162 regmap_update_bits(adv7511->regmap, ADV7511_REG_CSC_UPPER(1), in adv7511_set_colormap()
169 regmap_update_bits(adv7511->regmap, ADV7511_REG_PACKET_ENABLE0, in adv7511_packet_enable()
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/freescale/
Dimx8mn-evk.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/usb/pd.h>
11 stdout-path = &uart2;
14 gpio-leds {
15 compatible = "gpio-leds";
16 pinctrl-names = "default";
17 pinctrl-0 = <&pinctrl_gpio_led>;
22 default-state = "on";
26 hdmi-connector {
27 compatible = "hdmi-connector";
[all …]
/kernel/linux/linux-6.6/Documentation/bpf/
Dkfuncs.rst1 .. SPDX-License-Identifier: GPL-2.0
3 .. _kfuncs-header-label:
30 ----------------------------
41 __diag_ignore_all("-Wmissing-prototypes",
56 -------------------------------
64 ---------------------
80 --------------------
104 -------------------------
121 -------------------------
144 -------------------------------------
[all …]
/kernel/linux/linux-6.6/Documentation/virt/kvm/x86/
Dtimekeeping.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Timekeeping Virtualization for X86-Based Architectures
32 information relevant to KVM and hardware-based virtualization.
41 2.1. i8254 - PIT
42 ----------------
46 channels which can be programmed to deliver periodic or one-shot interrupts.
53 The PIT uses I/O ports 0x40 - 0x43. Access to the 16-bit counters is done
56 has a connected gate input, required for modes 1 and 5. The gate line is
59 -------------- ----------------
61 | 1.1932 MHz|---------->| CLOCK OUT | ---------> IRQ 0
[all …]
/kernel/linux/linux-5.10/Documentation/virt/kvm/
Dtimekeeping.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Timekeeping Virtualization for X86-Based Architectures
32 information relevant to KVM and hardware-based virtualization.
41 2.1. i8254 - PIT
42 ----------------
46 channels which can be programmed to deliver periodic or one-shot interrupts.
53 The PIT uses I/O ports 0x40 - 0x43. Access to the 16-bit counters is done
56 has a connected gate input, required for modes 1 and 5. The gate line is
59 -------------- ----------------
61 | 1.1932 MHz|---------->| CLOCK OUT | ---------> IRQ 0
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
Damdgpu_ras.c89 amdgpu_ras_get_context(adev)->error_query_ready = ready; in amdgpu_ras_set_error_query_ready()
95 return amdgpu_ras_get_context(adev)->error_query_ready; in amdgpu_ras_get_error_query_ready()
103 struct ras_manager *obj = (struct ras_manager *)file_inode(f)->i_private; in amdgpu_ras_debugfs_read()
105 .head = obj->head, in amdgpu_ras_debugfs_read()
110 if (amdgpu_ras_error_query(obj->adev, &info)) in amdgpu_ras_debugfs_read()
111 return -EINVAL; in amdgpu_ras_debugfs_read()
119 s -= *pos; in amdgpu_ras_debugfs_read()
124 return -EINVAL; in amdgpu_ras_debugfs_read()
147 return -EINVAL; in amdgpu_ras_find_block_id_by_name()
158 int op = -1; in amdgpu_ras_debugfs_ctrl_parse_data()
[all …]
/kernel/linux/linux-6.6/fs/
Dlocks.c1 // SPDX-License-Identifier: GPL-2.0-only
19 * - the root of a tree may be an applied or waiting lock.
20 * - every other node in the tree is a waiting lock that
73 #define IS_POSIX(fl) (fl->fl_flags & FL_POSIX)
74 #define IS_FLOCK(fl) (fl->fl_flags & FL_FLOCK)
75 #define IS_LEASE(fl) (fl->fl_flags & (FL_LEASE|FL_DELEG|FL_LAYOUT))
76 #define IS_OFDLCK(fl) (fl->fl_flags & FL_OFDLCK)
77 #define IS_REMOTELCK(fl) (fl->fl_pid <= 0)
81 return fl->fl_flags & (FL_UNLOCK_PENDING | FL_DOWNGRADE_PENDING); in lease_breaking()
86 if (fl->fl_flags & FL_UNLOCK_PENDING) in target_leasetype()
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
Damdgpu_ras.c96 if (ras_block->block >= AMDGPU_RAS_BLOCK_COUNT) in get_ras_block_str()
99 if (ras_block->block == AMDGPU_RAS_BLOCK__MCA) in get_ras_block_str()
100 return ras_mca_block_string[ras_block->sub_block_index]; in get_ras_block_str()
102 return ras_block_string[ras_block->block]; in get_ras_block_str()
142 amdgpu_ras_get_context(adev)->error_query_ready = ready; in amdgpu_ras_set_error_query_ready()
148 return amdgpu_ras_get_context(adev)->error_query_ready; in amdgpu_ras_get_error_query_ready()
158 if ((address >= adev->gmc.mc_vram_size) || in amdgpu_reserve_page_direct()
160 dev_warn(adev->dev, in amdgpu_reserve_page_direct()
161 "RAS WARN: input address 0x%llx is invalid.\n", in amdgpu_reserve_page_direct()
163 return -EINVAL; in amdgpu_reserve_page_direct()
[all …]

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