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/kernel/linux/linux-6.6/arch/arm/boot/dts/nxp/lpc/
Dlpc4357-ea4357-devkit.dts9 * Released under the terms of 3-clause BSD License
13 /dts-v1/;
18 #include "dt-bindings/input/input.h"
19 #include "dt-bindings/gpio/gpio.h"
23 compatible = "ea,lpc4357-developers-kit", "nxp,lpc4357", "nxp,lpc4350";
33 stdout-path = &uart0;
42 compatible = "regulator-fixed";
43 regulator-name = "3v3-supply";
44 regulator-min-microvolt = <3300000>;
45 regulator-max-microvolt = <3300000>;
[all …]
Dlpc4350-hitex-eval.dts9 * Released under the terms of 3-clause BSD License
13 /dts-v1/;
18 #include "dt-bindings/input/input.h"
19 #include "dt-bindings/gpio/gpio.h"
23 compatible = "hitex,lpc4350-eval-board", "nxp,lpc4350";
33 stdout-path = &uart0;
42 compatible = "gpio-keys-polled";
43 poll-interval = <100>;
97 compatible = "gpio-leds";
102 linux,default-trigger = "heartbeat";
[all …]
Dlpc4337-ciaa.dts2 * CIAA NXP LPC4337 (http://www.proyecto-ciaa.com.ar)
4 * Copyright (C) 2015 VanguardiaSur - www.vanguardiasur.com.ar
9 * Released under the terms of 3-clause BSD License
12 /dts-v1/;
17 #include "dt-bindings/gpio/gpio.h"
30 stdout-path = &uart2;
40 enet_rmii_pins: enet-rmii-pins {
44 slew-rate = <1>;
45 bias-disable;
46 input-enable;
[all …]
Dlpc4357-myd-lpc4357.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * MYIR Tech MYD-LPC4357 Development Board with 800x480 7" TFT panel
5 * Copyright (C) 2016-2018 Vladimir Zapolskiy <vz@mleia.com>
8 /dts-v1/;
13 #include <dt-bindings/gpio/gpio.h>
17 compatible = "myir,myd-lpc4357", "nxp,lpc4357";
20 stdout-path = "serial3:115200n8";
29 compatible = "gpio-leds";
30 pinctrl-names = "default";
31 pinctrl-0 = <&led_pins>;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dlpc4357-ea4357-devkit.dts9 * Released under the terms of 3-clause BSD License
13 /dts-v1/;
18 #include "dt-bindings/input/input.h"
19 #include "dt-bindings/gpio/gpio.h"
23 compatible = "ea,lpc4357-developers-kit", "nxp,lpc4357", "nxp,lpc4350";
33 stdout-path = &uart0;
42 compatible = "regulator-fixed";
43 regulator-name = "3v3-supply";
44 regulator-min-microvolt = <3300000>;
45 regulator-max-microvolt = <3300000>;
[all …]
Dlpc4350-hitex-eval.dts9 * Released under the terms of 3-clause BSD License
13 /dts-v1/;
18 #include "dt-bindings/input/input.h"
19 #include "dt-bindings/gpio/gpio.h"
23 compatible = "hitex,lpc4350-eval-board", "nxp,lpc4350";
33 stdout-path = &uart0;
42 compatible = "gpio-keys-polled";
43 poll-interval = <100>;
97 compatible = "gpio-leds";
102 linux,default-trigger = "heartbeat";
[all …]
Dlpc4337-ciaa.dts2 * CIAA NXP LPC4337 (http://www.proyecto-ciaa.com.ar)
4 * Copyright (C) 2015 VanguardiaSur - www.vanguardiasur.com.ar
9 * Released under the terms of 3-clause BSD License
12 /dts-v1/;
17 #include "dt-bindings/gpio/gpio.h"
30 stdout-path = &uart2;
40 enet_rmii_pins: enet-rmii-pins {
44 slew-rate = <1>;
45 bias-disable;
46 input-enable;
[all …]
Dlpc4357-myd-lpc4357.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * MYIR Tech MYD-LPC4357 Development Board with 800x480 7" TFT panel
5 * Copyright (C) 2016-2018 Vladimir Zapolskiy <vz@mleia.com>
8 /dts-v1/;
13 #include <dt-bindings/gpio/gpio.h>
17 compatible = "myir,myd-lpc4357", "nxp,lpc4357";
20 stdout-path = "serial3:115200n8";
29 compatible = "gpio-leds";
30 pinctrl-names = "default";
31 pinctrl-0 = <&led_pins>;
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/
Dstarfive,jh7100-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/starfive,jh7100-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 Bindings for the JH7100 RISC-V SoC from StarFive Ltd.
14 configurable bias, drive strength, schmitt trigger etc. The SoC has an
15 interesting 2-layered approach to pin muxing best illustrated by the diagram
21 LCD output -----------------| |
22 CMOS Camera interface ------| |--- PAD_GPIO[0]
23 Ethernet PHY interface -----| MUX |--- PAD_GPIO[1]
[all …]
Dstarfive,jh7110-sys-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/starfive,jh7110-sys-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 Bindings for the JH7110 RISC-V SoC from StarFive Technology Ltd.
14 schmitt trigger etc.
21 - Jianlong Huang <jianlong.huang@starfivetech.com>
25 const: starfive,jh7110-sys-pinctrl
39 interrupt-controller: true
41 '#interrupt-cells':
[all …]
Dstarfive,jh7110-aon-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/starfive,jh7110-aon-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 Bindings for the JH7110 RISC-V SoC from StarFive Technology Ltd.
14 schmitt trigger etc.
18 - Jianlong Huang <jianlong.huang@starfivetech.com>
22 const: starfive,jh7110-aon-pinctrl
33 interrupt-controller: true
35 '#interrupt-cells':
[all …]
Dsprd,sc9860-pinctrl.txt7 - compatible: Must be "sprd,sc9860-pinctrl".
8 - reg: The register address of pin controller device.
9 - pins : An array of strings, each string containing the name of a pin.
12 - function: A string containing the name of the function, values must be
14 - drive-strength: Drive strength in mA. Supported values: 2, 4, 6, 8, 10,
16 - input-schmitt-disable: Enable schmitt-trigger mode.
17 - input-schmitt-enable: Disable schmitt-trigger mode.
18 - bias-disable: Disable pin bias.
19 - bias-pull-down: Pull down on pin.
20 - bias-pull-up: Pull up on pin. Supported values: 20000 for pull-up resistor
[all …]
Dpincfg-node.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/pincfg-node.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
21 bias-disable:
23 description: disable any pin bias
25 bias-high-impedance:
27 description: high impedance mode ("third-state", "floating")
29 bias-bus-hold:
[all …]
Dsprd,pinctrl.txt16 of them, so we can not make every Spreadtrum-special configuration
35 - input-enable
36 - input-disable
37 - output-high
38 - output-low
39 - bias-pull-up
40 - bias-pull-down
46 and set the pin sleep related configuration as "input-enable", which
48 input enable automatically.
54 "sprd,sleep-mode" property to set pin sleep mode.
[all …]
Dnxp,lpc1850-scu.txt2 --------------------------------------------------------
5 - compatible : Should be "nxp,lpc1850-scu"
6 - reg : Address and length of the register set for the device
7 - clocks : Clock specifier (see clock bindings for details)
9 The lpc1850-scu driver uses the generic pin multiplexing and generic pin
10 configuration documented in pinctrl-bindings.txt.
13 - function
14 - pins
15 - bias-disable
16 - bias-pull-up
[all …]
/kernel/linux/linux-6.6/arch/riscv/boot/dts/starfive/
Djh7110-starfive-visionfive-2.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
9 #include "jh7110-pinfunc.h"
10 #include <dt-bindings/gpio/gpio.h>
26 stdout-path = "serial0:115200n8";
30 timebase-frequency = <4000000>;
38 gpio-restart {
39 compatible = "gpio-restart";
46 clock-frequency = <74250000>;
50 clock-frequency = <125000000>;
[all …]
Djh7100-common.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/pinctrl/pinctrl-starfive-jh7100.h>
19 stdout-path = "serial0:115200n8";
23 timebase-frequency = <6250000>;
32 compatible = "gpio-leds";
34 led-ack {
38 linux,default-trigger = "heartbeat";
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dpincfg-node.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/pincfg-node.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
21 bias-disable:
23 description: disable any pin bias
25 bias-high-impedance:
27 description: high impedance mode ("third-state", "floating")
29 bias-bus-hold:
[all …]
Dsprd,sc9860-pinctrl.txt7 - compatible: Must be "sprd,sc9860-pinctrl".
8 - reg: The register address of pin controller device.
9 - pins : An array of strings, each string containing the name of a pin.
12 - function: A string containing the name of the function, values must be
14 - drive-strength: Drive strength in mA. Supported values: 2, 4, 6, 8, 10,
16 - input-schmitt-disable: Enable schmitt-trigger mode.
17 - input-schmitt-enable: Disable schmitt-trigger mode.
18 - bias-disable: Disable pin bias.
19 - bias-pull-down: Pull down on pin.
20 - bias-pull-up: Pull up on pin. Supported values: 20000 for pull-up resistor
[all …]
Dsprd,pinctrl.txt16 of them, so we can not make every Spreadtrum-special configuration
35 - input-enable
36 - input-disable
37 - output-high
38 - output-low
39 - bias-pull-up
40 - bias-pull-down
46 and set the pin sleep related configuration as "input-enable", which
48 input enable automatically.
54 "sprd,sleep-mode" property to set pin sleep mode.
[all …]
Dbrcm,bcm11351-pinctrl.txt10 - compatible: Must be "brcm,bcm11351-pinctrl"
11 - reg: Base address of the PAD Controller register block and the size
17 compatible = "brcm,bcm11351-pinctrl";
27 Each pin configuration node is a sub-node of the pin controller node and is a
31 Please refer to the pinctrl-bindings.txt in this directory for details of the
45 details generic pin config properties, please refer to pinctrl-bindings.txt
46 and <include/linux/pinctrl/pinconfig-generic.h>.
54 - pins: Multiple strings. Specifies the name(s) of one or more pins to
59 - function: String. Specifies the pin mux selection. Values
61 - input-schmitt-enable: No arguments. Enable schmitt-trigger mode.
[all …]
Dpinctrl-single.txt1 One-register-per-pin type device tree based pinctrl driver
4 - compatible : "pinctrl-single" or "pinconf-single".
5 "pinctrl-single" means that pinconf isn't supported.
6 "pinconf-single" means that generic pinconf is supported.
8 - reg : offset and length of the register set for the mux registers
10 - #pinctrl-cells : number of cells in addition to the index, set to 1
11 for pinctrl-single,pins and 2 for pinctrl-single,bits
13 - pinctrl-single,register-width : pinmux register access width in bits
15 - pinctrl-single,function-mask : mask of allowed pinmux function bits
19 - pinctrl-single,function-off : function off mode for disabled state if
[all …]
Dnxp,lpc1850-scu.txt2 --------------------------------------------------------
5 - compatible : Should be "nxp,lpc1850-scu"
6 - reg : Address and length of the register set for the device
7 - clocks : Clock specifier (see clock bindings for details)
9 The lpc1850-scu driver uses the generic pin multiplexing and generic pin
10 configuration documented in pinctrl-bindings.txt.
13 - function
14 - pins
15 - bias-disable
16 - bias-pull-up
[all …]
Dpinctrl-mt6797.txt6 - compatible: Value should be one of the following.
7 "mediatek,mt6797-pinctrl", compatible with mt6797 pinctrl.
8 - reg: Should contain address and size for gpio, iocfgl, iocfgb,
10 - reg-names: An array of strings describing the "reg" entries. Must
12 - gpio-controller: Marks the device node as a gpio controller.
13 - #gpio-cells: Should be two. The first cell is the gpio pin number
17 - interrupt-controller: Marks the device node as an interrupt controller.
18 - #interrupt-cells: Should be two.
19 - interrupts : The interrupt outputs from the controller.
21 Please refer to pinctrl-bindings.txt in this directory for details of the
[all …]
Dpinctrl-mt8192.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/pinctrl-mt8192.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sean Wang <sean.wang@mediatek.com>
17 const: mediatek,mt8192-pinctrl
19 gpio-controller: true
21 '#gpio-cells':
28 gpio-ranges:
38 reg-names:
[all …]

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