| /kernel/linux/linux-5.10/include/uapi/linux/ |
| D | iommu.h | 161 /* defines the granularity of the invalidation */
163 IOMMU_INV_GRANU_DOMAIN, /* domain-selective invalidation */
164 IOMMU_INV_GRANU_PASID, /* PASID-selective invalidation */
165 IOMMU_INV_GRANU_ADDR, /* page-selective invalidation */
166 IOMMU_INV_GRANU_NR, /* number of invalidation granularities */
170 * struct iommu_inv_addr_info - Address Selective Invalidation Structure
172 * @flags: indicates the granularity of the address-selective invalidation
173 * - If the PASID bit is set, the @pasid field is populated and the invalidation
176 * - If ARCHID bit is set, @archid is populated and the invalidation relates
180 * - If neither PASID or ARCHID is set, global addr invalidation applies.
[all …]
|
| /kernel/linux/linux-5.10/arch/arm64/include/asm/ |
| D | tlbflush.h | 94 * the level at which the invalidation must take place. If the level is
95 * wrong, no invalidation may take place. In the case where the level
97 * perform a non-hinted invalidation.
99 * For Stage-2 invalidation, use the level values provided to that effect
162 * TLB Invalidation
165 * This header file implements the low-level TLB invalidation routines
168 * Every invalidation operation uses the following template:
172 * DSB ISH // Ensure the TLB invalidation has completed
177 * The following functions form part of the "core" TLB invalidation API,
207 * Next, we have some undocumented invalidation routines that you probably
[all …]
|
| D | kvm_pgtable.h | 99 * to freeing and therefore no TLB invalidation is performed.
139 * to freeing and therefore no TLB invalidation is performed.
179 * TLB invalidation is performed for each page-table entry cleared during the
191 * without TLB invalidation.
251 * TLB invalidation is performed after updating the entry.
|
| /kernel/linux/linux-6.6/arch/arm64/include/asm/ |
| D | tlbflush.h | 95 * the level at which the invalidation must take place. If the level is
96 * wrong, no invalidation may take place. In the case where the level
98 * perform a non-hinted invalidation.
100 * For Stage-2 invalidation, use the level values provided to that effect
169 * TLB Invalidation
172 * This header file implements the low-level TLB invalidation routines
175 * Every invalidation operation uses the following template:
179 * DSB ISH // Ensure the TLB invalidation has completed
184 * The following functions form part of the "core" TLB invalidation API,
214 * Next, we have some undocumented invalidation routines that you probably
[all …]
|
| D | kvm_pgtable.h | 218 * TLB invalidation.
370 * to freeing and therefore no TLB invalidation is performed.
406 * TLB invalidation is performed for each page-table entry cleared during the
465 * to freeing and therefore no TLB invalidation is performed.
476 * freeing and therefore no TLB invalidation is performed.
493 * invalidation or CMOs are performed.
568 * TLB invalidation is performed for each page-table entry cleared during the
580 * without TLB invalidation.
644 * TLB invalidation is performed after updating the entry. Software bits cannot
|
| /kernel/linux/linux-6.6/drivers/iommu/intel/ |
| D | dmar.c | 1215 return "Context-cache Invalidation"; in qi_type_string()
1217 return "IOTLB Invalidation"; in qi_type_string()
1219 return "Device-TLB Invalidation"; in qi_type_string()
1221 return "Interrupt Entry Cache Invalidation"; in qi_type_string()
1223 return "Invalidation Wait"; in qi_type_string()
1225 return "PASID-based IOTLB Invalidation"; in qi_type_string()
1227 return "PASID-cache Invalidation"; in qi_type_string()
1229 return "PASID-based Device-TLB Invalidation"; in qi_type_string()
1244 pr_err("VT-d detected Invalidation Queue Error: Reason %llx", in qi_dump_fault()
1247 pr_err("VT-d detected Invalidation Time-out Error: SID %llx", in qi_dump_fault()
[all …]
|
| /kernel/linux/linux-5.10/drivers/infiniband/ulp/rtrs/ |
| D | README | 54 The procedure is the default behaviour of the driver. This invalidation and
165 the user header, flags (specifying if memory invalidation is necessary) and the
169 attaches an invalidation message if requested and finally an "empty" rdma
176 or in case client requested invalidation:
184 the user header, flags (specifying if memory invalidation is necessary) and the
190 attaches an invalidation message if requested and finally an "empty" rdma
201 or in case client requested invalidation:
|
| /kernel/linux/linux-6.6/drivers/infiniband/ulp/rtrs/ |
| D | README | 54 The procedure is the default behaviour of the driver. This invalidation and
165 the user header, flags (specifying if memory invalidation is necessary) and the
169 attaches an invalidation message if requested and finally an "empty" rdma
176 or in case client requested invalidation:
184 the user header, flags (specifying if memory invalidation is necessary) and the
190 attaches an invalidation message if requested and finally an "empty" rdma
201 or in case client requested invalidation:
|
| /kernel/linux/linux-6.6/arch/powerpc/include/asm/ |
| D | pnv-ocxl.h | 19 /* Radix Invalidation Control
28 /* Invalidation Criteria
35 /* Invalidation Flag */
|
| /kernel/linux/linux-6.6/arch/arm64/kvm/hyp/nvhe/ |
| D | tlb.c | 26 * being either ish or nsh, depending on the invalidation in __tlb_switch_to_guest()
98 * We have to ensure completion of the invalidation at Stage-2, in __kvm_tlb_flush_vmid_ipa()
101 * the Stage-1 invalidation happened first. in __kvm_tlb_flush_vmid_ipa()
150 * We have to ensure completion of the invalidation at Stage-2, in __kvm_tlb_flush_vmid_ipa_nsh()
153 * the Stage-1 invalidation happened first. in __kvm_tlb_flush_vmid_ipa_nsh()
|
| /kernel/linux/linux-6.6/arch/arm64/kvm/hyp/vhe/ |
| D | tlb.c | 101 * We have to ensure completion of the invalidation at Stage-2, in __kvm_tlb_flush_vmid_ipa()
104 * the Stage-1 invalidation happened first. in __kvm_tlb_flush_vmid_ipa()
133 * We have to ensure completion of the invalidation at Stage-2, in __kvm_tlb_flush_vmid_ipa_nsh()
136 * the Stage-1 invalidation happened first. in __kvm_tlb_flush_vmid_ipa_nsh()
|
| /kernel/linux/linux-6.6/arch/arm/mach-versatile/ |
| D | dcscb_setup.S | 20 * A15/A7 may not require explicit L2 invalidation on reset, dependent
23 * or invalidation is not required.
|
| /kernel/linux/linux-5.10/arch/arm/mach-vexpress/ |
| D | dcscb_setup.S | 22 * A15/A7 may not require explicit L2 invalidation on reset, dependent
25 * or invalidation is not required.
|
| /kernel/linux/linux-6.6/Documentation/filesystems/caching/ |
| D | netfs-api.rst | 36 (8) Data file invalidation
39 (11) Page release and invalidation
285 The read operation will fail with ESTALE if invalidation occurred whilst the
302 Data File Invalidation
319 This increases the invalidation counter in the cookie to cause outstanding
324 Invalidation runs asynchronously in a worker thread so that it doesn't block
427 Page Release and Invalidation
442 Page release and page invalidation should also wait for any mark left on the
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/gt/ |
| D | intel_tlb.c | 17 * HW architecture suggest typical invalidation time at 40us,
25 * On Xe_HP the TLB invalidation registers are located at the same MMIO offsets
99 "%s TLB invalidation did not complete in %ums!\n", in mmio_invalidate_full()
|
| /kernel/linux/linux-5.10/include/linux/ |
| D | io-pgtable.h | 30 * @tlb_add_page: Optional callback to queue up leaf TLB invalidation for a
31 * single page. IOMMUs that cannot batch TLB invalidation
34 * and defer the invalidation until iommu_iotlb_sync() instead.
85 * delayed invalidation.
|
| D | intel-iommu.h | 78 #define DMAR_IQH_REG 0x80 /* Invalidation queue head register */
79 #define DMAR_IQT_REG 0x88 /* Invalidation queue tail register */
80 #define DMAR_IQ_SHIFT 4 /* Invalidation queue head/tail shift */
81 #define DMAR_IQA_REG 0x90 /* Invalidation queue addr register */
82 #define DMAR_ICS_REG 0x9c /* Invalidation complete status register */
280 #define DMA_FSTS_IQE (1 << 4) /* Invalidation Queue Error */
281 #define DMA_FSTS_ICE (1 << 5) /* Invalidation Completion Error */
282 #define DMA_FSTS_ITE (1 << 6) /* Invalidation Time-out Error */
369 /* PASID cache invalidation granu */
424 void *desc; /* invalidation queue */
[all …]
|
| /kernel/linux/linux-6.6/include/linux/ |
| D | memregion.h | 41 * contents while performing the invalidation. It is only exported for
59 WARN_ON_ONCE("CPU cache invalidation required"); in cpu_cache_invalidate_memregion()
|
| /kernel/linux/linux-6.6/drivers/cxl/ |
| D | Kconfig | 133 to invalidate caches when those events occur. If that invalidation
135 invalidation failure are due to the CPU not providing a cache
136 invalidation mechanism. For example usage of wbinvd is restricted to
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_mn.c | 42 * page table invalidation are completed and we once more see a coherent process
57 * @range: details on the invalidation
94 * @range: details on the invalidation
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/ |
| D | gmc_v11_0.c | 212 * off cycle, add semaphore acquire before invalidation and semaphore in gmc_v11_0_flush_vm_hub()
213 * release after invalidation to avoid entering power gated state in gmc_v11_0_flush_vm_hub()
248 * add semaphore release after invalidation, in gmc_v11_0_flush_vm_hub()
254 /* Issue additional private vm invalidation to MMHUB */ in gmc_v11_0_flush_vm_hub()
261 /* Issue private invalidation */ in gmc_v11_0_flush_vm_hub()
263 /* Read back to ensure invalidation is done*/ in gmc_v11_0_flush_vm_hub()
295 * Directly use kiq to do the vm invalidation instead in gmc_v11_0_flush_gpu_tlb()
322 * @inst: is used to select which instance of KIQ to use for the invalidation
391 * off cycle, add semaphore acquire before invalidation and semaphore in gmc_v11_0_emit_flush_gpu_tlb()
392 * release after invalidation to avoid entering power gated state in gmc_v11_0_emit_flush_gpu_tlb()
[all …]
|
| /kernel/linux/linux-5.10/drivers/misc/sgi-gru/ |
| D | grutlbpurge.c | 32 /* ---------------------------------- TLB Invalidation functions --------
88 * General purpose TLB invalidation function. This function scans every GRU in
117 * To help improve the efficiency of TLB invalidation, the GMS data
122 * provide the callbacks for TLB invalidation. The GMS contains:
139 * zero to force a full TLB invalidation. This is fast but will
|
| /kernel/linux/linux-6.6/drivers/misc/sgi-gru/ |
| D | grutlbpurge.c | 32 /* ---------------------------------- TLB Invalidation functions --------
86 * General purpose TLB invalidation function. This function scans every GRU in
115 * To help improve the efficiency of TLB invalidation, the GMS data
120 * provide the callbacks for TLB invalidation. The GMS contains:
137 * zero to force a full TLB invalidation. This is fast but will
|
| /kernel/linux/linux-6.6/arch/powerpc/kernel/ |
| D | l2cr_6xx.S | 60 - L2I set to perform a global invalidation
111 /* Before we perform the global invalidation, we must disable dynamic
207 /* Perform a global invalidation */
223 /* Wait for the invalidation to complete */
342 /* Perform a global invalidation */
|
| /kernel/linux/linux-5.10/arch/powerpc/kernel/ |
| D | l2cr_6xx.S | 60 - L2I set to perform a global invalidation
111 /* Before we perform the global invalidation, we must disable dynamic
207 /* Perform a global invalidation */
223 /* Wait for the invalidation to complete */
342 /* Perform a global invalidation */
|