| /kernel/linux/linux-6.6/arch/arm/boot/dts/aspeed/ |
| D | aspeed-bmc-ampere-mtmitchell.dts | 1 // SPDX-License-Identifier: GPL-2.0-only
4 /dts-v1/;
6 #include "aspeed-g6.dtsi"
7 #include <dt-bindings/i2c/i2c.h>
8 #include <dt-bindings/gpio/aspeed-gpio.h>
12 compatible = "ampere,mtmitchell-bmc", "aspeed,ast2600";
20 stdout-path = &uart5;
28 reserved-memory {
29 #address-cells = <1>;
30 #size-cells = <1>;
[all …]
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| D | aspeed-bmc-ampere-mtjade.dts | 1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
3 #include "aspeed-g5.dtsi"
4 #include <dt-bindings/gpio/aspeed-gpio.h>
8 compatible = "ampere,mtjade-bmc", "aspeed,ast2500";
12 * i2c bus 50-57 assigned to NVMe slot 0-7
24 * i2c bus 60-67 assigned to NVMe slot 8-15
36 * i2c bus 70-77 assigned to NVMe slot 16-23
48 * i2c bus 80-81 assigned to NVMe M2 slot 0-1
55 stdout-path = &uart5;
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/iio/ |
| D | iio-bindings.txt | 2 from Lars-Peter Clausen [1].
10 value of a #io-channel-cells property in the IIO provider node.
12 [1] https://marc.info/?l=linux-iio&m=135902119507483&w=2
17 #io-channel-cells: Number of cells in an IIO specifier; Typically 0 for nodes
27 adc: voltage-sensor@35 {
30 #io-channel-cells = <1>;
37 compatible = "some-vendor,some-adc";
40 adc1: iio-device@0 {
41 #io-channel-cells = <1>;
44 adc2: iio-device@1 {
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/iio/multiplexer/ |
| D | io-channel-mux.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/iio/multiplexer/io-channel-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: I/O channel multiplexer
10 - Peter Rosin <peda@axentia.se>
14 e.g. an ADC channel, these bindings describe that situation.
16 For each non-empty string in the channels property, an io-channel will be
17 created. The number of this io-channel is the same as the index into the list
20 Documentation/devicetree/bindings/mux/mux-controller.yaml
[all …]
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| /kernel/linux/linux-6.6/drivers/media/platform/st/sti/c8sectpfe/ |
| D | c8sectpfe-core.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * c8sectpfe-core.c - C8SECTPFE STi DVB driver
16 #include <linux/dma-mapping.h>
25 #include <linux/io.h>
37 #include "c8sectpfe-common.h"
38 #include "c8sectpfe-core.h"
39 #include "c8sectpfe-debugfs.h"
67 struct channel_info *channel; in c8sectpfe_timer_interrupt() local
71 for (chan_num = 0; chan_num < fei->tsin_count; chan_num++) { in c8sectpfe_timer_interrupt()
72 channel = fei->channel_data[chan_num]; in c8sectpfe_timer_interrupt()
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/memory-controllers/ddr/ |
| D | jedec,lpddr-channel.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr-channel.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: LPDDR channel with chip/rank topology description
10 An LPDDR channel is a completely independent set of LPDDR pins (DQ, CA, CS,
16 - Julius Werner <jwerner@chromium.org>
21 - jedec,lpddr2-channel
22 - jedec,lpddr3-channel
23 - jedec,lpddr4-channel
[all …]
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| /kernel/linux/linux-5.10/drivers/media/platform/sti/c8sectpfe/ |
| D | c8sectpfe-core.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * c8sectpfe-core.c - C8SECTPFE STi DVB driver
16 #include <linux/dma-mapping.h>
23 #include <linux/io.h>
35 #include "c8sectpfe-core.h"
36 #include "c8sectpfe-common.h"
37 #include "c8sectpfe-debugfs.h"
64 struct channel_info *channel; in c8sectpfe_timer_interrupt() local
68 for (chan_num = 0; chan_num < fei->tsin_count; chan_num++) { in c8sectpfe_timer_interrupt()
69 channel = fei->channel_data[chan_num]; in c8sectpfe_timer_interrupt()
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/iio/multiplexer/ |
| D | io-channel-mux.txt | 1 I/O channel multiplexer bindings
4 e.g. an ADC channel, these bindings describe that situation.
7 - compatible : "io-channel-mux"
8 - io-channels : Channel node of the parent channel that has multiplexed
10 - io-channel-names : Should be "parent".
11 - #address-cells = <1>;
12 - #size-cells = <0>;
13 - mux-controls : Mux controller node to use for operating the mux
14 - channels : List of strings, labeling the mux controller states.
16 For each non-empty string in the channels property, an io-channel will
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mfd/ |
| D | ab8500.txt | 1 * AB8500 Multi-Functional Device (MFD)
4 - compatible : contains "stericsson,ab8500" or "stericsson,ab8505";
5 - interrupts : contains the IRQ line for the AB8500
6 - interrupt-controller : describes the AB8500 as an Interrupt Controller (has its own domain)
7 - #interrupt-cells : should be 2, for 2-cell format
8 - The first cell is the AB8500 local IRQ number
9 - The second cell is used to specify optional parameters
10 - bits[3:0] trigger type and level flags:
11 1 = low-to-high edge triggered
12 2 = high-to-low edge triggered
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/sound/ |
| D | audio-iio-aux.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/audio-iio-aux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Herve Codina <herve.codina@bootlin.com>
16 - $ref: dai-common.yaml#
20 const: audio-iio-aux
22 io-channels:
26 io-channel-names:
28 Industrial I/O channel names related to io-channels.
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/iio/adc/ |
| D | envelope-detector.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/envelope-detector.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peter Rosin <peda@axentia.se>
18 input +------>-------|+ \
20 .-------. | }---.
22 | dac|-->--|- / |
26 | irq|------<-------'
28 '-------'
[all …]
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| D | st,stm32-dfsdm-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-dfsdm-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
11 - Olivier Moysan <olivier.moysan@foss.st.com>
14 STM32 DFSDM ADC is a sigma delta analog-to-digital converter dedicated to
17 - Sigma delta modulators (motor control, metering...)
18 - PDM microphones (audio digital microphone)
28 - st,stm32h7-dfsdm
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/iio/adc/ |
| D | st,stm32-dfsdm-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-dfsdm-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Fabrice Gasnier <fabrice.gasnier@st.com>
11 - Olivier Moysan <olivier.moysan@st.com>
14 STM32 DFSDM ADC is a sigma delta analog-to-digital converter dedicated to
17 - Sigma delta modulators (motor control, metering...)
18 - PDM microphones (audio digital microphone)
28 - st,stm32h7-dfsdm
[all …]
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| D | envelope-detector.txt | 8 input +------>-------|+ \
10 .-------. | }---.
12 | dac|-->--|- / |
16 | irq|------<-------'
18 '-------'
21 - compatible: Should be "axentia,tse850-envelope-detector"
22 - io-channels: Channel node of the dac to be used for comparator input.
23 - io-channel-names: Should be "dac".
24 - interrupt specification for one client interrupt,
25 see ../../interrupt-controller/interrupts.txt for details.
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/iio/afe/ |
| D | current-sense-shunt.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/afe/current-sense-shunt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peter Rosin <peda@axentia.se>
13 When an io-channel measures the voltage over a current sense shunt,
20 const: current-sense-shunt
22 io-channels:
25 Channel node of a voltage io-channel.
27 "#io-channel-cells":
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/power/supply/ |
| D | rx51-battery.txt | 6 - compatible: Should contain one of the following:
7 * "nokia,n900-battery"
8 - io-channels: Should contain IIO channel specifiers
9 for each element in io-channel-names.
10 - io-channel-names: Should contain the following values:
11 * "temp" - The ADC channel for temperature reading
12 * "bsi" - The ADC channel for battery size identification
13 * "vbat" - The ADC channel to measure the battery voltage
17 battery: n900-battery {
18 compatible = "nokia,n900-battery";
[all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | ste-ab8500.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include <dt-bindings/clock/ste-ab8500.h>
10 iio-hwmon {
11 compatible = "iio-hwmon";
12 io-channels = <&gpadc 0x02>, /* Battery temperature */
27 interrupt-parent = <&intc>;
29 interrupt-controller;
30 #interrupt-cells = <2>;
32 ab8500_clock: clock-controller {
33 compatible = "stericsson,ab8500-clk";
[all …]
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| D | at91-natte.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+
3 * at91-natte.dts - Device Tree include file for the Natte board
11 mux: mux-controller {
12 compatible = "gpio-mux";
13 #mux-control-cells = <0>;
15 mux-gpios = <&ioexp 0 GPIO_ACTIVE_HIGH>,
20 batntc-mux {
21 compatible = "io-channel-mux";
22 io-channels = <&adc 5>;
23 io-channel-names = "parent";
[all …]
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| D | ste-ab8505.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include <dt-bindings/clock/ste-ab8500.h>
10 iio-hwmon {
11 compatible = "iio-hwmon";
12 io-channels = <&gpadc 0x02>, /* Battery temperature */
23 interrupt-parent = <&intc>;
25 interrupt-controller;
26 #interrupt-cells = <2>;
28 ab8500_clock: clock-controller {
29 compatible = "stericsson,ab8500-clk";
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/power/supply/ |
| D | nokia,n900-battery.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/supply/nokia,n900-battery.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Pali Rohár <pali@kernel.org>
11 - Sebastian Reichel <sre@kernel.org>
14 - $ref: power-supply.yaml#
18 const: nokia,n900-battery
20 io-channels:
22 - description: ADC channel for temperature reading
[all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/microchip/ |
| D | at91-natte.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+
3 * at91-natte.dts - Device Tree include file for the Natte board
11 mux: mux-controller {
12 compatible = "gpio-mux";
13 #mux-control-cells = <0>;
15 mux-gpios = <&ioexp 0 GPIO_ACTIVE_HIGH>,
20 batntc-mux {
21 compatible = "io-channel-mux";
22 io-channels = <&adc 5>;
23 io-channel-names = "parent";
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/thermal/ |
| D | generic-adc-thermal.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/thermal/generic-adc-thermal.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laxman Dewangan <ldewangan@nvidia.com>
14 one of ADC channel and sensor resistance is read via voltage across the
16 temperature using voltage-temperature lookup table.
20 const: generic-adc-thermal
22 '#thermal-sensor-cells':
25 io-channels:
[all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/xilinx/ |
| D | zynqmp-zcu106-revA.dts | 1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2016 - 2019, Xilinx, Inc.
10 /dts-v1/;
13 #include "zynqmp-clk-ccf.dtsi"
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/gpio/gpio.h>
19 compatible = "xlnx,zynqmp-zcu106-revA", "xlnx,zynqmp-zcu106", "xlnx,zynqmp";
34 stdout-path = "serial0:115200n8";
42 gpio-keys {
43 compatible = "gpio-keys";
[all …]
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| D | zynqmp-zcu102-revA.dts | 1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2015 - 2019, Xilinx, Inc.
10 /dts-v1/;
13 #include "zynqmp-clk-ccf.dtsi"
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/gpio/gpio.h>
19 compatible = "xlnx,zynqmp-zcu102-revA", "xlnx,zynqmp-zcu102", "xlnx,zynqmp";
34 stdout-path = "serial0:115200n8";
42 gpio-keys {
43 compatible = "gpio-keys";
[all …]
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| /kernel/linux/linux-6.6/arch/mips/include/asm/mach-au1x00/ |
| D | au1000_dma.h | 33 #include <linux/io.h> /* need byte IO */
39 /* DMA Channel Register Offsets */
107 int dev_id; /* this channel is allocated if >= 0, */
109 void __iomem *io; member
160 __raw_writel(DMA_BE0, chan->io + DMA_MODE_SET); in enable_dma_buffer0()
169 __raw_writel(DMA_BE1, chan->io + DMA_MODE_SET); in enable_dma_buffer1()
177 __raw_writel(DMA_BE0 | DMA_BE1, chan->io + DMA_MODE_SET); in enable_dma_buffers()
186 __raw_writel(DMA_GO, chan->io + DMA_MODE_SET); in start_dma()
198 __raw_writel(DMA_GO, chan->io + DMA_MODE_CLEAR); in halt_dma()
202 if (__raw_readl(chan->io + DMA_MODE_READ) & DMA_HALT) in halt_dma()
[all …]
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