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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/power/
Drockchip-io-domain.txt1 Rockchip SRAM for IO Voltage Domains:
2 -------------------------------------
4 IO domain voltages on some Rockchip SoCs are variable but need to be
9 - If the regulator hooked up to a pin like SDMMC0_VDD is 3.3V then
18 - any logic for deciding what voltage we should set regulators to
19 - any logic for deciding whether regulators (or internal SoC blocks)
33 - compatible: should be one of:
34 - "rockchip,px30-io-voltage-domain" for px30
35 - "rockchip,px30-pmu-io-voltage-domain" for px30 pmu-domains
36 - "rockchip,rk3188-io-voltage-domain" for rk3188
[all …]
Dpower_domain.txt1 * Generic PM domains
3 System on chip designs are often divided into multiple PM domains that can be
8 their PM domains provided by PM domain providers. A PM domain provider can be
10 domains. A consumer node can refer to the provider by a phandle and a set of
12 #power-domain-cells property in the PM domain provider node.
16 See power-domain.yaml.
21 - power-domains : A list of PM domain specifiers, as defined by bindings of
25 - power-domain-names : A list of power domain name strings sorted in the same
26 order as the power-domains property. Consumers drivers will use
27 power-domain-names to match power domains with power-domains
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/ti/
Dk3-j7200-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 atf-sram@0 {
21 scm_conf: scm-conf@100000 {
22 compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
24 #address-cells = <1>;
25 #size-cells = <1>;
[all …]
Dk3-j721e-mcu-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2019 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "ti,k2g-sci";
11 ti,host-id = <12>;
13 mbox-names = "rx", "tx";
18 reg-names = "debug_messages";
21 k3_pds: power-controller {
22 compatible = "ti,sci-pm-domain";
23 #power-domain-cells = <2>;
27 compatible = "ti,k2g-sci-clk";
[all …]
Dk3-j721e-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2019 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy.h>
8 #include <dt-bindings/mux/mux.h>
9 #include <dt-bindings/mux/ti-serdes.h>
12 cmn_refclk: clock-cmnrefclk {
13 #clock-cells = <0>;
14 compatible = "fixed-clock";
15 clock-frequency = <0>;
18 cmn_refclk1: clock-cmnrefclk1 {
[all …]
Dk3-am65-mcu.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/
9 mcu_conf: scm-conf@40f00000 {
10 compatible = "syscon", "simple-mfd";
12 #address-cells = <1>;
13 #size-cells = <1>;
17 compatible = "ti,am654-phy-gmii-sel";
19 #phy-cells = <1>;
24 compatible = "ti,am654-uart";
26 reg-shift = <2>;
[all …]
Dk3-am65-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy-am654-serdes.h>
11 compatible = "mmio-sram";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 atf-sram@0 {
21 sysfw-sram@f0000 {
25 l3cache-sram@100000 {
30 gic500: interrupt-controller@1800000 {
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/power/
Dpower_domain.txt1 * Generic PM domains
3 System on chip designs are often divided into multiple PM domains that can be
8 their PM domains provided by PM domain providers. A PM domain provider can be
10 domains. A consumer node can refer to the provider by a phandle and a set of
12 #power-domain-cells property in the PM domain provider node.
16 See power-domain.yaml.
21 - power-domains : A list of PM domain specifiers, as defined by bindings of
25 - power-domain-names : A list of power domain name strings sorted in the same
26 order as the power-domains property. Consumers drivers will use
27 power-domain-names to match power domains with power-domains
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/
Dintel_display_power.c1 /* SPDX-License-Identifier: MIT */
165 drm_dbg_kms(&dev_priv->drm, "enabling %s\n", power_well->desc->name); in intel_power_well_enable()
166 power_well->desc->ops->enable(dev_priv, power_well); in intel_power_well_enable()
167 power_well->hw_enabled = true; in intel_power_well_enable()
173 drm_dbg_kms(&dev_priv->drm, "disabling %s\n", power_well->desc->name); in intel_power_well_disable()
174 power_well->hw_enabled = false; in intel_power_well_disable()
175 power_well->desc->ops->disable(dev_priv, power_well); in intel_power_well_disable()
181 if (!power_well->count++) in intel_power_well_get()
188 drm_WARN(&dev_priv->drm, !power_well->count, in intel_power_well_put()
190 power_well->desc->name); in intel_power_well_put()
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/renesas/
Dr9a06g032.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r9a06g032-sysctrl.h>
14 #address-cells = <1>;
15 #size-cells = <1>;
18 #address-cells = <1>;
19 #size-cells = <0>;
23 compatible = "arm,cortex-a7";
30 compatible = "arm,cortex-a7";
33 enable-method = "renesas,r9a06g032-smp";
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/iio/adc/
Dnxp,imx8qxp-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/nxp,imx8qxp-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Cai Huoqing <caihuoqing@baidu.com>
17 const: nxp,imx8qxp-adc
28 clock-names:
30 - const: per
31 - const: ipg
33 assigned-clocks:
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/can/
Dnxp,sja1000.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wolfgang Grandegger <wg@grandegger.com>
15 - enum:
16 - nxp,sja1000
17 - technologic,sja1000
18 - items:
19 - enum:
20 - renesas,r9a06g032-sja1000 # RZ/N1D
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/mediatek/
Dmt7623a.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2017-2018 MediaTek Inc.
8 /dts-v1/;
9 #include <dt-bindings/power/mt7623a-power.h>
13 power-domains = <&scpsys MT7623A_POWER_DOMAIN_IFR_MSC>;
17 power-domains = <&scpsys MT7623A_POWER_DOMAIN_ETH>;
22 phy-mode = "trgmii";
24 fixed-link {
26 full-duplex;
33 phy-mode = "rgmii";
[all …]
/kernel/linux/linux-5.10/drivers/firmware/
Dscpi_pm_domain.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/io.h>
22 * These device power state values are not well-defined in the specification.
43 ret = pd->ops->device_set_power_state(pd->domain, state); in scpi_pd_power()
47 return !(state == pd->ops->device_get_power_state(pd->domain)); in scpi_pd_power()
66 struct device *dev = &pdev->dev; in scpi_pm_domain_probe()
67 struct device_node *np = dev->of_node; in scpi_pm_domain_probe()
70 struct generic_pm_domain **domains; in scpi_pm_domain_probe() local
76 return -EPROBE_DEFER; in scpi_pm_domain_probe()
80 return -ENODEV; in scpi_pm_domain_probe()
[all …]
/kernel/linux/linux-6.6/drivers/firmware/
Dscpi_pm_domain.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/io.h>
23 * These device power state values are not well-defined in the specification.
44 ret = pd->ops->device_set_power_state(pd->domain, state); in scpi_pd_power()
48 return !(state == pd->ops->device_get_power_state(pd->domain)); in scpi_pd_power()
67 struct device *dev = &pdev->dev; in scpi_pm_domain_probe()
68 struct device_node *np = dev->of_node; in scpi_pm_domain_probe()
71 struct generic_pm_domain **domains; in scpi_pm_domain_probe() local
77 return -EPROBE_DEFER; in scpi_pm_domain_probe()
81 return -ENODEV; in scpi_pm_domain_probe()
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/ti/keystone/
Dkeystone-k2g.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2017 Texas Instruments Incorporated - http://www.ti.com/
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/pinctrl/keystone.h>
10 #include <dt-bindings/gpio/gpio.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
17 interrupt-parent = <&gic>;
32 #address-cells = <1>;
33 #size-cells = <0>;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dkeystone-k2g.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2017 Texas Instruments Incorporated - http://www.ti.com/
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/pinctrl/keystone.h>
10 #include <dt-bindings/gpio/gpio.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
17 interrupt-parent = <&gic>;
32 #address-cells = <1>;
33 #size-cells = <0>;
[all …]
/kernel/linux/linux-5.10/drivers/firmware/arm_scmi/
Dscmi_pm_domain.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/io.h>
28 const struct scmi_power_ops *ops = pd->handle->power_ops; in scmi_pd_power()
35 ret = ops->state_set(pd->handle, pd->domain, state); in scmi_pd_power()
37 ret = ops->state_get(pd->handle, pd->domain, &ret_state); in scmi_pd_power()
39 return -EIO; in scmi_pd_power()
57 struct device *dev = &sdev->dev; in scmi_pm_domain_probe()
58 struct device_node *np = dev->of_node; in scmi_pm_domain_probe()
61 struct generic_pm_domain **domains; in scmi_pm_domain_probe() local
62 const struct scmi_handle *handle = sdev->handle; in scmi_pm_domain_probe()
[all …]
/kernel/linux/linux-6.6/drivers/firmware/arm_scmi/
Dscmi_pm_domain.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2018-2021 ARM Ltd.
9 #include <linux/io.h>
36 ret = power_ops->state_set(pd->ph, pd->domain, state); in scmi_pd_power()
38 ret = power_ops->state_get(pd->ph, pd->domain, &ret_state); in scmi_pd_power()
40 return -EIO; in scmi_pd_power()
58 struct device *dev = &sdev->dev; in scmi_pm_domain_probe()
59 struct device_node *np = dev->of_node; in scmi_pm_domain_probe()
62 struct generic_pm_domain **domains; in scmi_pm_domain_probe() local
63 const struct scmi_handle *handle = sdev->handle; in scmi_pm_domain_probe()
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/freescale/
Dimx8-ss-dma.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2019 NXP
7 #include <dt-bindings/clock/imx8-lpcg.h>
8 #include <dt-bindings/firmware/imx/rsrc.h>
11 compatible = "simple-bus";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 dma_ipg_clk: clock-dma-ipg {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
[all …]
/kernel/linux/linux-5.10/drivers/soc/amlogic/
Dmeson-secure-pwrc.c1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include <linux/io.h>
13 #include <dt-bindings/power/meson-a1-power.h>
14 #include <linux/arm-smccc.h>
27 struct meson_secure_pwrc_domain *domains; member
41 struct meson_secure_pwrc_domain_desc *domains; member
48 if (meson_sm_call(pwrc_domain->pwrc->fw, SM_A1_PWRC_GET, &is_off, in pwrc_secure_is_off()
49 pwrc_domain->index, 0, 0, 0, 0) < 0) in pwrc_secure_is_off()
61 if (meson_sm_call(pwrc_domain->pwrc->fw, SM_A1_PWRC_SET, NULL, in meson_secure_pwrc_off()
62 pwrc_domain->index, PWRC_OFF, 0, 0, 0) < 0) { in meson_secure_pwrc_off()
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/tegra/
Dnvidia,tegra124-dpaux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-dpaux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
24 pattern: "^dpaux@[0-9a-f]+$"
28 - enum:
29 - nvidia,tegra124-dpaux
30 - nvidia,tegra210-dpaux
[all …]
/kernel/linux/linux-6.6/arch/powerpc/kernel/
Dpci_64.c1 // SPDX-License-Identifier: GPL-2.0-or-later
25 #include <asm/io.h>
26 #include <asm/pci-bridge.h>
29 #include <asm/ppc-pci.h>
31 /* pci_io_base -- the base address from which io bars are offsets.
35 * is mapped on the first 64K of IO space
51 /* On ppc64, we always enable PCI domains and we keep domain 0 in pcibios_init()
65 pci_bus_add_devices(hose->bus); in pcibios_init()
86 * mappings since we might have to deal with sub-page alignments in pcibios_unmap_io_space()
94 if (bus->self) { in pcibios_unmap_io_space()
[all …]
/kernel/linux/linux-5.10/arch/powerpc/kernel/
Dpci_64.c1 // SPDX-License-Identifier: GPL-2.0-or-later
24 #include <asm/io.h>
26 #include <asm/pci-bridge.h>
29 #include <asm/ppc-pci.h>
31 /* pci_io_base -- the base address from which io bars are offsets.
35 * is mapped on the first 64K of IO space
51 /* On ppc64, we always enable PCI domains and we keep domain 0 in pcibios_init()
65 pci_bus_add_devices(hose->bus); in pcibios_init()
86 * mappings since we might have to deal with sub-page alignments in pcibios_unmap_io_space()
94 if (bus->self) { in pcibios_unmap_io_space()
[all …]
/kernel/linux/linux-6.6/drivers/pmdomain/amlogic/
Dmeson-secure-pwrc.c1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include <linux/io.h>
13 #include <dt-bindings/power/meson-a1-power.h>
14 #include <dt-bindings/power/amlogic,c3-pwrc.h>
15 #include <dt-bindings/power/meson-s4-power.h>
16 #include <linux/arm-smccc.h>
30 struct meson_secure_pwrc_domain *domains; member
44 struct meson_secure_pwrc_domain_desc *domains; member
51 if (meson_sm_call(pwrc_domain->pwrc->fw, SM_A1_PWRC_GET, &is_off, in pwrc_secure_is_off()
52 pwrc_domain->index, 0, 0, 0, 0) < 0) in pwrc_secure_is_off()
[all …]

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