| /kernel/linux/linux-5.10/drivers/iommu/ |
| D | msm_iommu.c | 1 // SPDX-License-Identifier: GPL-2.0-only 2 /* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. 13 #include <linux/io-pgtable.h> 18 #include <linux/iommu.h> 26 #include "msm_iommu_hw-8xxx.h" 55 static int __enable_clocks(struct msm_iommu_dev *iommu) in __enable_clocks() argument 59 ret = clk_enable(iommu->pclk); in __enable_clocks() 63 if (iommu->clk) { in __enable_clocks() 64 ret = clk_enable(iommu->clk); in __enable_clocks() 66 clk_disable(iommu->pclk); in __enable_clocks() [all …]
|
| D | ipmmu-vmsa.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * IOMMU API for Renesas VMSA-compatible IPMMU 6 * Copyright (C) 2014-2020 Renesas Electronics Corporation 11 #include <linux/dma-iommu.h> 12 #include <linux/dma-mapping.h> 18 #include <linux/io-pgtable.h> 19 #include <linux/iommu.h> 30 #include <asm/dma-iommu.h> 33 #define arm_iommu_attach_device(...) -ENODEV 39 #define IPMMU_CTX_INVALID -1 [all …]
|
| D | omap-iommu.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 3 * omap iommu: main structures 5 * Copyright (C) 2008-2009 Nokia Corporation 14 #include <linux/iommu.h> 29 * struct omap_iommu_device - omap iommu device data 30 * @pgtable: page table used by an omap iommu attached to a domain 31 * @iommu_dev: pointer to store an omap iommu instance attached to a domain 39 * struct omap_iommu_domain - omap iommu domain 41 * @iommus: omap iommu device data for all iommus in this domain 44 * @domain: generic domain handle used by iommu core code [all …]
|
| D | omap-iommu.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * omap iommu: tlb and pagetable primitives 5 * Copyright (C) 2008-2010 Nokia Corporation 6 * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/ 12 #include <linux/dma-mapping.h> 18 #include <linux/iommu.h> 19 #include <linux/omap-iommu.h> 31 #include <linux/platform_data/iommu-omap.h> 33 #include "omap-iopgtable.h" 34 #include "omap-iommu.h" [all …]
|
| /kernel/linux/linux-6.6/drivers/iommu/ |
| D | msm_iommu.c | 1 // SPDX-License-Identifier: GPL-2.0-only 2 /* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. 13 #include <linux/io-pgtable.h> 18 #include <linux/iommu.h> 25 #include "msm_iommu_hw-8xxx.h" 54 static int __enable_clocks(struct msm_iommu_dev *iommu) in __enable_clocks() argument 58 ret = clk_enable(iommu->pclk); in __enable_clocks() 62 if (iommu->clk) { in __enable_clocks() 63 ret = clk_enable(iommu->clk); in __enable_clocks() 65 clk_disable(iommu->pclk); in __enable_clocks() [all …]
|
| D | ipmmu-vmsa.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * IOMMU API for Renesas VMSA-compatible IPMMU 6 * Copyright (C) 2014-2020 Renesas Electronics Corporation 11 #include <linux/dma-mapping.h> 18 #include <linux/io-pgtable.h> 19 #include <linux/iommu.h> 29 #include <asm/dma-iommu.h> 32 #define arm_iommu_attach_device(...) -ENODEV 37 #define IPMMU_CTX_INVALID -1 58 struct iommu_device iommu; member [all …]
|
| D | omap-iommu.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 3 * omap iommu: main structures 5 * Copyright (C) 2008-2009 Nokia Corporation 14 #include <linux/iommu.h> 29 * struct omap_iommu_device - omap iommu device data 30 * @pgtable: page table used by an omap iommu attached to a domain 31 * @iommu_dev: pointer to store an omap iommu instance attached to a domain 39 * struct omap_iommu_domain - omap iommu domain 41 * @iommus: omap iommu device data for all iommus in this domain 44 * @domain: generic domain handle used by iommu core code [all …]
|
| D | omap-iommu.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * omap iommu: tlb and pagetable primitives 5 * Copyright (C) 2008-2010 Nokia Corporation 6 * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/ 12 #include <linux/dma-mapping.h> 18 #include <linux/iommu.h> 19 #include <linux/omap-iommu.h> 30 #include <linux/platform_data/iommu-omap.h> 32 #include "omap-iopgtable.h" 33 #include "omap-iommu.h" [all …]
|
| /kernel/linux/linux-5.10/arch/sparc/kernel/ |
| D | iommu.c | 1 // SPDX-License-Identifier: GPL-2.0 2 /* iommu.c: Generic sparc64 IOMMU support. 13 #include <linux/dma-map-ops.h> 15 #include <linux/iommu-helper.h> 17 #include <asm/iommu-common.h> 23 #include <asm/iommu.h> 28 #define STC_CTXMATCH_ADDR(STC, CTX) \ argument 29 ((STC)->strbuf_ctxmatch_base + ((CTX) << 3)) 31 (*((STC)->strbuf_flushflag) = 0UL) 33 (*((STC)->strbuf_flushflag) != 0UL) [all …]
|
| /kernel/linux/linux-6.6/arch/sparc/kernel/ |
| D | iommu.c | 1 // SPDX-License-Identifier: GPL-2.0 2 /* iommu.c: Generic sparc64 IOMMU support. 13 #include <linux/dma-map-ops.h> 15 #include <linux/iommu-helper.h> 17 #include <asm/iommu-common.h> 23 #include <asm/iommu.h> 28 #define STC_CTXMATCH_ADDR(STC, CTX) \ argument 29 ((STC)->strbuf_ctxmatch_base + ((CTX) << 3)) 31 (*((STC)->strbuf_flushflag) = 0UL) 33 (*((STC)->strbuf_flushflag) != 0UL) [all …]
|
| /kernel/linux/linux-6.6/drivers/iommu/arm/arm-smmu/ |
| D | qcom_iommu.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * IOMMU API for QCOM secure IOMMUs. Somewhat based on arm-smmu.c 13 #include <linux/dma-mapping.h> 17 #include <linux/io-64-nonatomic-hi-lo.h> 18 #include <linux/io-pgtable.h> 19 #include <linux/iommu.h> 33 #include "arm-smmu.h" 47 /* IOMMU core code handle */ 48 struct iommu_device iommu; member 62 u8 asid; /* asid and ctx bank # are 1:1 */ [all …]
|
| /kernel/linux/linux-5.10/drivers/iommu/arm/arm-smmu/ |
| D | qcom_iommu.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * IOMMU API for QCOM secure IOMMUs. Somewhat based on arm-smmu.c 13 #include <linux/dma-iommu.h> 14 #include <linux/dma-mapping.h> 18 #include <linux/io-64-nonatomic-hi-lo.h> 19 #include <linux/io-pgtable.h> 20 #include <linux/iommu.h> 36 #include "arm-smmu.h" 50 /* IOMMU core code handle */ 51 struct iommu_device iommu; member [all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/iommu/ |
| D | qcom,iommu.txt | 1 * QCOM IOMMU v1 Implementation 3 Qualcomm "B" family devices which are not compatible with arm-smmu have 4 a similar looking IOMMU but without access to the global register space, 6 to non-secure vs secure interrupt line. 10 - compatible : Should be one of: 12 "qcom,msm8916-iommu" 14 Followed by "qcom,msm-iommu-v1". 16 - clock-names : Should be a pair of "iface" (required for IOMMUs 20 - clocks : Phandles for respective clocks described by 21 clock-names. [all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/host1x/ |
| D | context.c | 1 // SPDX-License-Identifier: GPL-2.0-only 23 struct host1x_memory_context_list *cdl = &host1x->context_list; in host1x_memory_context_list_init() 24 struct device_node *node = host1x->dev->of_node; in host1x_memory_context_list_init() 25 struct host1x_memory_context *ctx; in host1x_memory_context_list_init() local 29 cdl->devs = NULL; in host1x_memory_context_list_init() 30 cdl->len = 0; in host1x_memory_context_list_init() 31 mutex_init(&cdl->lock); in host1x_memory_context_list_init() 33 err = of_property_count_u32_elems(node, "iommu-map"); in host1x_memory_context_list_init() 37 cdl->len = err / 4; in host1x_memory_context_list_init() 38 cdl->devs = kcalloc(cdl->len, sizeof(*cdl->devs), GFP_KERNEL); in host1x_memory_context_list_init() [all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/iommu/ |
| D | qcom,iommu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/iommu/qcom,iommu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Technologies legacy IOMMU implementations 10 - Konrad Dybcio <konrad.dybcio@linaro.org> 13 Qualcomm "B" family devices which are not compatible with arm-smmu have 14 a similar looking IOMMU, but without access to the global register space 16 to non-secure vs secure interrupt line. 21 - items: [all …]
|
| /kernel/linux/linux-6.6/drivers/dma/idxd/ |
| D | cdev.c | 1 // SPDX-License-Identifier: GPL-2.0 9 #include <linux/io-64-nonatomic-lo-hi.h> 13 #include <linux/iommu.h> 56 static void idxd_xa_pasid_remove(struct idxd_user_context *ctx); 67 struct idxd_user_context *ctx = dev_to_uctx(dev); in cr_faults_show() local 69 return sysfs_emit(buf, "%llu\n", ctx->counters[COUNTER_FAULTS]); in cr_faults_show() 76 struct idxd_user_context *ctx = dev_to_uctx(dev); in cr_fault_failures_show() local 78 return sysfs_emit(buf, "%llu\n", ctx->counters[COUNTER_FAULT_FAILS]); in cr_fault_failures_show() 84 struct idxd_user_context *ctx = dev_to_uctx(dev); in pid_show() local 86 return sysfs_emit(buf, "%u\n", ctx->pid); in pid_show() [all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/msm/ |
| D | msm_drv.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2016-2018, 2020-2021 The Linux Foundation. All rights reserved. 8 #include <linux/dma-mapping.h> 9 #include <linux/fault-inject.h> 37 * - 1.0.0 - initial interface 38 * - 1.1.0 - adds madvise, and support for submits with > 4 cmd buffers 39 * - 1.2.0 - adds explicit fence support for submit ioctl 40 * - 1.3.0 - adds GMEM_BASE + NR_RINGS params, SUBMITQUEUE_NEW + 43 * - 1.4.0 - softpin, MSM_RELOC_BO_DUMP, and GEM_INFO support to set/get 45 * - 1.5.0 - Add SUBMITQUERY_QUERY ioctl [all …]
|
| /kernel/linux/linux-5.10/drivers/media/platform/rockchip/rga/ |
| D | rga-buf.c | 1 // SPDX-License-Identifier: GPL-2.0-only 4 * Author: Jacob Chen <jacob-chen@iotwrt.com> 9 #include <media/v4l2-device.h> 10 #include <media/v4l2-ioctl.h> 11 #include <media/v4l2-mem2mem.h> 12 #include <media/videobuf2-dma-sg.h> 13 #include <media/videobuf2-v4l2.h> 15 #include "rga-hw.h" 23 struct rga_ctx *ctx = vb2_get_drv_priv(vq); in rga_queue_setup() local 24 struct rga_frame *f = rga_get_frame(ctx, vq->type); in rga_queue_setup() [all …]
|
| /kernel/linux/linux-6.6/drivers/media/platform/rockchip/rga/ |
| D | rga-buf.c | 1 // SPDX-License-Identifier: GPL-2.0-only 4 * Author: Jacob Chen <jacob-chen@iotwrt.com> 9 #include <media/v4l2-device.h> 10 #include <media/v4l2-ioctl.h> 11 #include <media/v4l2-mem2mem.h> 12 #include <media/videobuf2-dma-sg.h> 13 #include <media/videobuf2-v4l2.h> 15 #include "rga-hw.h" 23 struct rga_ctx *ctx = vb2_get_drv_priv(vq); in rga_queue_setup() local 24 struct rga_frame *f = rga_get_frame(ctx, vq->type); in rga_queue_setup() [all …]
|
| /kernel/linux/linux-6.6/drivers/accel/ivpu/ |
| D | ivpu_gem.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2020-2023 Intel Corporation 6 #include <linux/dma-buf.h> 31 /* Pages are managed by the underlying dma-buf */ in prime_alloc_pages_locked() 37 /* Pages are managed by the underlying dma-buf */ in prime_free_pages_locked() 45 sgt = dma_buf_map_attachment_unlocked(bo->base.import_attach, DMA_BIDIRECTIONAL); in prime_map_pages_locked() 51 bo->sgt = sgt; in prime_map_pages_locked() 57 dma_buf_unmap_attachment_unlocked(bo->base.import_attach, bo->sgt, DMA_BIDIRECTIONAL); in prime_unmap_pages_locked() 58 bo->sgt = NULL; in prime_unmap_pages_locked() 72 int npages = bo->base.size >> PAGE_SHIFT; in shmem_alloc_pages_locked() [all …]
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/msm/ |
| D | msm_drv.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. 8 #include <linux/dma-mapping.h> 32 * - 1.0.0 - initial interface 33 * - 1.1.0 - adds madvise, and support for submits with > 4 cmd buffers 34 * - 1.2.0 - adds explicit fence support for submit ioctl 35 * - 1.3.0 - adds GMEM_BASE + NR_RINGS params, SUBMITQUEUE_NEW + 38 * - 1.4.0 - softpin, MSM_RELOC_BO_DUMP, and GEM_INFO support to set/get 40 * - 1.5.0 - Add SUBMITQUERY_QUERY ioctl 41 * - 1.6.0 - Syncobj support [all …]
|
| D | msm_drv.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 3 * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. 21 #include <linux/iommu.h> 75 * enum msm_display_caps - features/capabilities supported by displays 89 * enum msm_event_wait - type of HW events to wait for 90 * @MSM_ENC_COMMIT_DONE - wait for the driver to flush the registers to HW 91 * @MSM_ENC_TX_COMPLETE - wait for the HW to transfer the frame to panel 92 * @MSM_ENC_VBLANK - wait for the HW VBLANK event (for driver-internal waiters) 101 * struct msm_display_topology - defines a display topology pipeline 114 * struct msm_display_info - defines display properties [all …]
|
| /kernel/linux/linux-5.10/arch/arm64/boot/dts/qcom/ |
| D | msm8916.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved. 6 #include <dt-bindings/arm/coresight-cti-dt.h> 7 #include <dt-bindings/clock/qcom,gcc-msm8916.h> 8 #include <dt-bindings/clock/qcom,rpmcc.h> 9 #include <dt-bindings/interconnect/qcom,msm8916.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/reset/qcom,gcc-msm8916.h> 12 #include <dt-bindings/thermal/thermal.h> 15 interrupt-parent = <&intc>; [all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/exynos/ |
| D | exynos7_drm_decon.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 30 #include "regs-decon7.h" 62 {.compatible = "samsung,exynos7-decon"}, 86 struct decon_context *ctx = crtc->ctx; in decon_wait_for_vblank() local 88 if (ctx->suspended) in decon_wait_for_vblank() 91 atomic_set(&ctx->wait_vsync_event, 1); in decon_wait_for_vblank() 97 if (!wait_event_timeout(ctx->wait_vsync_queue, in decon_wait_for_vblank() 98 !atomic_read(&ctx->wait_vsync_event), in decon_wait_for_vblank() 100 DRM_DEV_DEBUG_KMS(ctx->dev, "vblank wait timed out.\n"); in decon_wait_for_vblank() 105 struct decon_context *ctx = crtc->ctx; in decon_clear_channels() local [all …]
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/exynos/ |
| D | exynos7_drm_decon.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 30 #include "regs-decon7.h" 62 {.compatible = "samsung,exynos7-decon"}, 86 struct decon_context *ctx = crtc->ctx; in decon_wait_for_vblank() local 88 if (ctx->suspended) in decon_wait_for_vblank() 91 atomic_set(&ctx->wait_vsync_event, 1); in decon_wait_for_vblank() 97 if (!wait_event_timeout(ctx->wait_vsync_queue, in decon_wait_for_vblank() 98 !atomic_read(&ctx->wait_vsync_event), in decon_wait_for_vblank() 100 DRM_DEV_DEBUG_KMS(ctx->dev, "vblank wait timed out.\n"); in decon_wait_for_vblank() 105 struct decon_context *ctx = crtc->ctx; in decon_clear_channels() local [all …]
|