Searched +full:irq +full:- +full:push +full:- +full:pull (Results 1 – 25 of 234) sorted by relevance
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/ |
| D | smsc911x.txt | 1 * Smart Mixed-Signal Connectivity (SMSC) LAN911x/912x Controller 4 - compatible : Should be "smsc,lan<model>", "smsc,lan9115" 5 - reg : Address and length of the io space for SMSC LAN 6 - interrupts : one or two interrupt specifiers 7 - The first interrupt is the SMSC LAN interrupt line 8 - The second interrupt (if present) is the PME (power 11 - phy-mode : See ethernet.txt file in the same directory 14 - reg-shift : Specify the quantity to shift the register offsets by 15 - reg-io-width : Specify the size (in bytes) of the IO accesses that 18 - smsc,irq-active-high : Indicates the IRQ polarity is active-high [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/ |
| D | smsc,lan9115.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Smart Mixed-Signal Connectivity (SMSC) LAN911x/912x Controller 10 - Shawn Guo <shawnguo@kernel.org> 13 - $ref: ethernet-controller.yaml# 18 - const: smsc,lan9115 19 - items: 20 - enum: 21 - smsc,lan89218 [all …]
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| /kernel/linux/linux-5.10/Documentation/driver-api/gpio/ |
| D | driver.rst | 26 between 0 and n-1, n being the number of GPIOs managed by the chip. 29 example if a system uses a memory-mapped set of I/O-registers where 32 GPIO 30 lines are handled by one bit per line in a 32-bit register, it makes sense to 44 So for example one platform could use global numbers 32-159 for GPIOs, with a 46 global numbers 0..63 with one set of GPIO controllers, 64-79 with another type 47 of GPIO controller, and on one particular board 80-95 with an FPGA. The legacy 49 2000-2063 to identify GPIO lines in a bank of I2C GPIO expanders. 60 - methods to establish GPIO line direction 61 - methods used to access GPIO line values 62 - method to set electrical configuration for a given GPIO line [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/ |
| D | st,stm32-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/pinctrl/st,stm32-pinctrl.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Alexandre TORGUE <alexandre.torgue@foss.st.com> 17 on-chip controllers onto these pads. 22 - st,stm32f429-pinctrl 23 - st,stm32f469-pinctrl 24 - st,stm32f746-pinctrl 25 - st,stm32f769-pinctrl [all …]
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| D | semtech,sx1501q.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Neil Armstrong <neil.armstrong@linaro.org> 16 - semtech,sx1501q 17 - semtech,sx1502q 18 - semtech,sx1503q 19 - semtech,sx1504q 20 - semtech,sx1505q 21 - semtech,sx1506q [all …]
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| D | cypress,cy8c95x0.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Patrick Rudolph <patrick.rudolph@9elements.com> 14 Pin function configuration is performed on a per-pin basis. 19 - cypress,cy8c9520 20 - cypress,cy8c9540 21 - cypress,cy8c9560 26 gpio-controller: true 28 '#gpio-cells': [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/ |
| D | st,stm32-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/pinctrl/st,stm32-pinctrl.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Alexandre TORGUE <alexandre.torgue@st.com> 17 on-chip controllers onto these pads. 22 - st,stm32f429-pinctrl 23 - st,stm32f469-pinctrl 24 - st,stm32f746-pinctrl 25 - st,stm32f769-pinctrl [all …]
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| /kernel/linux/linux-6.6/Documentation/driver-api/gpio/ |
| D | driver.rst | 26 between 0 and n-1, n being the number of GPIOs managed by the chip. 29 example if a system uses a memory-mapped set of I/O-registers where 32 GPIO 30 lines are handled by one bit per line in a 32-bit register, it makes sense to 44 So for example one platform could use global numbers 32-159 for GPIOs, with a 46 global numbers 0..63 with one set of GPIO controllers, 64-79 with another type 47 of GPIO controller, and on one particular board 80-95 with an FPGA. The legacy 49 2000-2063 to identify GPIO lines in a bank of I2C GPIO expanders. 60 - methods to establish GPIO line direction 61 - methods used to access GPIO line values 62 - method to set electrical configuration for a given GPIO line [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/i2c/ |
| D | i2c-mt65xx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/i2c/i2c-mt65xx.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 14 - $ref: /schemas/i2c/i2c-controller.yaml# 17 - Qii Wang <qii.wang@mediatek.com> 22 - const: mediatek,mt2712-i2c 23 - const: mediatek,mt6577-i2c 24 - const: mediatek,mt6589-i2c 25 - const: mediatek,mt7622-i2c [all …]
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| /kernel/linux/linux-6.6/arch/powerpc/include/asm/ |
| D | xive-regs.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 11 * Each interrupt source has a 2-bit state machine called ESB 21 * needs to be re-triggered. 24 * manipulate the PQ bits. They must be used with an 8-bytes 41 * Load-after-store ordering 44 * load-after-store ordering. This is required to use StoreEOI. 46 #define XIVE_ESB_LD_ST_MO 0x40 /* Load-after-store ordering */ 63 #define TM_NSR 0x0 /* + + - + */ 64 #define TM_CPPR 0x1 /* - + - + */ 65 #define TM_IPB 0x2 /* - + + + */ [all …]
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| /kernel/linux/linux-5.10/arch/powerpc/include/asm/ |
| D | xive-regs.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 11 * Each interrupt source has a 2-bit state machine called ESB 21 * needs to be re-triggered. 24 * manipulate the PQ bits. They must be used with an 8-bytes 41 * Load-after-store ordering 44 * load-after-store ordering. This is required to use StoreEOI. 46 #define XIVE_ESB_LD_ST_MO 0x40 /* Load-after-store ordering */ 63 #define TM_NSR 0x0 /* + + - + */ 64 #define TM_CPPR 0x1 /* - + - + */ 65 #define TM_IPB 0x2 /* - + + + */ [all …]
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| /kernel/linux/linux-5.10/drivers/pinctrl/qcom/ |
| D | pinctrl-spmi-gpio.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved. 11 #include <linux/pinctrl/pinconf-generic.h> 19 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 22 #include "../pinctrl-utils.h" 93 * Output type - indicates pin should be configured as push-pull, 130 * struct pmic_gpio_pad - keep current GPIO settings 134 * @have_buffer: Set to true if GPIO output could be configured in push-pull, 135 * open-drain or open-source mode. 138 * @analog_pass: Set to true if GPIO is in analog-pass-through mode. [all …]
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| D | pinctrl-ssbi-gpio.c | 1 // SPDX-License-Identifier: GPL-2.0-only 12 #include <linux/pinctrl/pinconf-generic.h> 20 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 23 #include "../pinctrl-utils.h" 57 * struct pm8xxx_pin_data - dynamic configuration for a pin 62 * @open_drain: output buffer configured as open-drain (vs push-pull) 65 * @pull_up_strength: placeholder for selected pull up strength 66 * only used to configure bias when pull up is selected 67 * @output_strength: selector of output-strength 97 {"qcom,drive-strength", PM8XXX_QCOM_DRIVE_STRENGH, 0}, [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/arm/ |
| D | corstone1000-mps3.dts | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 8 /dts-v1/; 14 compatible = "arm,corstone1000-mps3"; 19 phy-mode = "mii"; 21 reg-io-width = <2>; 22 smsc,irq-push-pull; 26 compatible = "nxp,usb-isp1763"; 29 bus-width = <16>;
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | arm-realview-eb-bbrevd.dtsi | 26 compatible = "regulator-fixed"; 27 regulator-name = "veth"; 28 regulator-min-microvolt = <3300000>; 29 regulator-max-microvolt = <3300000>; 30 regulator-boot-on; 40 phy-mode = "mii"; 41 smsc,irq-active-high; 42 smsc,irq-push-pull; 43 vdd33a-supply = <&veth>; 44 vddvario-supply = <&veth>;
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| D | qcom-apq8060-dragonboard.dts | 23 #include <dt-bindings/input/input.h> 24 #include <dt-bindings/gpio/gpio.h> 25 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 26 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h> 27 #include "qcom-msm8660.dtsi" 31 compatible = "qcom,apq8060-dragonboard", "qcom,msm8660"; 38 stdout-path = "serial0:115200n8"; 42 compatible = "simple-bus"; 45 vph: regulator-fixed { 46 compatible = "regulator-fixed"; [all …]
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| D | emev2-kzm9d.dts | 1 // SPDX-License-Identifier: GPL-2.0 7 /dts-v1/; 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/interrupt-controller/irq.h> 29 stdout-path = "serial1:115200n8"; 33 compatible = "gpio-keys"; 35 debounce-interval = <50>; 36 wakeup-source; 37 label = "DSW2-1"; [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/arm/ |
| D | arm-realview-eb-bbrevd.dtsi | 26 compatible = "regulator-fixed"; 27 regulator-name = "veth"; 28 regulator-min-microvolt = <3300000>; 29 regulator-max-microvolt = <3300000>; 30 regulator-boot-on; 40 phy-mode = "mii"; 41 smsc,irq-active-high; 42 smsc,irq-push-pull; 43 vdd33a-supply = <&veth>; 44 vddvario-supply = <&veth>;
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/renesas/ |
| D | r8a7779-marzen.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car H1 (R8A77790) Marzen board 9 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/input/input.h> 13 #include <dt-bindings/interrupt-controller/irq.h> 26 stdout-path = "serial0:115200n8"; 34 fixedregulator3v3: regulator-3v3 { 35 compatible = "regulator-fixed"; 36 regulator-name = "fixed-3.3V"; [all …]
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| D | emev2-kzm9d.dts | 1 // SPDX-License-Identifier: GPL-2.0 7 /dts-v1/; 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/interrupt-controller/irq.h> 29 stdout-path = "serial1:115200n8"; 33 compatible = "gpio-keys"; 35 debounce-interval = <50>; 36 wakeup-source; 37 label = "DSW2-1"; [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/qcom/ |
| D | qcom-apq8060-dragonboard.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 #include <dt-bindings/input/input.h> 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/leds/common.h> 5 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 6 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h> 7 #include "qcom-msm8660.dtsi" 11 compatible = "qcom,apq8060-dragonboard", "qcom,msm8660"; 18 stdout-path = "serial0:115200n8"; 22 vph: regulator-fixed { [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/iio/imu/ |
| D | bosch,bmi160.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jonathan Cameron <jic23@kernel.org> 15 https://www.bosch-sensortec.com/bst/products/all_products/bmi160 27 interrupt-names: 29 - INT1 30 - INT2 35 drive-open-drain: 38 open drain. If not set, defaults to push-pull. [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/iio/imu/ |
| D | bosch,bmi160.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jonathan Cameron <jic23@kernel.org> 15 https://www.bosch-sensortec.com/bst/products/all_products/bmi160 27 interrupt-names: 29 - INT1 30 - INT2 35 drive-open-drain: 38 open drain. If not set, defaults to push-pull. [all …]
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| /kernel/linux/linux-6.6/drivers/pinctrl/qcom/ |
| D | pinctrl-ssbi-gpio.c | 1 // SPDX-License-Identifier: GPL-2.0-only 17 #include <linux/pinctrl/pinconf-generic.h> 22 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 25 #include "../pinctrl-utils.h" 59 * struct pm8xxx_pin_data - dynamic configuration for a pin 64 * @open_drain: output buffer configured as open-drain (vs push-pull) 67 * @pull_up_strength: placeholder for selected pull up strength 68 * only used to configure bias when pull up is selected 69 * @output_strength: selector of output-strength 99 {"qcom,drive-strength", PM8XXX_QCOM_DRIVE_STRENGH, 0}, [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/input/ |
| D | cap11xx.txt | 24 microchip,sensor-gain: Defines the gain of the sensor circuitry. This 31 microchip,irq-active-high: By default the interrupt pin is active low 33 high push-pull output. 46 interrupt-parent = <&gpio1>; 50 microchip,sensor-gain = <2>; 59 #address-cells = <1>; 60 #size-cells = <0>;
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