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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/spi/
Dspi-cadence.txt2 -------------------------------------------
5 - compatible : Should be "cdns,spi-r1p6" or "xlnx,zynq-spi-r1p6".
6 - reg : Physical base address and size of SPI registers map.
7 - interrupts : Property with a value describing the interrupt
9 - clock-names : List of input clock names - "ref_clk", "pclk"
11 - clocks : Clock phandles (see clock bindings for details).
14 - num-cs : Number of chip selects used.
15 If a decoder is used, this will be the number of
17 - is-decoded-cs : Flag to indicate whether decoder is used or not.
22 compatible = "xlnx,zynq-spi-r1p6";
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/spi/
Dspi-cadence.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-cadence.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michal Simek <michal.simek@amd.com>
13 - $ref: spi-controller.yaml#
18 - cdns,spi-r1p6
19 - xlnx,zynq-spi-r1p6
27 clock-names:
29 - const: ref_clk
[all …]
Dcdns,qspi-nor.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/cdns,qspi-nor.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vaishnav Achath <vaishnav.a@ti.com>
13 - $ref: spi-controller.yaml#
14 - if:
18 const: xlnx,versal-ospi-1.0
21 - power-domains
22 - if:
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/bus/
Dnvidia,tegra20-gmi.txt10 - compatible : Should contain one of the following:
11 For Tegra20 must contain "nvidia,tegra20-gmi".
12 For Tegra30 must contain "nvidia,tegra30-gmi".
13 - reg: Should contain GMI controller registers location and length.
14 - clocks: Must contain an entry for each entry in clock-names.
15 - clock-names: Must include the following entries: "gmi"
16 - resets : Must contain an entry for each entry in reset-names.
17 - reset-names : Must include the following entries: "gmi"
18 - #address-cells: The number of cells used to represent physical base
20 - #size-cells: The number of cells used to represent the size of an address
[all …]
Dqcom,ebi2.txt4 external memory (such as NAND or other memory-mapped peripherals) whereas
13 Apparently this bus is clocked at 64MHz. It has dedicated pins on the package
18 Also CS1 and CS2 has -A and -B signals. Why they have that is unclear to me.
21 memory is referred to as "Chip Peripheral SS FPB0" and is 168MB big.
24 CS0 GPIO134 0x1a800000-0x1b000000 (8MB)
25 CS1 GPIO39 (A) / GPIO123 (B) 0x1b000000-0x1b800000 (8MB)
26 CS2 GPIO40 (A) / GPIO124 (B) 0x1b800000-0x1c000000 (8MB)
27 CS3 GPIO133 0x1d000000-0x25000000 (128 MB)
28 CS4 GPIO132 0x1c800000-0x1d000000 (8MB)
29 CS5 GPIO131 0x1c000000-0x1c800000 (8MB)
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/bus/
Dnvidia,tegra20-gmi.txt10 - compatible : Should contain one of the following:
11 For Tegra20 must contain "nvidia,tegra20-gmi".
12 For Tegra30 must contain "nvidia,tegra30-gmi".
13 - reg: Should contain GMI controller registers location and length.
14 - clocks: Must contain an entry for each entry in clock-names.
15 - clock-names: Must include the following entries: "gmi"
16 - resets : Must contain an entry for each entry in reset-names.
17 - reset-names : Must include the following entries: "gmi"
18 - #address-cells: The number of cells used to represent physical base
20 - #size-cells: The number of cells used to represent the size of an address
[all …]
Dqcom,ebi2.txt4 external memory (such as NAND or other memory-mapped peripherals) whereas
13 Apparently this bus is clocked at 64MHz. It has dedicated pins on the package
18 Also CS1 and CS2 has -A and -B signals. Why they have that is unclear to me.
21 memory is referred to as "Chip Peripheral SS FPB0" and is 168MB big.
24 CS0 GPIO134 0x1a800000-0x1b000000 (8MB)
25 CS1 GPIO39 (A) / GPIO123 (B) 0x1b000000-0x1b800000 (8MB)
26 CS2 GPIO40 (A) / GPIO124 (B) 0x1b800000-0x1c000000 (8MB)
27 CS3 GPIO133 0x1d000000-0x25000000 (128 MB)
28 CS4 GPIO132 0x1c800000-0x1d000000 (8MB)
29 CS5 GPIO131 0x1c000000-0x1c800000 (8MB)
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mtd/
Dcadence-quadspi.txt4 - compatible : should be one of the following:
5 Generic default - "cdns,qspi-nor".
6 For TI 66AK2G SoC - "ti,k2g-qspi", "cdns,qspi-nor".
7 For TI AM654 SoC - "ti,am654-ospi", "cdns,qspi-nor".
8 - reg : Contains two entries, each of which is a tuple consisting of a
9 physical address and length. The first entry is the address and
10 length of the controller register set. The second entry is the
12 - interrupts : Unit interrupt specifier for the controller interrupt.
13 - clocks : phandle to the Quad SPI clock.
14 - cdns,fifo-depth : Size of the data FIFO in words.
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dzynq-zc770-xm011.dts1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2013-2018 Xilinx, Inc.
7 /dts-v1/;
8 #include "zynq-7000.dtsi"
12 compatible = "xlnx,zynq-zc770-xm011", "xlnx,zynq-7000";
22 stdout-path = "serial0:115200n8";
31 compatible = "usb-nop-xceiv";
32 #phy-cells = <0>;
42 clock-frequency = <400000>;
52 num-cs = <4>;
[all …]
Dzynq-zc770-xm012.dts1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2013-2018 Xilinx, Inc.
7 /dts-v1/;
8 #include "zynq-7000.dtsi"
12 compatible = "xlnx,zynq-zc770-xm012", "xlnx,zynq-7000";
23 stdout-path = "serial0:115200n8";
38 clock-frequency = <400000>;
48 clock-frequency = <400000>;
58 num-cs = <4>;
59 is-decoded-cs = <0>;
Dzynq-zc770-xm013.dts1 // SPDX-License-Identifier: GPL-2.0+
7 /dts-v1/;
8 #include "zynq-7000.dtsi"
12 compatible = "xlnx,zynq-zc770-xm013", "xlnx,zynq-7000";
23 stdout-path = "serial0:115200n8";
38 phy-mode = "rgmii-id";
39 phy-handle = <&ethernet_phy>;
41 ethernet_phy: ethernet-phy@7 {
43 device_type = "ethernet-phy";
49 clock-frequency = <400000>;
[all …]
Dzynq-zc770-xm010.dts1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2013-2018 Xilinx, Inc.
7 /dts-v1/;
8 #include "zynq-7000.dtsi"
12 compatible = "xlnx,zynq-zc770-xm010", "xlnx,zynq-7000";
23 stdout-path = "serial0:115200n8";
32 compatible = "usb-nop-xceiv";
33 #phy-cells = <0>;
43 phy-mode = "rgmii-id";
44 phy-handle = <&ethernet_phy>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/xilinx/
Dzynq-zc770-xm011.dts1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2013-2018 Xilinx, Inc.
7 /dts-v1/;
8 #include "zynq-7000.dtsi"
12 compatible = "xlnx,zynq-zc770-xm011", "xlnx,zynq-7000";
22 stdout-path = "serial0:115200n8";
31 compatible = "usb-nop-xceiv";
32 #phy-cells = <0>;
42 clock-frequency = <400000>;
52 num-cs = <4>;
[all …]
Dzynq-zc770-xm012.dts1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2013-2018 Xilinx, Inc.
7 /dts-v1/;
8 #include "zynq-7000.dtsi"
12 compatible = "xlnx,zynq-zc770-xm012", "xlnx,zynq-7000";
23 stdout-path = "serial0:115200n8";
38 clock-frequency = <400000>;
48 clock-frequency = <400000>;
58 num-cs = <4>;
59 is-decoded-cs = <0>;
Dzynq-zc770-xm013.dts1 // SPDX-License-Identifier: GPL-2.0+
7 /dts-v1/;
8 #include "zynq-7000.dtsi"
12 compatible = "xlnx,zynq-zc770-xm013", "xlnx,zynq-7000";
23 stdout-path = "serial0:115200n8";
38 phy-mode = "rgmii-id";
39 phy-handle = <&ethernet_phy>;
41 ethernet_phy: ethernet-phy@7 {
43 device_type = "ethernet-phy";
49 clock-frequency = <400000>;
[all …]
Dzynq-zc770-xm010.dts1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2013-2018 Xilinx, Inc.
7 /dts-v1/;
8 #include "zynq-7000.dtsi"
12 compatible = "xlnx,zynq-zc770-xm010", "xlnx,zynq-7000";
23 stdout-path = "serial0:115200n8";
32 compatible = "usb-nop-xceiv";
33 #phy-cells = <0>;
43 phy-mode = "rgmii-id";
44 phy-handle = <&ethernet_phy>;
[all …]
/kernel/linux/linux-6.6/arch/x86/lib/
Dinsn-eval.c14 #include <asm/insn-eval.h>
29 * is_string_insn() - Determine if instruction is a string instruction
34 * true if the instruction, determined by the opcode, is any of the
40 /* All string instructions have a 1-byte opcode. */ in is_string_insn()
41 if (insn->opcode.nbytes != 1) in is_string_insn()
44 switch (insn->opcode.bytes[0]) { in is_string_insn()
55 * insn_has_rep_prefix() - Determine if instruction has a REP prefix
78 * get_seg_reg_override_idx() - obtain segment register override index
85 * A constant identifying the segment register to use, among CS, SS, DS,
86 * ES, FS, or GS. INAT_SEG_REG_DEFAULT is returned if no segment override
[all …]
/kernel/linux/linux-5.10/include/media/
Dv4l2-jpeg.h1 /* SPDX-License-Identifier: GPL-2.0-only */
7 * For reference, see JPEG ITU-T.81 (ISO/IEC 10918-1)
13 #include <linux/v4l2-controls.h>
19 * struct v4l2_jpeg_reference - reference into the JPEG buffer
24 * and length is the size of the segment parameters, excluding the marker code.
34 * struct v4l2_jpeg_frame_component_spec - frame component-specification
48 * struct v4l2_jpeg_frame_header - JPEG frame header
53 * @component: component-specification, see v4l2_jpeg_frame_component_spec
54 * @subsampling: decoded subsampling from component-specification
68 * struct v4l2_jpeg_scan_component_spec - scan component-specification
[all …]
/kernel/linux/linux-5.10/arch/x86/lib/
Dinsn-eval.c14 #include <asm/insn-eval.h>
29 * is_string_insn() - Determine if instruction is a string instruction
34 * true if the instruction, determined by the opcode, is any of the
42 /* All string instructions have a 1-byte opcode. */ in is_string_insn()
43 if (insn->opcode.nbytes != 1) in is_string_insn()
46 switch (insn->opcode.bytes[0]) { in is_string_insn()
57 * insn_has_rep_prefix() - Determine if instruction has a REP prefix
80 * get_seg_reg_override_idx() - obtain segment register override index
87 * A constant identifying the segment register to use, among CS, SS, DS,
88 * ES, FS, or GS. INAT_SEG_REG_DEFAULT is returned if no segment override
[all …]
/kernel/linux/linux-6.6/include/media/
Dv4l2-jpeg.h1 /* SPDX-License-Identifier: GPL-2.0-only */
7 * For reference, see JPEG ITU-T.81 (ISO/IEC 10918-1)
13 #include <linux/v4l2-controls.h>
19 * struct v4l2_jpeg_reference - reference into the JPEG buffer
24 * and length is the size of the segment parameters, excluding the marker code.
34 * struct v4l2_jpeg_frame_component_spec - frame component-specification
48 * struct v4l2_jpeg_frame_header - JPEG frame header
53 * @component: component-specification, see v4l2_jpeg_frame_component_spec
54 * @subsampling: decoded subsampling from component-specification
68 * struct v4l2_jpeg_scan_component_spec - scan component-specification
[all …]
/kernel/linux/linux-6.6/arch/x86/realmode/rm/
Dreboot.S1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <asm/processor-flags.h>
6 #include <asm/msr-index.h>
13 * controller to pulse the CPU reset line, which is more thorough, but
14 * doesn't work with at least one type of 486 motherboard. It is easy
17 * This code is called with the restart type (0 = BIOS, 1 = APM) in
25 /* Switch to trampoline GDT as it is guaranteed < 4 GiB */
51 * mode. The GDT is not used in real mode; it is just needed here to
57 * Load the data segment registers with 16-bit compatible values
69 * This is 16-bit protected mode code to disable paging and the cache,
[all …]
/kernel/linux/linux-5.10/arch/x86/realmode/rm/
Dreboot.S1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <asm/processor-flags.h>
6 #include <asm/msr-index.h>
13 * controller to pulse the CPU reset line, which is more thorough, but
14 * doesn't work with at least one type of 486 motherboard. It is easy
17 * This code is called with the restart type (0 = BIOS, 1 = APM) in
25 /* Switch to trampoline GDT as it is guaranteed < 4 GiB */
51 * mode. The GDT is not used in real mode; it is just needed here to
57 * Load the data segment registers with 16-bit compatible values
69 * This is 16-bit protected mode code to disable paging and the cache,
[all …]
/kernel/linux/linux-5.10/drivers/isdn/mISDN/
Ddsp_blowfish.c17 * how to encode a sample stream to 64-bit blocks that will be encryped
19 * first of all, data is collected until a block of 9 samples are received.
20 * of course, a packet may have much more than 9 sample, but is may have
21 * not excacly the multiple of 9 samples. if there is a rest, the next
24 * the block is then converted to 9 uLAW samples without the least sigificant
25 * bit. the result is a 7-bit encoded sample.
39 * the missing bit 0 of the last byte is filled with some
44 * the result will be converted into 9 bytes. the bit 7 is used for
45 * checksumme (CS) for sync (0, 1) and for the last bit:
53 * CS 4(4) 4(3) 4(2) 4(1) 4(0) 5(7) 5(6)
[all …]
/kernel/linux/linux-6.6/drivers/isdn/mISDN/
Ddsp_blowfish.c17 * how to encode a sample stream to 64-bit blocks that will be encryped
19 * first of all, data is collected until a block of 9 samples are received.
20 * of course, a packet may have much more than 9 sample, but is may have
21 * not excacly the multiple of 9 samples. if there is a rest, the next
24 * the block is then converted to 9 uLAW samples without the least sigificant
25 * bit. the result is a 7-bit encoded sample.
39 * the missing bit 0 of the last byte is filled with some
44 * the result will be converted into 9 bytes. the bit 7 is used for
45 * checksumme (CS) for sync (0, 1) and for the last bit:
53 * CS 4(4) 4(3) 4(2) 4(1) 4(0) 5(7) 5(6)
[all …]
/kernel/linux/linux-5.10/tools/perf/util/
Dcs-etm.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright(C) 2015-2018 Linaro Limited.
21 #include "cs-etm.h"
22 #include "cs-etm-decoder/cs-etm-decoder.h"
36 #include "thread-stack.h"
38 #include "util/synthetic-events.h"
112 * work with. One option is to modify to auxtrace_heap_XYZ() API or simply
138 return -EINVAL; in cs_etm__get_magic()
140 metadata = inode->priv; in cs_etm__get_magic()
152 return -EINVAL; in cs_etm__get_cpu()
[all …]

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