Home
last modified time | relevance | path

Searched full:jpeg (Results 1 – 25 of 431) sorted by relevance

12345678910>>...18

/kernel/linux/linux-6.6/drivers/media/platform/mediatek/jpeg/
Dmtk_jpeg_core.c136 struct mtk_jpeg_dev *jpeg = video_drvdata(file); in mtk_jpeg_querycap() local
138 strscpy(cap->driver, jpeg->variant->dev_name, sizeof(cap->driver)); in mtk_jpeg_querycap()
139 strscpy(cap->card, jpeg->variant->dev_name, sizeof(cap->card)); in mtk_jpeg_querycap()
216 struct mtk_jpeg_dev *jpeg = ctx->jpeg; in mtk_jpeg_enum_fmt_vid_cap() local
218 return mtk_jpeg_enum_fmt(jpeg->variant->formats, in mtk_jpeg_enum_fmt_vid_cap()
219 jpeg->variant->num_formats, f, in mtk_jpeg_enum_fmt_vid_cap()
227 struct mtk_jpeg_dev *jpeg = ctx->jpeg; in mtk_jpeg_enum_fmt_vid_out() local
229 return mtk_jpeg_enum_fmt(jpeg->variant->formats, in mtk_jpeg_enum_fmt_vid_out()
230 jpeg->variant->num_formats, f, in mtk_jpeg_enum_fmt_vid_out()
309 struct mtk_jpeg_dev *jpeg = ctx->jpeg; in mtk_jpeg_g_fmt_vid_mplane() local
[all …]
Dmtk_jpeg_core.h21 #define MTK_JPEG_NAME "mtk-jpeg"
50 * struct mtk_jpeg_variant - mtk jpeg driver variant
53 * @formats: jpeg driver's internal color format
55 * @qops: the callback of jpeg vb2_ops
56 * @irq_handler: jpeg irq handler callback
57 * @hw_reset: jpeg hardware reset callback
58 * @m2m_ops: the callback of jpeg v4l2_m2m_ops
59 * @dev_name: jpeg device name
60 * @ioctl_ops: the callback of jpeg v4l2_ioctl_ops
63 * @multi_core: mark jpeg hw is multi_core or not
[all …]
/kernel/linux/linux-5.10/drivers/media/platform/mtk-jpeg/
Dmtk_jpeg_core.c137 struct mtk_jpeg_dev *jpeg = video_drvdata(file); in mtk_jpeg_querycap() local
139 strscpy(cap->driver, jpeg->variant->dev_name, sizeof(cap->driver)); in mtk_jpeg_querycap()
140 strscpy(cap->card, jpeg->variant->dev_name, sizeof(cap->card)); in mtk_jpeg_querycap()
142 dev_name(jpeg->dev)); in mtk_jpeg_querycap()
219 struct mtk_jpeg_dev *jpeg = ctx->jpeg; in mtk_jpeg_enum_fmt_vid_cap() local
221 return mtk_jpeg_enum_fmt(jpeg->variant->formats, in mtk_jpeg_enum_fmt_vid_cap()
222 jpeg->variant->num_formats, f, in mtk_jpeg_enum_fmt_vid_cap()
230 struct mtk_jpeg_dev *jpeg = ctx->jpeg; in mtk_jpeg_enum_fmt_vid_out() local
232 return mtk_jpeg_enum_fmt(jpeg->variant->formats, in mtk_jpeg_enum_fmt_vid_out()
233 jpeg->variant->num_formats, f, in mtk_jpeg_enum_fmt_vid_out()
[all …]
Dmtk_jpeg_core.h17 #define MTK_JPEG_NAME "mtk-jpeg"
48 * mtk_jpeg_variant - mtk jpeg driver variant
51 * @format: jpeg driver's internal color format
53 * @qops: the callback of jpeg vb2_ops
54 * @irq_handler: jpeg irq handler callback
55 * @hw_reset: jpeg hardware reset callback
56 * @m2m_ops: the callback of jpeg v4l2_m2m_ops
57 * @dev_name: jpeg device name
58 * @ioctl_ops: the callback of jpeg v4l2_ioctl_ops
78 * struct mt_jpeg - JPEG IP abstraction
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
Djpeg_v2_5.c61 adev->jpeg.num_jpeg_inst = JPEG25_MAX_HW_INSTANCES_ARCTURUS; in jpeg_v2_5_early_init()
62 for (i = 0; i < adev->jpeg.num_jpeg_inst; i++) { in jpeg_v2_5_early_init()
63 harvest = RREG32_SOC15(JPEG, i, mmCC_UVD_HARVESTING); in jpeg_v2_5_early_init()
65 adev->jpeg.harvest_config |= 1 << i; in jpeg_v2_5_early_init()
67 if (adev->jpeg.harvest_config == (AMDGPU_JPEG_HARVEST_JPEG0 | in jpeg_v2_5_early_init()
78 * jpeg_v2_5_sw_init - sw init for JPEG block
90 for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) { in jpeg_v2_5_sw_init()
91 if (adev->jpeg.harvest_config & (1 << i)) in jpeg_v2_5_sw_init()
94 /* JPEG TRAP */ in jpeg_v2_5_sw_init()
96 VCN_2_0__SRCID__JPEG_DECODE, &adev->jpeg.inst[i].irq); in jpeg_v2_5_sw_init()
[all …]
Djpeg_v3_0.c52 u32 harvest = RREG32_SOC15(JPEG, 0, mmCC_UVD_HARVESTING); in jpeg_v3_0_early_init()
57 adev->jpeg.num_jpeg_inst = 1; in jpeg_v3_0_early_init()
66 * jpeg_v3_0_sw_init - sw init for JPEG block
78 /* JPEG TRAP */ in jpeg_v3_0_sw_init()
80 VCN_2_0__SRCID__JPEG_DECODE, &adev->jpeg.inst->irq); in jpeg_v3_0_sw_init()
92 ring = &adev->jpeg.inst->ring_dec; in jpeg_v3_0_sw_init()
96 r = amdgpu_ring_init(adev, ring, 512, &adev->jpeg.inst->irq, 0, in jpeg_v3_0_sw_init()
101 adev->jpeg.internal.jpeg_pitch = mmUVD_JPEG_PITCH_INTERNAL_OFFSET; in jpeg_v3_0_sw_init()
102 adev->jpeg.inst->external.jpeg_pitch = SOC15_REG_OFFSET(JPEG, 0, mmUVD_JPEG_PITCH); in jpeg_v3_0_sw_init()
108 * jpeg_v3_0_sw_fini - sw fini for JPEG block
[all …]
Djpeg_v1_0.c41 …ring->ring[(*ptr)++] = PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_EXTERNAL_REG_BASE), 0, 0, PACK… in jpeg_v1_0_decode_ring_patch_wreg()
60 reg = SOC15_REG_OFFSET(JPEG, 0, mmUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_LOW); in jpeg_v1_0_decode_ring_set_patch_ring()
66 reg = SOC15_REG_OFFSET(JPEG, 0, mmUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_HIGH); in jpeg_v1_0_decode_ring_set_patch_ring()
78 reg = SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_RB_CNTL); in jpeg_v1_0_decode_ring_set_patch_ring()
84 reg = SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_RB_REF_DATA); in jpeg_v1_0_decode_ring_set_patch_ring()
90 reg = SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_RB_CNTL); in jpeg_v1_0_decode_ring_set_patch_ring()
95 …ring->ring[ptr++] = PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_RB_COND_RD_TIMER), 0, 0, PACKETJ_… in jpeg_v1_0_decode_ring_set_patch_ring()
97 …ring->ring[ptr++] = PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_RB_REF_DATA), 0, 0, PACKETJ_TYPE0… in jpeg_v1_0_decode_ring_set_patch_ring()
99 …ring->ring[ptr++] = PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_EXTERNAL_REG_BASE), 0, 0, PACKETJ… in jpeg_v1_0_decode_ring_set_patch_ring()
117 reg = SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_RB_RPTR); in jpeg_v1_0_decode_ring_set_patch_ring()
[all …]
Djpeg_v2_0.c71 adev->jpeg.num_jpeg_inst = 1; in jpeg_v2_0_early_init()
80 * jpeg_v2_0_sw_init - sw init for JPEG block
92 /* JPEG TRAP */ in jpeg_v2_0_sw_init()
94 VCN_2_0__SRCID__JPEG_DECODE, &adev->jpeg.inst->irq); in jpeg_v2_0_sw_init()
106 ring = &adev->jpeg.inst->ring_dec; in jpeg_v2_0_sw_init()
110 r = amdgpu_ring_init(adev, ring, 512, &adev->jpeg.inst->irq, in jpeg_v2_0_sw_init()
115 adev->jpeg.internal.jpeg_pitch = mmUVD_JPEG_PITCH_INTERNAL_OFFSET; in jpeg_v2_0_sw_init()
116 adev->jpeg.inst->external.jpeg_pitch = SOC15_REG_OFFSET(JPEG, 0, mmUVD_JPEG_PITCH); in jpeg_v2_0_sw_init()
122 * jpeg_v2_0_sw_fini - sw fini for JPEG block
126 * JPEG suspend and free up sw allocation
[all …]
Damdgpu_jpeg.c39 INIT_DELAYED_WORK(&adev->jpeg.idle_work, amdgpu_jpeg_idle_work_handler); in amdgpu_jpeg_sw_init()
40 mutex_init(&adev->jpeg.jpeg_pg_lock); in amdgpu_jpeg_sw_init()
41 atomic_set(&adev->jpeg.total_submission_cnt, 0); in amdgpu_jpeg_sw_init()
50 cancel_delayed_work_sync(&adev->jpeg.idle_work); in amdgpu_jpeg_sw_fini()
52 for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) { in amdgpu_jpeg_sw_fini()
53 if (adev->jpeg.harvest_config & (1 << i)) in amdgpu_jpeg_sw_fini()
56 amdgpu_ring_fini(&adev->jpeg.inst[i].ring_dec); in amdgpu_jpeg_sw_fini()
59 mutex_destroy(&adev->jpeg.jpeg_pg_lock); in amdgpu_jpeg_sw_fini()
66 cancel_delayed_work_sync(&adev->jpeg.idle_work); in amdgpu_jpeg_suspend()
79 container_of(work, struct amdgpu_device, jpeg.idle_work.work); in amdgpu_jpeg_idle_work_handler()
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
Djpeg_v2_5.c63 adev->jpeg.num_jpeg_rings = 1; in jpeg_v2_5_early_init()
64 adev->jpeg.num_jpeg_inst = JPEG25_MAX_HW_INSTANCES_ARCTURUS; in jpeg_v2_5_early_init()
65 for (i = 0; i < adev->jpeg.num_jpeg_inst; i++) { in jpeg_v2_5_early_init()
66 harvest = RREG32_SOC15(JPEG, i, mmCC_UVD_HARVESTING); in jpeg_v2_5_early_init()
68 adev->jpeg.harvest_config |= 1 << i; in jpeg_v2_5_early_init()
70 if (adev->jpeg.harvest_config == (AMDGPU_JPEG_HARVEST_JPEG0 | in jpeg_v2_5_early_init()
82 * jpeg_v2_5_sw_init - sw init for JPEG block
94 for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) { in jpeg_v2_5_sw_init()
95 if (adev->jpeg.harvest_config & (1 << i)) in jpeg_v2_5_sw_init()
98 /* JPEG TRAP */ in jpeg_v2_5_sw_init()
[all …]
Djpeg_v3_0.c60 harvest = RREG32_SOC15(JPEG, 0, mmCC_UVD_HARVESTING); in jpeg_v3_0_early_init()
66 adev->jpeg.num_jpeg_inst = 1; in jpeg_v3_0_early_init()
67 adev->jpeg.num_jpeg_rings = 1; in jpeg_v3_0_early_init()
76 * jpeg_v3_0_sw_init - sw init for JPEG block
88 /* JPEG TRAP */ in jpeg_v3_0_sw_init()
90 VCN_2_0__SRCID__JPEG_DECODE, &adev->jpeg.inst->irq); in jpeg_v3_0_sw_init()
102 ring = adev->jpeg.inst->ring_dec; in jpeg_v3_0_sw_init()
107 r = amdgpu_ring_init(adev, ring, 512, &adev->jpeg.inst->irq, 0, in jpeg_v3_0_sw_init()
112 adev->jpeg.internal.jpeg_pitch[0] = mmUVD_JPEG_PITCH_INTERNAL_OFFSET; in jpeg_v3_0_sw_init()
113 adev->jpeg.inst->external.jpeg_pitch[0] = SOC15_REG_OFFSET(JPEG, 0, mmUVD_JPEG_PITCH); in jpeg_v3_0_sw_init()
[all …]
Djpeg_v4_0_3.c70 adev->jpeg.num_jpeg_rings = AMDGPU_MAX_JPEG_RINGS; in jpeg_v4_0_3_early_init()
80 * jpeg_v4_0_3_sw_init - sw init for JPEG block
92 for (j = 0; j < adev->jpeg.num_jpeg_rings; ++j) { in jpeg_v4_0_3_sw_init()
93 /* JPEG TRAP */ in jpeg_v4_0_3_sw_init()
95 amdgpu_ih_srcid_jpeg[j], &adev->jpeg.inst->irq); in jpeg_v4_0_3_sw_init()
108 for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) { in jpeg_v4_0_3_sw_init()
109 jpeg_inst = GET_INST(JPEG, i); in jpeg_v4_0_3_sw_init()
111 for (j = 0; j < adev->jpeg.num_jpeg_rings; ++j) { in jpeg_v4_0_3_sw_init()
112 ring = &adev->jpeg.inst[i].ring_dec[j]; in jpeg_v4_0_3_sw_init()
114 ring->vm_hub = AMDGPU_MMHUB0(adev->jpeg.inst[i].aid_id); in jpeg_v4_0_3_sw_init()
[all …]
Djpeg_v4_0.c60 adev->jpeg.num_jpeg_inst = 1; in jpeg_v4_0_early_init()
61 adev->jpeg.num_jpeg_rings = 1; in jpeg_v4_0_early_init()
71 * jpeg_v4_0_sw_init - sw init for JPEG block
83 /* JPEG TRAP */ in jpeg_v4_0_sw_init()
85 VCN_4_0__SRCID__JPEG_DECODE, &adev->jpeg.inst->irq); in jpeg_v4_0_sw_init()
89 /* JPEG DJPEG POISON EVENT */ in jpeg_v4_0_sw_init()
91 VCN_4_0__SRCID_DJPEG0_POISON, &adev->jpeg.inst->ras_poison_irq); in jpeg_v4_0_sw_init()
95 /* JPEG EJPEG POISON EVENT */ in jpeg_v4_0_sw_init()
97 VCN_4_0__SRCID_EJPEG0_POISON, &adev->jpeg.inst->ras_poison_irq); in jpeg_v4_0_sw_init()
109 ring = adev->jpeg.inst->ring_dec; in jpeg_v4_0_sw_init()
[all …]
Djpeg_v2_0.c51 adev->jpeg.num_jpeg_inst = 1; in jpeg_v2_0_early_init()
52 adev->jpeg.num_jpeg_rings = 1; in jpeg_v2_0_early_init()
61 * jpeg_v2_0_sw_init - sw init for JPEG block
73 /* JPEG TRAP */ in jpeg_v2_0_sw_init()
75 VCN_2_0__SRCID__JPEG_DECODE, &adev->jpeg.inst->irq); in jpeg_v2_0_sw_init()
87 ring = adev->jpeg.inst->ring_dec; in jpeg_v2_0_sw_init()
92 r = amdgpu_ring_init(adev, ring, 512, &adev->jpeg.inst->irq, in jpeg_v2_0_sw_init()
97 adev->jpeg.internal.jpeg_pitch[0] = mmUVD_JPEG_PITCH_INTERNAL_OFFSET; in jpeg_v2_0_sw_init()
98 adev->jpeg.inst->external.jpeg_pitch[0] = SOC15_REG_OFFSET(JPEG, 0, mmUVD_JPEG_PITCH); in jpeg_v2_0_sw_init()
104 * jpeg_v2_0_sw_fini - sw fini for JPEG block
[all …]
Damdgpu_jpeg.c39 INIT_DELAYED_WORK(&adev->jpeg.idle_work, amdgpu_jpeg_idle_work_handler); in amdgpu_jpeg_sw_init()
40 mutex_init(&adev->jpeg.jpeg_pg_lock); in amdgpu_jpeg_sw_init()
41 atomic_set(&adev->jpeg.total_submission_cnt, 0); in amdgpu_jpeg_sw_init()
50 for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) { in amdgpu_jpeg_sw_fini()
51 if (adev->jpeg.harvest_config & (1 << i)) in amdgpu_jpeg_sw_fini()
54 for (j = 0; j < adev->jpeg.num_jpeg_rings; ++j) in amdgpu_jpeg_sw_fini()
55 amdgpu_ring_fini(&adev->jpeg.inst[i].ring_dec[j]); in amdgpu_jpeg_sw_fini()
58 mutex_destroy(&adev->jpeg.jpeg_pg_lock); in amdgpu_jpeg_sw_fini()
65 cancel_delayed_work_sync(&adev->jpeg.idle_work); in amdgpu_jpeg_suspend()
78 container_of(work, struct amdgpu_device, jpeg.idle_work.work); in amdgpu_jpeg_idle_work_handler()
[all …]
Djpeg_v1_0.c45 …ring->ring[(*ptr)++] = PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_EXTERNAL_REG_BASE), 0, 0, PACK… in jpeg_v1_0_decode_ring_patch_wreg()
64 reg = SOC15_REG_OFFSET(JPEG, 0, mmUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_LOW); in jpeg_v1_0_decode_ring_set_patch_ring()
70 reg = SOC15_REG_OFFSET(JPEG, 0, mmUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_HIGH); in jpeg_v1_0_decode_ring_set_patch_ring()
82 reg = SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_RB_CNTL); in jpeg_v1_0_decode_ring_set_patch_ring()
88 reg = SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_RB_REF_DATA); in jpeg_v1_0_decode_ring_set_patch_ring()
94 reg = SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_RB_CNTL); in jpeg_v1_0_decode_ring_set_patch_ring()
99 …ring->ring[ptr++] = PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_RB_COND_RD_TIMER), 0, 0, PACKETJ_… in jpeg_v1_0_decode_ring_set_patch_ring()
101 …ring->ring[ptr++] = PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_RB_REF_DATA), 0, 0, PACKETJ_TYPE0… in jpeg_v1_0_decode_ring_set_patch_ring()
103 …ring->ring[ptr++] = PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_EXTERNAL_REG_BASE), 0, 0, PACKETJ… in jpeg_v1_0_decode_ring_set_patch_ring()
121 reg = SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_RB_RPTR); in jpeg_v1_0_decode_ring_set_patch_ring()
[all …]
/kernel/linux/linux-6.6/drivers/media/platform/samsung/s5p-jpeg/
Djpeg-core.c2 /* linux/drivers/media/platform/samsung/s5p-jpeg/jpeg-core.c
31 #include "jpeg-core.h"
32 #include "jpeg-hw-s5p.h"
33 #include "jpeg-hw-exynos4.h"
34 #include "jpeg-hw-exynos3250.h"
35 #include "jpeg-regs.h"
590 switch (ctx->jpeg->variant->version) { in s5p_jpeg_to_user_subsampling()
767 struct s5p_jpeg *jpeg = ctx->jpeg; in exynos4_jpeg_parse_decode_h_tbl() local
799 exynos4_jpeg_select_dec_h_tbl(jpeg->regs, c, in exynos4_jpeg_parse_decode_h_tbl()
807 struct s5p_jpeg *jpeg = ctx->jpeg; in exynos4_jpeg_parse_huff_tbl() local
[all …]
Djpeg-regs.h2 /* linux/drivers/media/platform/samsung/s5p-jpeg/jpeg-regs.h
4 * Register definition file for Samsung JPEG codec driver
18 /* JPEG mode register */
29 /* JPEG operation status register */
45 /* JPEG restart interval register upper byte */
48 /* JPEG restart interval register lower byte */
51 /* JPEG vertical resolution register upper byte */
54 /* JPEG vertical resolution register lower byte */
57 /* JPEG horizontal resolution register upper byte */
60 /* JPEG horizontal resolution register lower byte */
[all …]
Djpeg-core.h2 /* linux/drivers/media/platform/samsung/s5p-jpeg/jpeg-core.h
14 #include <media/jpeg.h>
19 #define S5P_JPEG_M2M_NAME "s5p-jpeg"
23 /* JPEG compression quality setting */
27 /* JPEG RGB to YCbCr conversion matrix coefficients */
95 * struct s5p_jpeg - JPEG IP abstraction
102 * @regs: JPEG IP registers mapping
103 * @irq: JPEG IP irq
104 * @irq_ret: JPEG IP irq result value
105 * @clocks: JPEG IP clock(s)
[all …]
/kernel/linux/linux-5.10/drivers/media/platform/s5p-jpeg/
Djpeg-core.c2 /* linux/drivers/media/platform/s5p-jpeg/jpeg-core.c
31 #include "jpeg-core.h"
32 #include "jpeg-hw-s5p.h"
33 #include "jpeg-hw-exynos4.h"
34 #include "jpeg-hw-exynos3250.h"
35 #include "jpeg-regs.h"
590 switch (ctx->jpeg->variant->version) { in s5p_jpeg_to_user_subsampling()
767 struct s5p_jpeg *jpeg = ctx->jpeg; in exynos4_jpeg_parse_decode_h_tbl() local
796 exynos4_jpeg_select_dec_h_tbl(jpeg->regs, c, in exynos4_jpeg_parse_decode_h_tbl()
804 struct s5p_jpeg *jpeg = ctx->jpeg; in exynos4_jpeg_parse_huff_tbl() local
[all …]
Djpeg-regs.h2 /* linux/drivers/media/platform/s5p-jpeg/jpeg-regs.h
4 * Register definition file for Samsung JPEG codec driver
18 /* JPEG mode register */
29 /* JPEG operation status register */
45 /* JPEG restart interval register upper byte */
48 /* JPEG restart interval register lower byte */
51 /* JPEG vertical resolution register upper byte */
54 /* JPEG vertical resolution register lower byte */
57 /* JPEG horizontal resolution register upper byte */
60 /* JPEG horizontal resolution register lower byte */
[all …]
Djpeg-core.h2 /* linux/drivers/media/platform/s5p-jpeg/jpeg-core.h
18 #define S5P_JPEG_M2M_NAME "s5p-jpeg"
22 /* JPEG compression quality setting */
26 /* JPEG RGB to YCbCr conversion matrix coefficients */
39 /* a selection of JPEG markers */
105 * struct s5p_jpeg - JPEG IP abstraction
112 * @regs: JPEG IP registers mapping
113 * @irq: JPEG IP irq
114 * @clocks: JPEG IP clock(s)
115 * @dev: JPEG IP struct device
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/media/
Dsamsung,s5pv210-jpeg.yaml4 $id: http://devicetree.org/schemas/media/samsung,s5pv210-jpeg.yaml#
7 title: Samsung S5PV210 and Exynos SoC JPEG codec
18 - samsung,s5pv210-jpeg
19 - samsung,exynos3250-jpeg
20 - samsung,exynos4210-jpeg
21 - samsung,exynos4212-jpeg
22 - samsung,exynos5420-jpeg
23 - samsung,exynos5433-jpeg
59 - samsung,s5pv210-jpeg
60 - samsung,exynos4210-jpeg
[all …]
/kernel/linux/linux-6.6/drivers/media/platform/nxp/imx-jpeg/
Dmxc-jpeg.c3 * V4L2 driver for the JPEG encoder/decoder from i.MX8QXP/i.MX8QM application
8 * Baseline and extended sequential jpeg decoding is supported.
9 * Progressive jpeg decoding is not supported by the IP.
19 * from the jpeg stream, by parsing the jpeg markers.
32 * but the driver works around this by replacing them in the jpeg stream.
38 * This is inspired by the drivers/media/platform/samsung/s5p-jpeg driver
56 #include <media/v4l2-jpeg.h>
63 #include "mxc-jpeg-hw.h"
64 #include "mxc-jpeg.h"
68 .name = "JPEG",
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/media/
Dexynos-jpeg-codec.txt1 Samsung S5P/Exynos SoC series JPEG codec
6 "samsung,s5pv210-jpeg", "samsung,exynos4210-jpeg",
7 "samsung,exynos3250-jpeg", "samsung,exynos5420-jpeg",
8 "samsung,exynos5433-jpeg";
9 - reg : address and length of the JPEG codec IP register set;
10 - interrupts : specifies the JPEG codec IP interrupt;
12 - "jpeg" for the core gate clock,

12345678910>>...18