| /kernel/linux/linux-5.10/arch/mips/boot/dts/ingenic/ |
| D | jz4740.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/jz4740-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
6 #address-cells = <1>;
7 #size-cells = <1>;
8 compatible = "ingenic,jz4740";
11 #address-cells = <1>;
12 #size-cells = <0>;
16 compatible = "ingenic,xburst-mxu1.0";
20 clock-names = "cpu";
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| D | jz4725b.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/jz4725b-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
6 #address-cells = <1>;
7 #size-cells = <1>;
11 #address-cells = <1>;
12 #size-cells = <0>;
16 compatible = "ingenic,xburst-mxu1.0";
20 clock-names = "cpu";
24 cpuintc: interrupt-controller {
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| D | jz4770.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/jz4770-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
6 #address-cells = <1>;
7 #size-cells = <1>;
11 #address-cells = <1>;
12 #size-cells = <0>;
16 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
20 clock-names = "cpu";
24 cpuintc: interrupt-controller {
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| D | jz4780.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/jz4780-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
4 #include <dt-bindings/dma/jz4780-dma.h>
7 #address-cells = <1>;
8 #size-cells = <1>;
12 #address-cells = <1>;
13 #size-cells = <0>;
17 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
21 clock-names = "cpu";
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| /kernel/linux/linux-6.6/arch/mips/boot/dts/ingenic/ |
| D | jz4740.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,jz4740-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
6 #address-cells = <1>;
7 #size-cells = <1>;
8 compatible = "ingenic,jz4740";
11 #address-cells = <1>;
12 #size-cells = <0>;
16 compatible = "ingenic,xburst-mxu1.0";
20 clock-names = "cpu";
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| D | jz4725b.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,jz4725b-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
6 #address-cells = <1>;
7 #size-cells = <1>;
11 #address-cells = <1>;
12 #size-cells = <0>;
16 compatible = "ingenic,xburst-mxu1.0";
20 clock-names = "cpu";
24 cpuintc: interrupt-controller {
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| D | jz4770.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,jz4770-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
6 #address-cells = <1>;
7 #size-cells = <1>;
11 #address-cells = <1>;
12 #size-cells = <0>;
16 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
20 clock-names = "cpu";
24 cpuintc: interrupt-controller {
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| D | x1830.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,tcu.h>
3 #include <dt-bindings/clock/ingenic,x1830-cgu.h>
4 #include <dt-bindings/dma/x1830-dma.h>
7 #address-cells = <1>;
8 #size-cells = <1>;
12 #address-cells = <1>;
13 #size-cells = <0>;
17 compatible = "ingenic,xburst-fpu2.0-mxu2.0";
21 clock-names = "cpu";
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/rtc/ |
| D | ingenic,rtc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rtc/ingenic,rtc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ingenic SoCs Real-Time Clock DT bindings
10 - Paul Cercueil <paul@crapouillou.net>
13 - $ref: rtc.yaml#
18 - enum:
19 - ingenic,jz4740-rtc
20 - ingenic,jz4760-rtc
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/rtc/ |
| D | ingenic,rtc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rtc/ingenic,rtc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ingenic SoCs Real-Time Clock
10 - Paul Cercueil <paul@crapouillou.net>
13 - $ref: rtc.yaml#
14 - if:
20 - ingenic,jz4770-rtc
21 - ingenic,jz4780-rtc
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| /kernel/linux/linux-5.10/drivers/rtc/ |
| D | rtc-jz4740.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
5 * JZ4740 SoC RTC driver
16 #include <linux/rtc.h>
57 struct rtc_device *rtc; member
64 static inline uint32_t jz4740_rtc_reg_read(struct jz4740_rtc *rtc, size_t reg) in jz4740_rtc_reg_read() argument
66 return readl(rtc->base + reg); in jz4740_rtc_reg_read()
69 static int jz4740_rtc_wait_write_ready(struct jz4740_rtc *rtc) in jz4740_rtc_wait_write_ready() argument
75 ctrl = jz4740_rtc_reg_read(rtc, JZ_REG_RTC_CTRL); in jz4740_rtc_wait_write_ready()
76 } while (!(ctrl & JZ_RTC_CTRL_WRDY) && --timeout); in jz4740_rtc_wait_write_ready()
[all …]
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| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0
3 # Makefile for RTC class/drivers.
6 ccflags-$(CONFIG_RTC_DEBUG) := -DDEBUG
8 obj-$(CONFIG_RTC_LIB) += lib.o
9 obj-$(CONFIG_RTC_SYSTOHC) += systohc.o
10 obj-$(CONFIG_RTC_CLASS) += rtc-core.o
11 obj-$(CONFIG_RTC_MC146818_LIB) += rtc-mc146818-lib.o
12 rtc-core-y := class.o interface.o
14 rtc-core-$(CONFIG_RTC_NVMEM) += nvmem.o
15 rtc-core-$(CONFIG_RTC_INTF_DEV) += dev.o
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/timer/ |
| D | ingenic,tcu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 Documentation/arch/mips/ingenic-tcu.rst.
14 - Paul Cercueil <paul@crapouillou.net>
21 - ingenic,jz4740-tcu
22 - ingenic,jz4725b-tcu
23 - ingenic,jz4760-tcu
24 - ingenic,jz4760b-tcu
25 - ingenic,jz4770-tcu
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/timer/ |
| D | ingenic,tcu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 Documentation/mips/ingenic-tcu.rst.
14 - Paul Cercueil <paul@crapouillou.net>
21 - ingenic,jz4740-tcu
22 - ingenic,jz4725b-tcu
23 - ingenic,jz4770-tcu
24 - ingenic,jz4780-tcu
25 - ingenic,x1000-tcu
[all …]
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| /kernel/linux/linux-6.6/drivers/rtc/ |
| D | rtc-jz4740.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
5 * JZ4740 SoC RTC driver
9 #include <linux/clk-provider.h>
19 #include <linux/rtc.h>
64 struct rtc_device *rtc; member
73 static inline uint32_t jz4740_rtc_reg_read(struct jz4740_rtc *rtc, size_t reg) in jz4740_rtc_reg_read() argument
75 return readl(rtc->base + reg); in jz4740_rtc_reg_read()
78 static int jz4740_rtc_wait_write_ready(struct jz4740_rtc *rtc) in jz4740_rtc_wait_write_ready() argument
82 return readl_poll_timeout(rtc->base + JZ_REG_RTC_CTRL, ctrl, in jz4740_rtc_wait_write_ready()
[all …]
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| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0
3 # Makefile for RTC class/drivers.
6 ccflags-$(CONFIG_RTC_DEBUG) := -DDEBUG
8 obj-$(CONFIG_RTC_LIB) += lib.o
9 obj-$(CONFIG_RTC_CLASS) += rtc-core.o
10 obj-$(CONFIG_RTC_MC146818_LIB) += rtc-mc146818-lib.o
11 rtc-core-y := class.o interface.o
13 rtc-core-$(CONFIG_RTC_NVMEM) += nvmem.o
14 rtc-core-$(CONFIG_RTC_INTF_DEV) += dev.o
15 rtc-core-$(CONFIG_RTC_INTF_PROC) += proc.o
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/ |
| D | ingenic,cgu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The CGU in an Ingenic SoC provides all the clocks generated on-chip. It
16 - Paul Cercueil <paul@crapouillou.net>
23 - ingenic,jz4740-cgu
24 - ingenic,jz4725b-cgu
25 - ingenic,jz4770-cgu
26 - ingenic,jz4780-cgu
27 - ingenic,x1000-cgu
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/ |
| D | ingenic,cgu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The CGU in an Ingenic SoC provides all the clocks generated on-chip. It
16 - Paul Cercueil <paul@crapouillou.net>
23 - ingenic,jz4740-cgu
24 - ingenic,jz4725b-cgu
25 - ingenic,jz4755-cgu
26 - ingenic,jz4760-cgu
27 - ingenic,jz4760b-cgu
[all …]
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| /kernel/linux/linux-6.6/Documentation/arch/mips/ |
| D | ingenic-tcu.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 The Timer/Counter Unit (TCU) in Ingenic JZ47xx SoCs is a multi-function
11 - JZ4725B, JZ4750, JZ4755 only have six TCU channels. The other SoCs all
14 - JZ4725B introduced a separate channel, called Operating System Timer
15 (OST). It is a 32-bit programmable timer. On JZ4760B and above, it is
16 64-bit.
18 - Each one of the TCU channels has its own clock, which can be reparented to three
19 different clocks (pclk, ext, rtc), gated, and reclocked, through their TCSR register.
21 - The watchdog and OST hardware blocks also feature a TCSR register with the same
23 - The TCU registers used to gate/ungate can also gate/ungate the watchdog and
[all …]
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| /kernel/linux/linux-5.10/Documentation/mips/ |
| D | ingenic-tcu.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 The Timer/Counter Unit (TCU) in Ingenic JZ47xx SoCs is a multi-function
11 - JZ4725B, JZ4750, JZ4755 only have six TCU channels. The other SoCs all
14 - JZ4725B introduced a separate channel, called Operating System Timer
15 (OST). It is a 32-bit programmable timer. On JZ4760B and above, it is
16 64-bit.
18 - Each one of the TCU channels has its own clock, which can be reparented to three
19 different clocks (pclk, ext, rtc), gated, and reclocked, through their TCSR register.
21 - The watchdog and OST hardware blocks also feature a TCSR register with the same
23 - The TCU registers used to gate/ungate can also gate/ungate the watchdog and
[all …]
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| /kernel/linux/linux-6.6/drivers/clk/ingenic/ |
| D | jz4740-cgu.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Ingenic JZ4740 SoC CGU driver
9 #include <linux/clk-provider.h>
14 #include <dt-bindings/clock/ingenic,jz4740-cgu.h>
51 0x0, 0x1, -1, 0x3,
67 [JZ4740_CLK_RTC] = { "rtc", CGU_CLK_EXT },
71 .parents = { JZ4740_CLK_EXT, -1, -1, -1 },
96 .parents = { JZ4740_CLK_PLL, -1, -1, -1 },
98 CGU_REG_CPCCR, 21, 1, 1, -1, -1, -1, 0,
110 .parents = { JZ4740_CLK_PLL, -1, -1, -1 },
[all …]
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| D | tcu.c | 1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
10 #include <linux/mfd/ingenic-tcu.h>
16 #include <dt-bindings/clock/ingenic,tcu.h>
22 #define pr_fmt(fmt) "ingenic-tcu-clk: " fmt
68 const struct ingenic_tcu_clk_info *info = tcu_clk->info; in ingenic_tcu_enable()
69 struct ingenic_tcu *tcu = tcu_clk->tcu; in ingenic_tcu_enable()
71 regmap_write(tcu->map, TCU_REG_TSCR, BIT(info->gate_bit)); in ingenic_tcu_enable()
79 const struct ingenic_tcu_clk_info *info = tcu_clk->info; in ingenic_tcu_disable()
80 struct ingenic_tcu *tcu = tcu_clk->tcu; in ingenic_tcu_disable()
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| /kernel/linux/linux-5.10/drivers/clk/ingenic/ |
| D | jz4740-cgu.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Ingenic JZ4740 SoC CGU driver
9 #include <linux/clk-provider.h>
14 #include <dt-bindings/clock/jz4740-cgu.h>
51 0x0, 0x1, -1, 0x3,
67 [JZ4740_CLK_RTC] = { "rtc", CGU_CLK_EXT },
71 .parents = { JZ4740_CLK_EXT, -1, -1, -1 },
96 .parents = { JZ4740_CLK_PLL, -1, -1, -1 },
98 CGU_REG_CPCCR, 21, 1, 1, -1, -1, -1,
105 .parents = { JZ4740_CLK_PLL, -1, -1, -1 },
[all …]
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| D | tcu.c | 1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
10 #include <linux/mfd/ingenic-tcu.h>
16 #include <dt-bindings/clock/ingenic,tcu.h>
22 #define pr_fmt(fmt) "ingenic-tcu-clk: " fmt
67 const struct ingenic_tcu_clk_info *info = tcu_clk->info; in ingenic_tcu_enable()
68 struct ingenic_tcu *tcu = tcu_clk->tcu; in ingenic_tcu_enable()
70 regmap_write(tcu->map, TCU_REG_TSCR, BIT(info->gate_bit)); in ingenic_tcu_enable()
78 const struct ingenic_tcu_clk_info *info = tcu_clk->info; in ingenic_tcu_disable()
79 struct ingenic_tcu *tcu = tcu_clk->tcu; in ingenic_tcu_disable()
[all …]
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| /kernel/linux/linux-6.6/Documentation/translations/zh_CN/arch/mips/ |
| D | ingenic-tcu.rst | 1 .. SPDX-License-Identifier: GPL-2.0
3 .. include:: ../../disclaimer-zh_CN.rst
5 :Original: Documentation/arch/mips/ingenic-tcu.rst
11 .. _cn_ingenic-tcu:
20 - JZ4725B, JZ4750, JZ4755 只有６个TCU通道。其它SoC都有８个通道。
22 - JZ4725B引入了一个独立的通道，称为操作系统计时器(OST)。这是一个32位可
25 - 每个TCU通道都有自己的时钟源，可以通过 TCSR 寄存器设置通道的父级时钟
26 源（pclk、ext、rtc）、开关以及分频。
28 - 看门狗和OST硬件模块在它们的寄存器空间中也有相同形式的TCSR寄存器。
29 - 用于关闭/开启的 TCU 寄存器也可以关闭/开启看门狗和 OST 时钟。
[all …]
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