Searched +full:k3 +full:- +full:am654 (Results 1 – 25 of 86) sorted by relevance
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/remoteproc/ |
| D | ti,pru-rproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/ti,pru-rproc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Suman Anna <s-anna@ti.com> 13 Each Programmable Real-Time Unit and Industrial Communication Subsystem 14 (PRU-ICSS or PRUSS) has two 32-bit load/store RISC CPU cores called 15 Programmable Real-Time Units (PRUs), each represented by a node. Each PRU 17 use the Data RAMs present within the PRU-ICSS for code execution. 19 The K3 SoCs containing ICSSG v1.0 (eg: AM65x SR1.0) also have two Auxiliary [all …]
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| D | ti,k3-r5f-rproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-r5f-rproc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: TI K3 R5F processor subsystems 10 - Suman Anna <s-anna@ti.com> 13 The TI K3 family of SoCs usually have one or more dual-core Arm Cortex R5F 20 AM64x SoCs do not support LockStep mode, but rather a new non-safety mode 21 called "Single-CPU" mode, where only Core0 is used, but with ability to use 27 Each Dual-Core R5F sub-system is represented as a single DTS node [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/ti/ |
| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 6 # Copyright (C) 2016-2021 Texas Instruments Incorporated - https://www.ti.com/ 12 k3-am625-sk-hdmi-audio-dtbs := k3-am625-sk.dtb k3-am62x-sk-hdmi-audio.dtbo 13 k3-am62-lp-sk-hdmi-audio-dtbs := k3-am62-lp-sk.dtb k3-am62x-sk-hdmi-audio.dtbo 14 dtb-$(CONFIG_ARCH_K3) += k3-am625-beagleplay.dtb 15 dtb-$(CONFIG_ARCH_K3) += k3-am625-phyboard-lyra-rdk.dtb 16 dtb-$(CONFIG_ARCH_K3) += k3-am625-sk.dtb 17 dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-dahlia.dtb 18 dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-dev.dtb 19 dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-yavia.dtb [all …]
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| D | k3-am65.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/soc/ti,sci_pm_domain.h> 13 #include "k3-pinctrl.h" 16 model = "Texas Instruments K3 AM654 SoC"; 17 compatible = "ti,am654"; 18 interrupt-parent = <&gic500>; [all …]
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| D | k3-am6528-iot2050-basic-pg2.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) Siemens AG, 2018-2021 9 * AM6528-based (dual-core) IOT2050 Basic variant, Product Generation 2 13 * https://new.siemens.com/global/en/products/automation/pc-based/iot-gateways/simatic-iot2050.html 16 /dts-v1/; 18 #include "k3-am6528-iot2050-basic-common.dtsi" 19 #include "k3-am65-iot2050-common-pg2.dtsi" 22 compatible = "siemens,iot2050-basic-pg2", "ti,am654";
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| D | k3-am6548-iot2050-advanced.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) Siemens AG, 2018-2021 9 * AM6548-based (quad-core) IOT2050 Advanced variant, Product Generation 1 10 * 2 GB RAM, 16 GB eMMC, USB-serial converter on connector X30 13 * https://new.siemens.com/global/en/products/automation/pc-based/iot-gateways/simatic-iot2050.html 16 /dts-v1/; 18 #include "k3-am6548-iot2050-advanced-common.dtsi" 19 #include "k3-am65-iot2050-common-pg1.dtsi" 22 compatible = "siemens,iot2050-advanced", "ti,am654";
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| D | k3-am6528-iot2050-basic.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) Siemens AG, 2018-2021 9 * AM6528-based (dual-core) IOT2050 Basic variant, Product Generation 1 13 * https://new.siemens.com/global/en/products/automation/pc-based/iot-gateways/simatic-iot2050.html 16 /dts-v1/; 18 #include "k3-am6528-iot2050-basic-common.dtsi" 19 #include "k3-am65-iot2050-common-pg1.dtsi" 22 compatible = "siemens,iot2050-basic", "ti,am654";
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/ti/ |
| D | k3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/arm/ti/k3.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Texas Instruments K3 Multicore SoC architecture device tree bindings 10 - Nishanth Menon <nm@ti.com> 13 Platforms based on Texas Instruments K3 Multicore SoC architecture 22 - description: K3 AM654 SoC 24 - enum: 25 - ti,am654-evm [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/hwlock/ |
| D | ti,omap-hwspinlock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/hwlock/ti,omap-hwspinlock.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: TI HwSpinlock for OMAP and K3 based SoCs 10 - Suman Anna <s-anna@ti.com> 15 - ti,omap4-hwspinlock # for OMAP44xx, OMAP54xx, AM33xx, AM43xx, DRA7xx SoCs 16 - ti,am654-hwspinlock # for K3 AM65x, J721E and J7200 SoCs 21 "#hwlock-cells": 24 The OMAP hwspinlock users will use a 0-indexed relative hwlock number as [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/ti/ |
| D | k3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/arm/ti/k3.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Texas Instruments K3 Multicore SoC architecture 10 - Nishanth Menon <nm@ti.com> 13 Platforms based on Texas Instruments K3 Multicore SoC architecture 22 - description: K3 AM62A7 SoC 24 - enum: 25 - ti,am62a7-sk [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/remoteproc/ |
| D | ti,k3-r5f-rproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-r5f-rproc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: TI K3 R5F processor subsystems 10 - Suman Anna <s-anna@ti.com> 13 The TI K3 family of SoCs usually have one or more dual-core Arm Cortex R5F 20 Each Dual-Core R5F sub-system is represented as a single DTS node 33 - ti,am654-r5fss 34 - ti,j721e-r5fss [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/soc/ti/ |
| D | k3-socinfo.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/ti/k3-socinfo.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Texas Instruments K3 Multicore SoC platforms chipid module 10 - Tero Kristo <t-kristo@ti.com> 11 - Nishanth Menon <nm@ti.com> 14 Texas Instruments (ARM64) K3 Multicore SoC platforms chipid module is 20 pattern: "^chipid@[0-9a-f]+$" 24 - const: ti,am654-chipid [all …]
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| D | k3-ringacc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/ 4 --- 5 $id: "http://devicetree.org/schemas/soc/ti/k3-ringacc.yaml#" 6 $schema: "http://devicetree.org/meta-schemas/core.yaml#" 8 title: Texas Instruments K3 NavigatorSS Ring Accelerator 11 - Santosh Shilimkar <ssantosh@kernel.org> 12 - Grygorii Strashko <grygorii.strashko@ti.com> 26 management of the packet queues. The K3 SoCs can have more than one RA instances 31 - const: ti,am654-navss-ringacc [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/hwinfo/ |
| D | ti,k3-socinfo.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/hwinfo/ti,k3-socinfo.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Texas Instruments K3 Multicore SoC platforms chipid module 10 - Tero Kristo <t-kristo@ti.com> 11 - Nishanth Menon <nm@ti.com> 14 Texas Instruments (ARM64) K3 Multicore SoC platforms chipid module is 20 pattern: "^chipid@[0-9a-f]+$" 24 - const: ti,am654-chipid [all …]
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| /kernel/linux/linux-6.6/drivers/dma/ti/ |
| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 2 obj-$(CONFIG_TI_CPPI41) += cppi41.o 3 obj-$(CONFIG_TI_EDMA) += edma.o 4 obj-$(CONFIG_DMA_OMAP) += omap-dma.o 5 obj-$(CONFIG_TI_K3_UDMA) += k3-udma.o 6 obj-$(CONFIG_TI_K3_UDMA_GLUE_LAYER) += k3-udma-glue.o 7 k3-psil-lib-objs := k3-psil.o \ 8 k3-psil-am654.o \ 9 k3-psil-j721e.o \ 10 k3-psil-j7200.o \ [all …]
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| /kernel/linux/linux-5.10/drivers/dma/ti/ |
| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 2 obj-$(CONFIG_TI_CPPI41) += cppi41.o 3 obj-$(CONFIG_TI_EDMA) += edma.o 4 obj-$(CONFIG_DMA_OMAP) += omap-dma.o 5 obj-$(CONFIG_TI_K3_UDMA) += k3-udma.o 6 obj-$(CONFIG_TI_K3_UDMA_GLUE_LAYER) += k3-udma-glue.o 7 obj-$(CONFIG_TI_K3_PSIL) += k3-psil.o \ 8 k3-psil-am654.o \ 9 k3-psil-j721e.o \ 10 k3-psil-j7200.o [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/soc/ti/ |
| D | k3-ringacc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/ 4 --- 5 $id: http://devicetree.org/schemas/soc/ti/k3-ringacc.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Texas Instruments K3 NavigatorSS Ring Accelerator 11 - Santosh Shilimkar <ssantosh@kernel.org> 12 - Grygorii Strashko <grygorii.strashko@ti.com> 26 management of the packet queues. The K3 SoCs can have more than one RA instances 29 - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml# [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/ti/ |
| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 6 # Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/ 9 dtb-$(CONFIG_ARCH_K3) += k3-am654-base-board.dtb 11 dtb-$(CONFIG_ARCH_K3) += k3-j721e-common-proc-board.dtb 13 dtb-$(CONFIG_ARCH_K3) += k3-j7200-common-proc-board.dtb
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| D | k3-am65.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/pinctrl/k3.h> 12 #include <dt-bindings/soc/ti,sci_pm_domain.h> 15 model = "Texas Instruments K3 AM654 SoC"; 16 compatible = "ti,am654"; 17 interrupt-parent = <&gic500>; [all …]
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| D | k3-am65-wakeup.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "ti,am654-sci"; 11 ti,host-id = <12>; 12 #address-cells = <1>; 13 #size-cells = <1>; 16 mbox-names = "rx", "tx"; 21 k3_pds: power-controller { 22 compatible = "ti,sci-pm-domain"; 23 #power-domain-cells = <2>; [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/ |
| D | ti,k3-am654-cpsw-nuss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/ti,k3-am654-cpsw-nuss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Grygorii Strashko <grygorii.strashko@ti.com> 11 - Sekhar Nori <nsekhar@ti.com> 16 CPSW2G NUSS features - the Reduced Gigabit Media Independent Interface (RGMII), 25 Peripheral Root Complex (UDMA-P) controller. 47 "#address-cells": true 48 "#size-cells": true [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/dma/ti/ |
| D | k3-udma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 5 --- 6 $id: http://devicetree.org/schemas/dma/ti/k3-udma.yaml# 7 $schema: http://devicetree.org/meta-schemas/core.yaml# 9 title: Texas Instruments K3 NAVSS Unified DMA 12 - Peter Ujfalusi <peter.ujfalusi@gmail.com> 15 The UDMA-P is intended to perform similar (but significantly upgraded) 16 functions as the packet-oriented DMA used on previous SoC devices. The UDMA-P 18 The UDMA-P architecture facilitates the segmentation and reassembly of SoC DMA 29 on the Rx PSI-L interface. [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/gpio/ |
| D | gpio-davinci.txt | 4 - compatible: should be "ti,dm6441-gpio": for Davinci da850 SoCs 5 "ti,keystone-gpio": for Keystone 2 66AK2H/K, 66AK2L, 7 "ti,k2g-gpio", "ti,keystone-gpio": for 66AK2G 8 "ti,am654-gpio", "ti,keystone-gpio": for TI K3 AM654 9 "ti,j721e-gpio", "ti,keystone-gpio": for J721E SoCs 11 - reg: Physical base address of the controller and the size of memory mapped 14 - gpio-controller : Marks the device node as a gpio controller. 16 - #gpio-cells : Should be two. 17 - first cell is the pin number 18 - second cell is used to specify optional parameters (unused) [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/hwlock/ |
| D | ti,omap-hwspinlock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/hwlock/ti,omap-hwspinlock.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: TI HwSpinlock for OMAP and K3 based SoCs 10 - Suman Anna <s-anna@ti.com> 15 - ti,omap4-hwspinlock # for OMAP44xx, OMAP54xx, AM33xx, AM43xx, DRA7xx SoCs 16 - ti,am64-hwspinlock # for K3 AM64x SoCs 17 - ti,am654-hwspinlock # for K3 AM65x, J721E and J7200 SoCs 22 "#hwlock-cells": [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mtd/ |
| D | ti,am654-hbmc.txt | 1 Bindings for HyperBus Memory Controller (HBMC) on TI's K3 family of SoCs 4 - compatible : "ti,am654-hbmc" for AM654 SoC 5 - reg : Two entries: 9 - ranges : Address translation from offset within CS to allocated MMIO 13 - mux-controls : phandle to the multiplexer that controls selection of 16 See Documentation/devicetree/bindings/mux/reg-mux.txt 17 for mmio-mux binding details 21 system-controller@47000000 { 22 compatible = "syscon", "simple-mfd"; 24 #address-cells = <2>; [all …]
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