Searched full:kilo (Results 1 – 25 of 71) sorted by relevance
123
253 "BriefDescription": "L1 cache true misses per kilo instruction for retired demand loads",259 "BriefDescription": "L2 cache true misses per kilo instruction for retired demand loads",265 …"BriefDescription": "L2 cache misses per kilo instruction for all request types (including specula…271 …"BriefDescription": "L2 cache hits per kilo instruction for all request types (including speculati…277 "BriefDescription": "L3 cache true misses per kilo instruction for retired demand loads",283 …"BriefDescription": "Rate of silent evictions from the L2 cache per Kilo instruction where the evi…289 "BriefDescription": "Rate of non silent evictions from the L2 cache per Kilo instruction",
259 "BriefDescription": "L1 cache true misses per kilo instruction for retired demand loads",265 "BriefDescription": "L2 cache true misses per kilo instruction for retired demand loads",271 …"BriefDescription": "L2 cache misses per kilo instruction for all request types (including specula…277 …"BriefDescription": "L2 cache hits per kilo instruction for all request types (including speculati…283 "BriefDescription": "L3 cache true misses per kilo instruction for retired demand loads",289 …"BriefDescription": "Rate of silent evictions from the L2 cache per Kilo instruction where the evi…295 "BriefDescription": "Rate of non silent evictions from the L2 cache per Kilo instruction",
221 "BriefDescription": "L1 cache true misses per kilo instruction for retired demand loads",227 "BriefDescription": "L2 cache true misses per kilo instruction for retired demand loads",233 …"BriefDescription": "L2 cache misses per kilo instruction for all request types (including specula…239 …"BriefDescription": "L2 cache hits per kilo instruction for all request types (including speculati…245 "BriefDescription": "L3 cache true misses per kilo instruction for retired demand loads",
233 "BriefDescription": "L1 cache true misses per kilo instruction for retired demand loads",239 "BriefDescription": "L2 cache true misses per kilo instruction for retired demand loads",245 …"BriefDescription": "L2 cache misses per kilo instruction for all request types (including specula…251 …"BriefDescription": "L2 cache hits per kilo instruction for all request types (including speculati…257 "BriefDescription": "L3 cache true misses per kilo instruction for retired demand loads",
245 "BriefDescription": "L1 cache true misses per kilo instruction for retired demand loads",251 "BriefDescription": "L2 cache true misses per kilo instruction for retired demand loads",257 …"BriefDescription": "L2 cache misses per kilo instruction for all request types (including specula…263 …"BriefDescription": "L2 cache hits per kilo instruction for all request types (including speculati…269 "BriefDescription": "L3 cache true misses per kilo instruction for retired demand loads",
252 "BriefDescription": "L1 cache true misses per kilo instruction for retired demand loads",258 "BriefDescription": "L2 cache true misses per kilo instruction for retired demand loads",264 …"BriefDescription": "L2 cache misses per kilo instruction for all request types (including specula…270 …"BriefDescription": "L2 cache hits per kilo instruction for all request types (including speculati…276 "BriefDescription": "L3 cache true misses per kilo instruction for retired demand loads",
83 beacon_period integer beacon period in Kilo-microseconds,104 hop_dwell integer hop dwell time in Kilo-microseconds
85 if (bt->bitrate > 800 * KILO /* BPS */) in can_calc_bittiming()87 else if (bt->bitrate > 500 * KILO /* BPS */) in can_calc_bittiming()
30 values R1 and R2 of the feedback voltage divider in kilo ohms.
590 "BriefDescription": "L2 cache true code cacheline misses per kilo instruction",596 "BriefDescription": "L2 cache speculative code cacheline misses per kilo instruction",731 …"BriefDescription": "Fill Buffer (FB) hits per kilo instructions for retired demand loads (L1D mis…737 "BriefDescription": "L1 cache true misses per kilo instruction for retired demand loads",743 …"BriefDescription": "L1 cache true misses per kilo instruction for all demand loads (including spe…749 …"BriefDescription": "L2 cache hits per kilo instruction for all request types (including speculati…755 …"BriefDescription": "L2 cache hits per kilo instruction for all demand loads (including speculati…761 "BriefDescription": "L2 cache true misses per kilo instruction for retired demand loads",767 …"BriefDescription": "L2 cache ([RKL+] true) misses per kilo instruction for all request types (inc…773 …"BriefDescription": "L2 cache ([RKL+] true) misses per kilo instruction for all demand loads (inc…[all …]
12 #define KILO 1000UL macro
839 "BriefDescription": "L2 cache true code cacheline misses per kilo instruction",845 "BriefDescription": "L2 cache speculative code cacheline misses per kilo instruction",976 "BriefDescription": "Rate of non silent evictions from the L2 cache per Kilo instruction",982 …"BriefDescription": "Rate of silent evictions from the L2 cache per Kilo instruction where the evi…1000 …"BriefDescription": "Fill Buffer (FB) hits per kilo instructions for retired demand loads (L1D mis…1006 "BriefDescription": "L1 cache true misses per kilo instruction for retired demand loads",1012 …"BriefDescription": "L1 cache true misses per kilo instruction for all demand loads (including spe…1018 …"BriefDescription": "L2 cache hits per kilo instruction for all request types (including speculati…1024 …"BriefDescription": "L2 cache hits per kilo instruction for all demand loads (including speculati…1030 "BriefDescription": "L2 cache true misses per kilo instruction for retired demand loads",[all …]
821 "BriefDescription": "L2 cache true code cacheline misses per kilo instruction",827 "BriefDescription": "L2 cache speculative code cacheline misses per kilo instruction",958 "BriefDescription": "Rate of non silent evictions from the L2 cache per Kilo instruction",964 …"BriefDescription": "Rate of silent evictions from the L2 cache per Kilo instruction where the evi…982 …"BriefDescription": "Fill Buffer (FB) hits per kilo instructions for retired demand loads (L1D mis…988 "BriefDescription": "L1 cache true misses per kilo instruction for retired demand loads",994 …"BriefDescription": "L1 cache true misses per kilo instruction for all demand loads (including spe…1000 …"BriefDescription": "L2 cache hits per kilo instruction for all request types (including speculati…1006 …"BriefDescription": "L2 cache hits per kilo instruction for all demand loads (including speculati…1012 "BriefDescription": "L2 cache true misses per kilo instruction for retired demand loads",[all …]
636 "BriefDescription": "L2 cache true code cacheline misses per kilo instruction",642 "BriefDescription": "L2 cache speculative code cacheline misses per kilo instruction",789 …"BriefDescription": "Fill Buffer (FB) hits per kilo instructions for retired demand loads (L1D mis…795 "BriefDescription": "L1 cache true misses per kilo instruction for retired demand loads",801 …"BriefDescription": "L1 cache true misses per kilo instruction for all demand loads (including spe…807 …"BriefDescription": "L2 cache hits per kilo instruction for all request types (including speculati…813 …"BriefDescription": "L2 cache hits per kilo instruction for all demand loads (including speculati…819 "BriefDescription": "L2 cache true misses per kilo instruction for retired demand loads",825 …"BriefDescription": "L2 cache ([RKL+] true) misses per kilo instruction for all request types (inc…831 …"BriefDescription": "L2 cache ([RKL+] true) misses per kilo instruction for all demand loads (inc…[all …]
630 "BriefDescription": "L2 cache true code cacheline misses per kilo instruction",636 "BriefDescription": "L2 cache speculative code cacheline misses per kilo instruction",783 …"BriefDescription": "Fill Buffer (FB) hits per kilo instructions for retired demand loads (L1D mis…789 "BriefDescription": "L1 cache true misses per kilo instruction for retired demand loads",795 …"BriefDescription": "L1 cache true misses per kilo instruction for all demand loads (including spe…801 …"BriefDescription": "L2 cache hits per kilo instruction for all request types (including speculati…807 …"BriefDescription": "L2 cache hits per kilo instruction for all demand loads (including speculati…813 "BriefDescription": "L2 cache true misses per kilo instruction for retired demand loads",819 …"BriefDescription": "L2 cache ([RKL+] true) misses per kilo instruction for all request types (inc…825 …"BriefDescription": "L2 cache ([RKL+] true) misses per kilo instruction for all demand loads (inc…[all …]
847 "BriefDescription": "L2 cache true code cacheline misses per kilo instruction",853 "BriefDescription": "L2 cache speculative code cacheline misses per kilo instruction",982 "BriefDescription": "Rate of non silent evictions from the L2 cache per Kilo instruction",988 …"BriefDescription": "Rate of silent evictions from the L2 cache per Kilo instruction where the evi…1006 …"BriefDescription": "Fill Buffer (FB) hits per kilo instructions for retired demand loads (L1D mis…1012 "BriefDescription": "L1 cache true misses per kilo instruction for retired demand loads",1018 …"BriefDescription": "L1 cache true misses per kilo instruction for all demand loads (including spe…1024 …"BriefDescription": "L2 cache hits per kilo instruction for all demand loads (including speculati…1030 "BriefDescription": "L2 cache true misses per kilo instruction for retired demand loads",1036 …"BriefDescription": "L2 cache ([RKL+] true) misses per kilo instruction for all request types (inc…[all …]
888 "BriefDescription": "L2 cache true code cacheline misses per kilo instruction",894 "BriefDescription": "L2 cache speculative code cacheline misses per kilo instruction",1039 "BriefDescription": "Rate of non silent evictions from the L2 cache per Kilo instruction",1045 …"BriefDescription": "Rate of silent evictions from the L2 cache per Kilo instruction where the evi…1063 …"BriefDescription": "Fill Buffer (FB) hits per kilo instructions for retired demand loads (L1D mis…1069 "BriefDescription": "L1 cache true misses per kilo instruction for retired demand loads",1075 …"BriefDescription": "L1 cache true misses per kilo instruction for all demand loads (including spe…1081 …"BriefDescription": "L2 cache hits per kilo instruction for all request types (including speculati…1087 …"BriefDescription": "L2 cache hits per kilo instruction for all demand loads (including speculati…1093 "BriefDescription": "L2 cache true misses per kilo instruction for retired demand loads",[all …]
636 "BriefDescription": "L2 cache true code cacheline misses per kilo instruction",642 "BriefDescription": "L2 cache speculative code cacheline misses per kilo instruction",789 …"BriefDescription": "Fill Buffer (FB) hits per kilo instructions for retired demand loads (L1D mis…795 "BriefDescription": "L1 cache true misses per kilo instruction for retired demand loads",801 …"BriefDescription": "L1 cache true misses per kilo instruction for all demand loads (including spe…807 …"BriefDescription": "L2 cache hits per kilo instruction for all demand loads (including speculati…813 "BriefDescription": "L2 cache true misses per kilo instruction for retired demand loads",819 …"BriefDescription": "L2 cache ([RKL+] true) misses per kilo instruction for all request types (inc…825 …"BriefDescription": "L2 cache ([RKL+] true) misses per kilo instruction for all demand loads (inc…831 "BriefDescription": "L3 cache true misses per kilo instruction for retired demand loads",[all …]
237 "BriefDescription": "The rate of L3 D-Cache misses per kilo instructions",251 "BriefDescription": "The rate of branches retired per kilo instructions",