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Searched +full:kpss +full:- +full:gcc +full:- +full:mdm9615 (Results 1 – 7 of 7) sorted by relevance

/kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/
Dqcom,kpss-gcc.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,kpss-gcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Krait Processor Sub-system (KPSS) Global Clock Controller (GCC)
10 - Christian Marangi <ansuelsmth@gmail.com>
13 Krait Processor Sub-system (KPSS) Global Clock Controller (GCC). Used
15 to the kpss-gcc registers.
20 - enum:
21 - qcom,kpss-gcc-ipq8064
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/qcom/
Dqcom-mdm9615.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 * Device Tree Source for Qualcomm MDM9615 SoC
9 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/clock/qcom,gcc-mdm9615.h>
13 #include <dt-bindings/clock/qcom,lcc-msm8960.h>
14 #include <dt-bindings/reset/qcom,gcc-mdm9615.h>
15 #include <dt-bindings/mfd/qcom-rpm.h>
16 #include <dt-bindings/soc/qcom,gsbi.h>
19 #address-cells = <1>;
[all …]
/kernel/linux/linux-5.10/drivers/clk/qcom/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_COMMON_CLK_QCOM) += clk-qcom.o
4 clk-qcom-y += common.o
5 clk-qcom-y += clk-regmap.o
6 clk-qcom-y += clk-alpha-pll.o
7 clk-qcom-y += clk-pll.o
8 clk-qcom-y += clk-rcg.o
9 clk-qcom-y += clk-rcg2.o
10 clk-qcom-y += clk-branch.o
11 clk-qcom-y += clk-regmap-divider.o
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
198 tristate "MDM9615 Global Clock Controller"
200 Support for the global clock controller on mdm9615 devices.
205 tristate "MDM9615 LPASS Clock Controller"
208 Support for the LPASS clock controller on mdm9615 devices.
485 tristate "High-Frequency PLL (HFPLL) Clock Controller"
487 Support for the high-frequency PLLs present on Qualcomm devices.
492 tristate "KPSS Clock Controller"
494 Support for the Krait ACC and GCC clock controllers. Say Y
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dqcom-mdm9615.dtsi2 * Device Tree Source for Qualcomm MDM9615 SoC
7 * This file is dual-licensed: you can use it either under the terms
46 /dts-v1/;
48 #include <dt-bindings/interrupt-controller/arm-gic.h>
49 #include <dt-bindings/clock/qcom,gcc-mdm9615.h>
50 #include <dt-bindings/reset/qcom,gcc-mdm9615.h>
51 #include <dt-bindings/mfd/qcom-rpm.h>
52 #include <dt-bindings/soc/qcom,gsbi.h>
55 #address-cells = <1>;
56 #size-cells = <1>;
[all …]
/kernel/linux/linux-6.6/drivers/clk/qcom/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_COMMON_CLK_QCOM) += clk-qcom.o
4 clk-qcom-y += common.o
5 clk-qcom-y += clk-regmap.o
6 clk-qcom-y += clk-alpha-pll.o
7 clk-qcom-y += clk-pll.o
8 clk-qcom-y += clk-rcg.o
9 clk-qcom-y += clk-rcg2.o
10 clk-qcom-y += clk-branch.o
11 clk-qcom-y += clk-regmap-divider.o
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
276 tristate "MDM9615 Global Clock Controller"
279 Support for the global clock controller on mdm9615 devices.
1066 tristate "High-Frequency PLL (HFPLL) Clock Controller"
1068 Support for the high-frequency PLLs present on Qualcomm devices.
1073 tristate "KPSS Clock Controller"
1075 Support for the Krait ACC and GCC clock controllers. Say Y