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/kernel/linux/linux-5.10/arch/mips/boot/dts/loongson/
Dloongson64v_4core_virtio.dts26 liointc: interrupt-controller@3ff01400 { label
27 compatible = "loongson,liointc-1.0";
48 interrupt-parent = <&liointc>;
65 interrupt-parent = <&liointc>;
82 0x0000 0x0 0x0 0x1 &liointc 0x2 IRQ_TYPE_LEVEL_HIGH
83 0x0800 0x0 0x0 0x1 &liointc 0x3 IRQ_TYPE_LEVEL_HIGH
84 0x1000 0x0 0x0 0x1 &liointc 0x4 IRQ_TYPE_LEVEL_HIGH
85 0x1800 0x0 0x0 0x1 &liointc 0x5 IRQ_TYPE_LEVEL_HIGH
Dloongson64g-package.dtsi24 liointc: interrupt-controller@3ff01400 { label
25 compatible = "loongson,liointc-1.0";
46 interrupt-parent = <&liointc>;
57 interrupt-parent = <&liointc>;
Dloongson64c-package.dtsi27 liointc: interrupt-controller@3ff01400 { label
28 compatible = "loongson,liointc-1.0";
49 interrupt-parent = <&liointc>;
60 interrupt-parent = <&liointc>;
Dloongson64c_4core_rs780e.dts19 interrupt-parent = <&liointc>;
Dloongson64c_8core_rs780e.dts19 interrupt-parent = <&liointc>;
Dloongson64c_4core_ls7a.dts19 interrupt-parent = <&liointc>;
Dloongson64g_4core_ls7a.dts19 interrupt-parent = <&liointc>;
/kernel/linux/linux-6.6/arch/mips/boot/dts/loongson/
Dloongson64v_4core_virtio.dts26 liointc: interrupt-controller@3ff01400 { label
27 compatible = "loongson,liointc-1.0";
48 interrupt-parent = <&liointc>;
65 interrupt-parent = <&liointc>;
82 0x0000 0x0 0x0 0x1 &liointc 0x2 IRQ_TYPE_LEVEL_HIGH
83 0x0800 0x0 0x0 0x1 &liointc 0x3 IRQ_TYPE_LEVEL_HIGH
84 0x1000 0x0 0x0 0x1 &liointc 0x4 IRQ_TYPE_LEVEL_HIGH
85 0x1800 0x0 0x0 0x1 &liointc 0x5 IRQ_TYPE_LEVEL_HIGH
Dloongson64g-package.dtsi24 liointc: interrupt-controller@3ff01400 { label
25 compatible = "loongson,liointc-1.0";
46 interrupt-parent = <&liointc>;
57 interrupt-parent = <&liointc>;
Dloongson64c-package.dtsi27 liointc: interrupt-controller@3ff01400 { label
28 compatible = "loongson,liointc-1.0";
49 interrupt-parent = <&liointc>;
60 interrupt-parent = <&liointc>;
Dloongson64c_8core_rs780e.dts19 interrupt-parent = <&liointc>;
Dloongson64c_4core_rs780e.dts19 interrupt-parent = <&liointc>;
Dloongson64c_4core_ls7a.dts19 interrupt-parent = <&liointc>;
Dloongson64g_4core_ls7a.dts19 interrupt-parent = <&liointc>;
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/interrupt-controller/
Dloongson,liointc.yaml4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,liointc.yaml#
23 - loongson,liointc-1.0
24 - loongson,liointc-1.0a
25 - loongson,liointc-2.0
62 If a CPU interrupt line didn't connect with liointc, then keep its
84 - loongson,liointc-2.0
102 compatible = "loongson,liointc-1.0";
Dloongson,htvec.yaml51 interrupt-parent = <&liointc>;
Dloongson,htpic.yaml55 interrupt-parent = <&liointc>;
/kernel/linux/linux-6.6/Documentation/arch/loongarch/
Dirq-chip-model.rst9 Interrupt Controller), LIOINTC (Legacy I/O Interrupt Controller), EIOINTC (Extended
14 CPUINTC is a per-core controller (in CPU), LIOINTC/EIOINTC/HTVECINTC are per-package
23 to CPUINTC directly, CPU UARTS interrupts go to LIOINTC, while all other devices
25 to LIOINTC, and then CPUINTC::
33 | LIOINTC | <-- | UARTs |
60 to CPUINTC directly, CPU UARTS interrupts go to LIOINTC, while all other devices
70 | EIOINTC | | LIOINTC | <-- | UARTs |
97 LIOINTC::
151 - LIOINTC is "Legacy I/OInterrupts" described in Section 11.1 of
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/
Dloongson,liointc.yaml4 $id: "http://devicetree.org/schemas/interrupt-controller/loongson,liointc.yaml#"
23 - const: loongson,liointc-1.0
24 - const: loongson,liointc-1.0a
55 If a CPU interrupt line didn't connect with liointc, then keep its
75 compatible = "loongson,liointc-1.0";
Dloongson,htvec.yaml51 interrupt-parent = <&liointc>;
Dloongson,htpic.yaml55 interrupt-parent = <&liointc>;
/kernel/linux/linux-6.6/Documentation/translations/zh_CN/arch/loongarch/
Dirq-chip-model.rst13 中的中断控制器（即IRQ芯片）包括CPUINTC（CPU Core Interrupt Controller）、LIOINTC（
18 CPUINTC是一种CPU内部的每个核本地的中断控制器，LIOINTC/EIOINTC/HTVECINTC是CPU内部的
36 | LIOINTC | <-- | UARTs |
72 | EIOINTC | | LIOINTC | <-- | UARTs |
99 LIOINTC::
153 - LIOINTC：即《龙芯3A5000处理器使用手册》第11.1节所描述的“传统I/O中断”；
/kernel/linux/linux-6.6/drivers/irqchip/
Dirq-loongson-liointc.c248 pr_err("loongson-liointc: cannot add IRQ domain\n"); in liointc_init()
253 (node ? node->full_name : "LIOINTC"), in liointc_init()
256 pr_err("loongson-liointc: unable to register IRQ domain\n"); in liointc_init()
334 if (!of_device_is_compatible(node, "loongson,liointc-2.0")) { in liointc_of_init()
359 pr_err("loongson-liointc: No parent_int_map\n"); in liointc_of_init()
371 IRQCHIP_DECLARE(loongson_liointc_1_0, "loongson,liointc-1.0", liointc_of_init);
372 IRQCHIP_DECLARE(loongson_liointc_1_0a, "loongson,liointc-1.0a", liointc_of_init);
373 IRQCHIP_DECLARE(loongson_liointc_2_0, "loongson,liointc-2.0", liointc_of_init);
/kernel/linux/linux-5.10/drivers/irqchip/
Dirq-loongson-liointc.c188 pr_err("loongson-liointc: cannot add IRQ domain\n"); in liointc_init()
193 (node ? node->full_name : "LIOINTC"), in liointc_init()
196 pr_err("loongson-liointc: unable to register IRQ domain\n"); in liointc_init()
272 if (!of_device_is_compatible(node, "loongson,liointc-2.0")) { in liointc_of_init()
297 pr_err("loongson-liointc: No parent_int_map\n"); in liointc_of_init()
309 IRQCHIP_DECLARE(loongson_liointc_1_0, "loongson,liointc-1.0", liointc_of_init);
310 IRQCHIP_DECLARE(loongson_liointc_1_0a, "loongson,liointc-1.0a", liointc_of_init);
/kernel/linux/linux-5.10/arch/loongarch/kernel/
Dacpi.c175 struct acpi_madt_lio_pic *liointc = NULL; in acpi_parse_liointc() local
177 liointc = (struct acpi_madt_lio_pic *)header; in acpi_parse_liointc()
179 if (BAD_MADT_ENTRY(liointc, end)) in acpi_parse_liointc()
182 acpi_liointc = liointc; in acpi_parse_liointc()
286 /* Parse MADT LIOINTC entries */ in acpi_process_madt()
290 pr_err(PREFIX "Invalid BIOS MADT (LIOINTC entries), ACPI disabled\n"); in acpi_process_madt()

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