| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/include/llvm/IR/ |
| D | IntrinsicsAMDGPU.h | 1 /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ 7 \*===----------------------------------------------------------------------===*/ 12 namespace llvm { 16 amdgcn_alignbit = 821, // llvm.amdgcn.alignbit 17 amdgcn_alignbyte, // llvm.amdgcn.alignbyte 18 amdgcn_atomic_dec, // llvm.amdgcn.atomic.dec 19 amdgcn_atomic_inc, // llvm.amdgcn.atomic.inc 20 amdgcn_buffer_atomic_add, // llvm.amdgcn.buffer.atomic.add 21 amdgcn_buffer_atomic_and, // llvm.amdgcn.buffer.atomic.and 22 amdgcn_buffer_atomic_cmpswap, // llvm.amdgcn.buffer.atomic.cmpswap [all …]
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| D | IntrinsicsNVPTX.h | 1 /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ 7 \*===----------------------------------------------------------------------===*/ 12 namespace llvm { 16 nvvm_add_rm_d = 4302, // llvm.nvvm.add.rm.d 17 nvvm_add_rm_f, // llvm.nvvm.add.rm.f 18 nvvm_add_rm_ftz_f, // llvm.nvvm.add.rm.ftz.f 19 nvvm_add_rn_d, // llvm.nvvm.add.rn.d 20 nvvm_add_rn_f, // llvm.nvvm.add.rn.f 21 nvvm_add_rn_ftz_f, // llvm.nvvm.add.rn.ftz.f 22 nvvm_add_rp_d, // llvm.nvvm.add.rp.d [all …]
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| D | IntrinsicsX86.h | 1 /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ 7 \*===----------------------------------------------------------------------===*/ 12 namespace llvm { 16 x86_3dnow_pavgusb = 6322, // llvm.x86.3dnow.pavgusb 17 x86_3dnow_pf2id, // llvm.x86.3dnow.pf2id 18 x86_3dnow_pfacc, // llvm.x86.3dnow.pfacc 19 x86_3dnow_pfadd, // llvm.x86.3dnow.pfadd 20 x86_3dnow_pfcmpeq, // llvm.x86.3dnow.pfcmpeq 21 x86_3dnow_pfcmpge, // llvm.x86.3dnow.pfcmpge 22 x86_3dnow_pfcmpgt, // llvm.x86.3dnow.pfcmpgt [all …]
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| D | IntrinsicImpl.inc | 1 /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ 7 \*===----------------------------------------------------------------------===*/ 12 llvm::StringLiteral Name; 17 {llvm::StringLiteral(""), 0, 267}, 18 {llvm::StringLiteral("aarch64"), 267, 553}, 19 {llvm::StringLiteral("amdgcn"), 820, 677}, 20 {llvm::StringLiteral("arm"), 1497, 366}, 21 {llvm::StringLiteral("bpf"), 1863, 5}, 22 {llvm::StringLiteral("hexagon"), 1868, 1766}, 23 {llvm::StringLiteral("mips"), 3634, 667}, [all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/ |
| D | IntrinsicsNVVM.td | 1 //===- IntrinsicsNVVM.td - Defines NVVM intrinsics ---------*- tablegen -*-===// 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 9 // This file defines all of the NVVM-specific intrinsics for use with NVPTX. 11 //===----------------------------------------------------------------------===// 13 // The following intrinsics were once defined here, but are now auto-upgraded 14 // to target-generic LLVM intrinsics. 16 // * llvm.nvvm.brev32 --> llvm.bitreverse.i32 [all …]
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| /third_party/rust/rust/compiler/rustc_codegen_gcc/src/intrinsic/ |
| D | llvm.rs | 8 … [RValue<'gcc>]>, func_name: &str, original_function_name: Option<&String>) -> Cow<'b, [RValue<'gc… in adjust_intrinsic_arguments() 9 // Some LLVM intrinsics do not map 1-to-1 to GCC intrinsics, so we add the missing in adjust_intrinsic_arguments() 13 // NOTE: the following intrinsics have a different number of parameters in LLVM and GCC. in adjust_intrinsic_arguments() 38 let arg4_type = gcc_func.get_param_type(3); in adjust_intrinsic_arguments() 39 let minus_one = builder.context.new_rvalue_from_int(arg4_type, -1); in adjust_intrinsic_arguments() 74 let arg4_type = gcc_func.get_param_type(3); in adjust_intrinsic_arguments() 75 let minus_one = builder.context.new_rvalue_from_int(arg4_type, -1); in adjust_intrinsic_arguments() 81 let arg4_type = gcc_func.get_param_type(3); in adjust_intrinsic_arguments() 88 let minus_one = builder.context.new_rvalue_from_int(arg5_type, -1); in adjust_intrinsic_arguments() 104 let minus_one = builder.context.new_rvalue_from_int(arg3_type, -1); in adjust_intrinsic_arguments() [all …]
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| /third_party/rust/rust/tests/codegen/intrinsics/ |
| D | transmute-niched.rs | 2 // [OPT] compile-flags: -C opt-level=3 -C no-prepopulate-passes 3 // [DBG] compile-flags: -C opt-level=0 -C no-prepopulate-passes 4 // only-64bit (so I don't need to worry about usize) 5 // min-llvm-version: 15.0 # this test assumes `ptr`s 19 // CHECK-LABEL: @check_to_enum( 21 pub unsafe fn check_to_enum(x: i8) -> SmallEnum { in check_to_enum() 23 // OPT: call void @llvm.assume(i1 %0) in check_to_enum() 25 // OPT: call void @llvm.assume(i1 %1) in check_to_enum() 26 // DBG-NOT: icmp in check_to_enum() 27 // DBG-NOT: assume in check_to_enum() [all …]
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| D | prefetch.rs | 1 // compile-flags: -C no-prepopulate-passes 12 // CHECK: call void @llvm.prefetch{{.*}}({{.*}}, i32 0, i32 0, i32 1) in check_prefetch_read_data() 14 // CHECK: call void @llvm.prefetch{{.*}}({{.*}}, i32 0, i32 1, i32 1) in check_prefetch_read_data() 16 // CHECK: call void @llvm.prefetch{{.*}}({{.*}}, i32 0, i32 2, i32 1) in check_prefetch_read_data() 18 // CHECK: call void @llvm.prefetch{{.*}}({{.*}}, i32 0, i32 3, i32 1) in check_prefetch_read_data() 19 prefetch_read_data(data.as_ptr(), 3); in check_prefetch_read_data() 26 // CHECK: call void @llvm.prefetch{{.*}}({{.*}}, i32 1, i32 0, i32 1) in check_prefetch_write_data() 28 // CHECK: call void @llvm.prefetch{{.*}}({{.*}}, i32 1, i32 1, i32 1) in check_prefetch_write_data() 30 // CHECK: call void @llvm.prefetch{{.*}}({{.*}}, i32 1, i32 2, i32 1) in check_prefetch_write_data() 32 // CHECK: call void @llvm.prefetch{{.*}}({{.*}}, i32 1, i32 3, i32 1) in check_prefetch_write_data() [all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Utils/ |
| D | AArch64BaseInfo.cpp | 1 //===-- AArch64BaseInfo.cpp - AArch64 Base encoding information------------===// 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 11 //===----------------------------------------------------------------------===// 13 #include "llvm/ADT/ArrayRef.h" 14 #include "llvm/ADT/SmallVector.h" 15 #include "llvm/ADT/StringExtras.h" 16 #include "llvm/Support/Regex.h" [all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonVectorPrint.cpp | 1 //===- HexagonVectorPrint.cpp - Generate vector printing instructions -----===// 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 13 //===----------------------------------------------------------------------===// 17 #include "llvm/ADT/StringRef.h" 18 #include "llvm/CodeGen/MachineBasicBlock.h" 19 #include "llvm/CodeGen/MachineFunction.h" 20 #include "llvm/CodeGen/MachineFunctionPass.h" [all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Support/ |
| D | NativeFormatting.cpp | 1 //===- NativeFormatting.cpp - Low level formatting helpers -------*- C++-*-===// 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 9 #include "llvm/Support/NativeFormatting.h" 11 #include "llvm/ADT/ArrayRef.h" 12 #include "llvm/ADT/SmallString.h" 13 #include "llvm/ADT/StringExtras.h" 14 #include "llvm/Support/Format.h" [all …]
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| D | Process.cpp | 1 //===-- Process.cpp - Implement OS Process Concept --------------*- C++ -*-===// 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 11 //===----------------------------------------------------------------------===// 13 #include "llvm/Support/Process.h" 14 #include "llvm/ADT/STLExtras.h" 15 #include "llvm/ADT/StringExtras.h" 16 #include "llvm/Config/config.h" [all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/ |
| D | Intrinsics.gen | 1 /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ 7 \*===----------------------------------------------------------------------===*/ 19 addressofreturnaddress, // llvm.addressofreturnaddress 20 adjust_trampoline, // llvm.adjust.trampoline 21 annotation, // llvm.annotation 22 assume, // llvm.assume 23 bitreverse, // llvm.bitreverse 24 bswap, // llvm.bswap 25 canonicalize, // llvm.canonicalize 26 ceil, // llvm.ceil [all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/ |
| D | Intrinsics.gen | 1 /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ 7 \*===----------------------------------------------------------------------===*/ 19 addressofreturnaddress, // llvm.addressofreturnaddress 20 adjust_trampoline, // llvm.adjust.trampoline 21 annotation, // llvm.annotation 22 assume, // llvm.assume 23 bitreverse, // llvm.bitreverse 24 bswap, // llvm.bswap 25 canonicalize, // llvm.canonicalize 26 ceil, // llvm.ceil [all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/ |
| D | Intrinsics.gen | 1 /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ 7 \*===----------------------------------------------------------------------===*/ 19 addressofreturnaddress, // llvm.addressofreturnaddress 20 adjust_trampoline, // llvm.adjust.trampoline 21 annotation, // llvm.annotation 22 assume, // llvm.assume 23 bitreverse, // llvm.bitreverse 24 bswap, // llvm.bswap 25 canonicalize, // llvm.canonicalize 26 ceil, // llvm.ceil [all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/build/Fuchsia/include/llvm/IR/ |
| D | Intrinsics.gen | 1 /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ 7 \*===----------------------------------------------------------------------===*/ 19 addressofreturnaddress, // llvm.addressofreturnaddress 20 adjust_trampoline, // llvm.adjust.trampoline 21 annotation, // llvm.annotation 22 assume, // llvm.assume 23 bitreverse, // llvm.bitreverse 24 bswap, // llvm.bswap 25 canonicalize, // llvm.canonicalize 26 ceil, // llvm.ceil [all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/ |
| D | Intrinsics.gen | 1 /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ 7 \*===----------------------------------------------------------------------===*/ 19 addressofreturnaddress, // llvm.addressofreturnaddress 20 adjust_trampoline, // llvm.adjust.trampoline 21 annotation, // llvm.annotation 22 assume, // llvm.assume 23 bitreverse, // llvm.bitreverse 24 bswap, // llvm.bswap 25 canonicalize, // llvm.canonicalize 26 ceil, // llvm.ceil [all …]
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| /third_party/rust/rust/tests/run-make/emit/ |
| D | Makefile | 1 # ignore-cross-compile 5 $(RUSTC) -Copt-level=0 --emit=llvm-bc,llvm-ir,asm,obj,link test-24876.rs 6 $(RUSTC) -Copt-level=1 --emit=llvm-bc,llvm-ir,asm,obj,link test-24876.rs 7 $(RUSTC) -Copt-level=2 --emit=llvm-bc,llvm-ir,asm,obj,link test-24876.rs 8 $(RUSTC) -Copt-level=3 --emit=llvm-bc,llvm-ir,asm,obj,link test-24876.rs 9 $(RUSTC) -Copt-level=s --emit=llvm-bc,llvm-ir,asm,obj,link test-24876.rs 10 $(RUSTC) -Copt-level=z --emit=llvm-bc,llvm-ir,asm,obj,link test-24876.rs 11 $(RUSTC) -Copt-level=0 --emit=llvm-bc,llvm-ir,asm,obj,link test-26235.rs 12 $(call RUN,test-26235) || exit 1 13 $(RUSTC) -Copt-level=1 --emit=llvm-bc,llvm-ir,asm,obj,link test-26235.rs [all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/lib/Support/ |
| D | NativeFormatting.cpp | 1 //===- NativeFormatting.cpp - Low level formatting helpers -------*- C++-*-===// 3 // The LLVM Compiler Infrastructure 8 //===----------------------------------------------------------------------===// 10 #include "llvm/Support/NativeFormatting.h" 12 #include "llvm/ADT/ArrayRef.h" 13 #include "llvm/ADT/SmallString.h" 14 #include "llvm/ADT/StringExtras.h" 15 #include "llvm/Support/Format.h" 19 using namespace llvm; 27 *--CurPtr = '0' + char(Value % 10); in format_to_buffer() [all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/TextAPI/MachO/ |
| D | PackedVersion.cpp | 1 //===- PackedVersion.cpp --------------------------------------------------===// 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 9 // Implements the Mach-O packed version. 11 //===----------------------------------------------------------------------===// 13 #include "llvm/TextAPI/MachO/PackedVersion.h" 14 #include "llvm/ADT/SmallString.h" 15 #include "llvm/ADT/SmallVector.h" [all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCVSXFMAMutate.cpp | 1 //===--------------- PPCVSXFMAMutate.cpp - VSX FMA Mutation ---------------===// 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 12 //===----------------------------------------------------------------------===// 20 #include "llvm/ADT/STLExtras.h" 21 #include "llvm/ADT/Statistic.h" 22 #include "llvm/CodeGen/LiveIntervals.h" 23 #include "llvm/CodeGen/MachineDominators.h" [all …]
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| D | PPCTOCRegDeps.cpp | 1 //===-- PPCTOCRegDeps.cpp - Add Extra TOC Register Dependencies -----------===// 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 15 // addis 3, 2, .LC12@toc@ha 21 // ld 3, .LC12@toc@l(3) 35 // ld r3,-32472(r2) 41 // changed in between the instruction using the .LC12@toc@ha (TOC-relative) 42 // relocation and the instruction using the .LC12@toc@l(3) relocation. [all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | Mips16HardFloat.cpp | 1 //===- Mips16HardFloat.cpp for Mips16 Hard Float --------------------------===// 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 11 //===----------------------------------------------------------------------===// 14 #include "llvm/CodeGen/TargetPassConfig.h" 15 #include "llvm/IR/Module.h" 16 #include "llvm/IR/Value.h" 17 #include "llvm/Support/Debug.h" [all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Utils/ |
| D | MisExpect.cpp | 1 //===--- MisExpect.cpp - Check the use of llvm.expect with PGO data -------===// 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 10 // llvm.expect intrinsic. This utility extracts the threshold values from 14 // MisExpect metadata is generated when llvm.expect intrinsics are lowered see 17 //===----------------------------------------------------------------------===// 19 #include "llvm/Transforms/Utils/MisExpect.h" 20 #include "llvm/ADT/Twine.h" [all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | ExpandPostRAPseudos.cpp | 1 //===-- ExpandPostRAPseudos.cpp - Pseudo instruction expansion pass -------===// 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 12 //===----------------------------------------------------------------------===// 14 #include "llvm/CodeGen/MachineFunctionPass.h" 15 #include "llvm/CodeGen/MachineInstr.h" 16 #include "llvm/CodeGen/MachineInstrBuilder.h" 17 #include "llvm/CodeGen/MachineRegisterInfo.h" [all …]
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