| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/ |
| D | Android.bp | 21 "llvm/lib/Analysis/AliasAnalysis.cpp", 22 "llvm/lib/Analysis/AliasAnalysisSummary.cpp", 23 "llvm/lib/Analysis/AliasSetTracker.cpp", 24 "llvm/lib/Analysis/AssumptionCache.cpp", 25 "llvm/lib/Analysis/BasicAliasAnalysis.cpp", 26 "llvm/lib/Analysis/BlockFrequencyInfo.cpp", 27 "llvm/lib/Analysis/BlockFrequencyInfoImpl.cpp", 28 "llvm/lib/Analysis/BranchProbabilityInfo.cpp", 29 "llvm/lib/Analysis/CallGraph.cpp", 30 "llvm/lib/Analysis/CallGraphSCCPass.cpp", [all …]
|
| D | BUILD.gn | 84 "llvm/include/", 85 "llvm/lib/Target/AArch64/", 86 "llvm/lib/Target/ARM/", 87 "llvm/lib/Target/Mips/", 88 "llvm/lib/Target/PowerPC/", 89 "llvm/lib/Target/X86/", 111 assert(false, "llvm-10.0 not configured for target platform") 132 "llvm/lib/MC/MCWasmObjectTargetWriter.cpp", 133 "llvm/lib/MC/MCXCOFFObjectTargetWriter.cpp", 134 "llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp", [all …]
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/include/llvm/IR/ |
| D | IntrinsicsAArch64.h | 12 namespace llvm { 16 aarch64_addg = 268, // llvm.aarch64.addg 17 aarch64_clrex, // llvm.aarch64.clrex 18 aarch64_cls, // llvm.aarch64.cls 19 aarch64_cls64, // llvm.aarch64.cls64 20 aarch64_crc32b, // llvm.aarch64.crc32b 21 aarch64_crc32cb, // llvm.aarch64.crc32cb 22 aarch64_crc32ch, // llvm.aarch64.crc32ch 23 aarch64_crc32cw, // llvm.aarch64.crc32cw 24 aarch64_crc32cx, // llvm.aarch64.crc32cx [all …]
|
| D | IntrinsicsS390.h | 12 namespace llvm { 16 s390_efpc = 6057, // llvm.s390.efpc 17 s390_etnd, // llvm.s390.etnd 18 s390_lcbb, // llvm.s390.lcbb 19 s390_ntstg, // llvm.s390.ntstg 20 s390_ppa_txassist, // llvm.s390.ppa.txassist 21 s390_sfpc, // llvm.s390.sfpc 22 s390_tabort, // llvm.s390.tabort 23 s390_tbegin, // llvm.s390.tbegin 24 s390_tbegin_nofloat, // llvm.s390.tbegin.nofloat [all …]
|
| D | IntrinsicsMips.h | 12 namespace llvm { 16 mips_absq_s_ph = 3635, // llvm.mips.absq.s.ph 17 mips_absq_s_qb, // llvm.mips.absq.s.qb 18 mips_absq_s_w, // llvm.mips.absq.s.w 19 mips_add_a_b, // llvm.mips.add.a.b 20 mips_add_a_d, // llvm.mips.add.a.d 21 mips_add_a_h, // llvm.mips.add.a.h 22 mips_add_a_w, // llvm.mips.add.a.w 23 mips_addq_ph, // llvm.mips.addq.ph 24 mips_addq_s_ph, // llvm.mips.addq.s.ph [all …]
|
| D | IntrinsicEnums.inc | 10 addressofreturnaddress = 1, // llvm.addressofreturnaddress 11 adjust_trampoline, // llvm.adjust.trampoline 12 annotation, // llvm.annotation 13 assume, // llvm.assume 14 bitreverse, // llvm.bitreverse 15 bswap, // llvm.bswap 16 canonicalize, // llvm.canonicalize 17 ceil, // llvm.ceil 18 clear_cache, // llvm.clear_cache 19 codeview_annotation, // llvm.codeview.annotation [all …]
|
| D | IntrinsicsHexagon.h | 12 namespace llvm { 16 hexagon_A2_abs = 1869, // llvm.hexagon.A2.abs 17 hexagon_A2_absp, // llvm.hexagon.A2.absp 18 hexagon_A2_abssat, // llvm.hexagon.A2.abssat 19 hexagon_A2_add, // llvm.hexagon.A2.add 20 hexagon_A2_addh_h16_hh, // llvm.hexagon.A2.addh.h16.hh 21 hexagon_A2_addh_h16_hl, // llvm.hexagon.A2.addh.h16.hl 22 hexagon_A2_addh_h16_lh, // llvm.hexagon.A2.addh.h16.lh 23 hexagon_A2_addh_h16_ll, // llvm.hexagon.A2.addh.h16.ll 24 hexagon_A2_addh_h16_sat_hh, // llvm.hexagon.A2.addh.h16.sat.hh [all …]
|
| D | IntrinsicsPowerPC.h | 12 namespace llvm { 16 ppc_addf128_round_to_odd = 5598, // llvm.ppc.addf128.round.to.odd 17 ppc_altivec_crypto_vcipher, // llvm.ppc.altivec.crypto.vcipher 18 ppc_altivec_crypto_vcipherlast, // llvm.ppc.altivec.crypto.vcipherlast 19 ppc_altivec_crypto_vncipher, // llvm.ppc.altivec.crypto.vncipher 20 ppc_altivec_crypto_vncipherlast, // llvm.ppc.altivec.crypto.vncipherlast 21 ppc_altivec_crypto_vpermxor, // llvm.ppc.altivec.crypto.vpermxor 22 ppc_altivec_crypto_vpmsumb, // llvm.ppc.altivec.crypto.vpmsumb 23 ppc_altivec_crypto_vpmsumd, // llvm.ppc.altivec.crypto.vpmsumd 24 ppc_altivec_crypto_vpmsumh, // llvm.ppc.altivec.crypto.vpmsumh [all …]
|
| D | IntrinsicsARM.h | 12 namespace llvm { 16 arm_cdp = 1498, // llvm.arm.cdp 17 arm_cdp2, // llvm.arm.cdp2 18 arm_clrex, // llvm.arm.clrex 19 arm_cls, // llvm.arm.cls 20 arm_cls64, // llvm.arm.cls64 21 arm_cmse_tt, // llvm.arm.cmse.tt 22 arm_cmse_tta, // llvm.arm.cmse.tta 23 arm_cmse_ttat, // llvm.arm.cmse.ttat 24 arm_cmse_ttt, // llvm.arm.cmse.ttt [all …]
|
| D | IntrinsicsX86.h | 12 namespace llvm { 16 x86_3dnow_pavgusb = 6322, // llvm.x86.3dnow.pavgusb 17 x86_3dnow_pf2id, // llvm.x86.3dnow.pf2id 18 x86_3dnow_pfacc, // llvm.x86.3dnow.pfacc 19 x86_3dnow_pfadd, // llvm.x86.3dnow.pfadd 20 x86_3dnow_pfcmpeq, // llvm.x86.3dnow.pfcmpeq 21 x86_3dnow_pfcmpge, // llvm.x86.3dnow.pfcmpge 22 x86_3dnow_pfcmpgt, // llvm.x86.3dnow.pfcmpgt 23 x86_3dnow_pfmax, // llvm.x86.3dnow.pfmax 24 x86_3dnow_pfmin, // llvm.x86.3dnow.pfmin [all …]
|
| D | IntrinsicsAMDGPU.h | 12 namespace llvm { 16 amdgcn_alignbit = 821, // llvm.amdgcn.alignbit 17 amdgcn_alignbyte, // llvm.amdgcn.alignbyte 18 amdgcn_atomic_dec, // llvm.amdgcn.atomic.dec 19 amdgcn_atomic_inc, // llvm.amdgcn.atomic.inc 20 amdgcn_buffer_atomic_add, // llvm.amdgcn.buffer.atomic.add 21 amdgcn_buffer_atomic_and, // llvm.amdgcn.buffer.atomic.and 22 amdgcn_buffer_atomic_cmpswap, // llvm.amdgcn.buffer.atomic.cmpswap 23 amdgcn_buffer_atomic_fadd, // llvm.amdgcn.buffer.atomic.fadd 24 amdgcn_buffer_atomic_or, // llvm.amdgcn.buffer.atomic.or [all …]
|
| D | IntrinsicsNVPTX.h | 12 namespace llvm { 16 nvvm_add_rm_d = 4302, // llvm.nvvm.add.rm.d 17 nvvm_add_rm_f, // llvm.nvvm.add.rm.f 18 nvvm_add_rm_ftz_f, // llvm.nvvm.add.rm.ftz.f 19 nvvm_add_rn_d, // llvm.nvvm.add.rn.d 20 nvvm_add_rn_f, // llvm.nvvm.add.rn.f 21 nvvm_add_rn_ftz_f, // llvm.nvvm.add.rn.ftz.f 22 nvvm_add_rp_d, // llvm.nvvm.add.rp.d 23 nvvm_add_rp_f, // llvm.nvvm.add.rp.f 24 nvvm_add_rp_ftz_f, // llvm.nvvm.add.rp.ftz.f [all …]
|
| D | IntrinsicsXCore.h | 12 namespace llvm { 16 xcore_bitrev = 7494, // llvm.xcore.bitrev 17 xcore_checkevent, // llvm.xcore.checkevent 18 xcore_chkct, // llvm.xcore.chkct 19 xcore_clre, // llvm.xcore.clre 20 xcore_clrpt, // llvm.xcore.clrpt 21 xcore_clrsr, // llvm.xcore.clrsr 22 xcore_crc32, // llvm.xcore.crc32 23 xcore_crc8, // llvm.xcore.crc8 24 xcore_edu, // llvm.xcore.edu [all …]
|
| D | IntrinsicsWebAssembly.h | 12 namespace llvm { 16 wasm_alltrue = 6285, // llvm.wasm.alltrue 17 wasm_anytrue, // llvm.wasm.anytrue 18 wasm_atomic_notify, // llvm.wasm.atomic.notify 19 wasm_atomic_wait_i32, // llvm.wasm.atomic.wait.i32 20 wasm_atomic_wait_i64, // llvm.wasm.atomic.wait.i64 21 wasm_avgr_unsigned, // llvm.wasm.avgr.unsigned 22 wasm_bitselect, // llvm.wasm.bitselect 23 wasm_data_drop, // llvm.wasm.data.drop 24 wasm_dot, // llvm.wasm.dot [all …]
|
| /third_party/rust/rust/compiler/rustc_codegen_gcc/src/intrinsic/ |
| D | archs.rs | 5 "llvm.AMDGPU.div.fixup.f32" => "__builtin_amdgpu_div_fixup", 6 "llvm.AMDGPU.div.fixup.f64" => "__builtin_amdgpu_div_fixup", 7 "llvm.AMDGPU.div.fixup.v2f64" => "__builtin_amdgpu_div_fixup", 8 "llvm.AMDGPU.div.fixup.v4f32" => "__builtin_amdgpu_div_fixup", 9 "llvm.AMDGPU.div.fmas.f32" => "__builtin_amdgpu_div_fmas", 10 "llvm.AMDGPU.div.fmas.f64" => "__builtin_amdgpu_div_fmas", 11 "llvm.AMDGPU.div.fmas.v2f64" => "__builtin_amdgpu_div_fmas", 12 "llvm.AMDGPU.div.fmas.v4f32" => "__builtin_amdgpu_div_fmas", 13 "llvm.AMDGPU.ldexp.f32" => "__builtin_amdgpu_ldexp", 14 "llvm.AMDGPU.ldexp.f64" => "__builtin_amdgpu_ldexp", [all …]
|
| D | llvm.rs | 9 // Some LLVM intrinsics do not map 1-to-1 to GCC intrinsics, so we add the missing in adjust_intrinsic_arguments() 13 // NOTE: the following intrinsics have a different number of parameters in LLVM and GCC. in adjust_intrinsic_arguments() 145 // Both llvm.fma.v16f32 and llvm.x86.avx512.vfmadd.ps.512 maps to in adjust_intrinsic_arguments() 257 // NOTE: the LLVM intrinsic receives 3 floats, but the GCC builtin requires 3 vectors. in adjust_intrinsic_arguments() 284 … "llvm.x86.fma.vfmsubadd.pd.256" | "llvm.x86.fma.vfmsubadd.ps" | "llvm.x86.fma.vfmsubadd.ps.256" in adjust_intrinsic_arguments() 285 | "llvm.x86.fma.vfmsubadd.pd" => { in adjust_intrinsic_arguments() 286 … // NOTE: since both llvm.x86.fma.vfmsubadd.ps and llvm.x86.fma.vfmaddsub.ps maps to in adjust_intrinsic_arguments() 288 // subadd LLVM intrinsic, e.g. _mm256_fmsubadd_pd. in adjust_intrinsic_arguments() 299 …// The builtin __builtin_ia32_ldmxcsr takes an integer value while llvm.x86.sse.ldmxcsr takes a po… in adjust_intrinsic_arguments() 319 // The first two arguments are reversed, compared to LLVM. in adjust_intrinsic_arguments() [all …]
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/ |
| D | LinkAllPasses.h | 1 //===- llvm/LinkAllPasses.h ------------ Reference All Passes ---*- C++ -*-===// 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 17 #include "llvm/ADT/Statistic.h" 18 #include "llvm/Analysis/AliasAnalysisEvaluator.h" 19 #include "llvm/Analysis/AliasSetTracker.h" 20 #include "llvm/Analysis/BasicAliasAnalysis.h" 21 #include "llvm/Analysis/CFLAndersAliasAnalysis.h" 22 #include "llvm/Analysis/CFLSteensAliasAnalysis.h" [all …]
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/ |
| D | CMakeLists.txt | 16 "build/Android/include/llvm/Config/abi-breaking.h" 17 "build/Android/include/llvm/Config/config.h" 18 "build/Android/include/llvm/Config/llvm-config.h" 19 "build/Android/include/llvm/Support/DataTypes.h" 20 "build/Fuchsia/include/llvm/Config/abi-breaking.h" 21 "build/Fuchsia/include/llvm/Config/config.h" 22 "build/Fuchsia/include/llvm/Config/llvm-config.h" 23 "build/Fuchsia/include/llvm/Support/DataTypes.h" 24 "build/Linux/include/llvm/Config/abi-breaking.h" 25 "build/Linux/include/llvm/Config/config.h" [all …]
|
| /third_party/skia/m133/bazel/rbe/gce_linux/cc/ |
| D | module.modulemap | 2 textual header "/usr/lib/llvm-11/lib/clang/11.0.1/include/__clang_cuda_builtin_vars.h" 3 textual header "/usr/lib/llvm-11/lib/clang/11.0.1/include/__clang_cuda_cmath.h" 4 textual header "/usr/lib/llvm-11/lib/clang/11.0.1/include/__clang_cuda_complex_builtins.h" 5 textual header "/usr/lib/llvm-11/lib/clang/11.0.1/include/__clang_cuda_device_functions.h" 6 textual header "/usr/lib/llvm-11/lib/clang/11.0.1/include/__clang_cuda_intrinsics.h" 7 textual header "/usr/lib/llvm-11/lib/clang/11.0.1/include/__clang_cuda_libdevice_declares.h" 8 textual header "/usr/lib/llvm-11/lib/clang/11.0.1/include/__clang_cuda_math.h" 9 textual header "/usr/lib/llvm-11/lib/clang/11.0.1/include/__clang_cuda_math_forward_declares.h" 10 textual header "/usr/lib/llvm-11/lib/clang/11.0.1/include/__clang_cuda_runtime_wrapper.h" 11 textual header "/usr/lib/llvm-11/lib/clang/11.0.1/include/__clang_hip_libdevice_declares.h" [all …]
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/ |
| D | Intrinsics.gen | 19 addressofreturnaddress, // llvm.addressofreturnaddress 20 adjust_trampoline, // llvm.adjust.trampoline 21 annotation, // llvm.annotation 22 assume, // llvm.assume 23 bitreverse, // llvm.bitreverse 24 bswap, // llvm.bswap 25 canonicalize, // llvm.canonicalize 26 ceil, // llvm.ceil 27 clear_cache, // llvm.clear_cache 28 convert_from_fp16, // llvm.convert.from.fp16 [all …]
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/ |
| D | Intrinsics.gen | 19 addressofreturnaddress, // llvm.addressofreturnaddress 20 adjust_trampoline, // llvm.adjust.trampoline 21 annotation, // llvm.annotation 22 assume, // llvm.assume 23 bitreverse, // llvm.bitreverse 24 bswap, // llvm.bswap 25 canonicalize, // llvm.canonicalize 26 ceil, // llvm.ceil 27 clear_cache, // llvm.clear_cache 28 convert_from_fp16, // llvm.convert.from.fp16 [all …]
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/ |
| D | Intrinsics.gen | 19 addressofreturnaddress, // llvm.addressofreturnaddress 20 adjust_trampoline, // llvm.adjust.trampoline 21 annotation, // llvm.annotation 22 assume, // llvm.assume 23 bitreverse, // llvm.bitreverse 24 bswap, // llvm.bswap 25 canonicalize, // llvm.canonicalize 26 ceil, // llvm.ceil 27 clear_cache, // llvm.clear_cache 28 convert_from_fp16, // llvm.convert.from.fp16 [all …]
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/build/Fuchsia/include/llvm/IR/ |
| D | Intrinsics.gen | 19 addressofreturnaddress, // llvm.addressofreturnaddress 20 adjust_trampoline, // llvm.adjust.trampoline 21 annotation, // llvm.annotation 22 assume, // llvm.assume 23 bitreverse, // llvm.bitreverse 24 bswap, // llvm.bswap 25 canonicalize, // llvm.canonicalize 26 ceil, // llvm.ceil 27 clear_cache, // llvm.clear_cache 28 convert_from_fp16, // llvm.convert.from.fp16 [all …]
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/ |
| D | Intrinsics.gen | 19 addressofreturnaddress, // llvm.addressofreturnaddress 20 adjust_trampoline, // llvm.adjust.trampoline 21 annotation, // llvm.annotation 22 assume, // llvm.assume 23 bitreverse, // llvm.bitreverse 24 bswap, // llvm.bswap 25 canonicalize, // llvm.canonicalize 26 ceil, // llvm.ceil 27 clear_cache, // llvm.clear_cache 28 convert_from_fp16, // llvm.convert.from.fp16 [all …]
|
| /third_party/rust/rust/compiler/rustc_llvm/llvm-wrapper/ |
| D | LLVMWrapper.h | 1 #include "llvm-c/BitReader.h" 2 #include "llvm-c/Core.h" 3 #include "llvm-c/Object.h" 4 #include "llvm/ADT/ArrayRef.h" 5 #include "llvm/ADT/DenseSet.h" 6 #include "llvm/ADT/SmallVector.h" 7 #include "llvm/Analysis/Lint.h" 8 #include "llvm/Analysis/Passes.h" 9 #include "llvm/IR/IRBuilder.h" 10 #include "llvm/IR/InlineAsm.h" [all …]
|