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12

/kernel/linux/linux-5.10/Documentation/devicetree/bindings/iio/frequency/
Dadf4350.txt4 - compatible: Should be one of
7 - reg: SPI chip select numbert for the device
8 - spi-max-frequency: Max SPI frequency to use (< 20000000)
9 - clocks: From common clock binding. Clock is phandle to clock for
13 - gpios: GPIO Lock detect - If set with a valid phandle and GPIO number,
14 pll lock state is tested upon read.
15 - adi,channel-spacing: Channel spacing in Hz (influences MODULUS).
16 - adi,power-up-frequency: If set in Hz the PLL tunes to
18 - adi,reference-div-factor: If set the driver skips dynamic calculation
20 - adi,reference-doubler-enable: Enables reference doubler.
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/iio/frequency/
Dadi,adf4350.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <michael.hennerich@analog.com>
15 - adi,adf4350
16 - adi,adf4351
21 spi-max-frequency:
28 clock-names:
33 description: Lock detect GPIO.
35 adi,channel-spacing:
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/kernel/linux/linux-5.10/drivers/iio/frequency/
Dadf4350.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2012-2013 Analog Devices Inc.
47 unsigned long regs[6];
48 unsigned long regs_hw[6];
51 * Lock to protect the state of the device from potential concurrent
53 * and this lock is meant to prevent the start of another sequence
56 struct mutex lock; member
77 for (i = ADF4350_REG5; i >= ADF4350_REG0; i--) { in adf4350_sync_config()
78 if ((st->regs_hw[i] != st->regs[i]) || in adf4350_sync_config()
87 st->val = cpu_to_be32(st->regs[i] | i); in adf4350_sync_config()
[all …]
/kernel/linux/linux-6.6/drivers/iio/frequency/
Dadf4350.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2012-2013 Analog Devices Inc.
47 unsigned long regs[6];
48 unsigned long regs_hw[6];
51 * Lock to protect the state of the device from potential concurrent
53 * and this lock is meant to prevent the start of another sequence
56 struct mutex lock; member
77 for (i = ADF4350_REG5; i >= ADF4350_REG0; i--) { in adf4350_sync_config()
78 if ((st->regs_hw[i] != st->regs[i]) || in adf4350_sync_config()
87 st->val = cpu_to_be32(st->regs[i] | i); in adf4350_sync_config()
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/kernel/linux/linux-5.10/arch/x86/kernel/
Dtsc.c1 // SPDX-License-Identifier: GPL-2.0-only
28 #include <asm/intel-family.h>
79 data->cyc2ns_offset = this_cpu_read(cyc2ns.data[idx].cyc2ns_offset); in cyc2ns_read_begin()
80 data->cyc2ns_mul = this_cpu_read(cyc2ns.data[idx].cyc2ns_mul); in cyc2ns_read_begin()
81 data->cyc2ns_shift = this_cpu_read(cyc2ns.data[idx].cyc2ns_shift); in cyc2ns_read_begin()
95 * ns = cycles / (freq / ns_per_sec)
96 * ns = cycles * (ns_per_sec / freq)
97 * ns = cycles * (10^9 / (cpu_khz * 10^3))
98 * ns = cycles * (10^6 / cpu_khz)
101 * ns = cycles * (10^6 * SC / cpu_khz) / SC
[all …]
/kernel/linux/linux-6.6/arch/x86/kernel/
Dtsc.c1 // SPDX-License-Identifier: GPL-2.0-only
29 #include <asm/intel-family.h>
80 data->cyc2ns_offset = this_cpu_read(cyc2ns.data[idx].cyc2ns_offset); in __cyc2ns_read()
81 data->cyc2ns_mul = this_cpu_read(cyc2ns.data[idx].cyc2ns_mul); in __cyc2ns_read()
82 data->cyc2ns_shift = this_cpu_read(cyc2ns.data[idx].cyc2ns_shift); in __cyc2ns_read()
102 * ns = cycles / (freq / ns_per_sec)
103 * ns = cycles * (ns_per_sec / freq)
104 * ns = cycles * (10^9 / (cpu_khz * 10^3))
105 * ns = cycles * (10^6 / cpu_khz)
108 * ns = cycles * (10^6 * SC / cpu_khz) / SC
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
Ddce_v6_0.c59 static const u32 crtc_offsets[6] =
71 mmDC_HPD1_INT_STATUS - mmDC_HPD1_INT_STATUS,
72 mmDC_HPD2_INT_STATUS - mmDC_HPD1_INT_STATUS,
73 mmDC_HPD3_INT_STATUS - mmDC_HPD1_INT_STATUS,
74 mmDC_HPD4_INT_STATUS - mmDC_HPD1_INT_STATUS,
75 mmDC_HPD5_INT_STATUS - mmDC_HPD1_INT_STATUS,
76 mmDC_HPD6_INT_STATUS - mmDC_HPD1_INT_STATUS,
86 (0x13830 - 0x7030) >> 2,
95 } interrupt_status_offsets[6] = { {
133 spin_lock_irqsave(&adev->audio_endpt_idx_lock, flags); in dce_v6_0_audio_endpt_rreg()
[all …]
Ddce_v8_0.c56 static const u32 crtc_offsets[6] = {
81 (0x13830 - 0x7030) >> 2,
90 } interrupt_status_offsets[6] = { {
128 spin_lock_irqsave(&adev->audio_endpt_idx_lock, flags); in dce_v8_0_audio_endpt_rreg()
131 spin_unlock_irqrestore(&adev->audio_endpt_idx_lock, flags); in dce_v8_0_audio_endpt_rreg()
141 spin_lock_irqsave(&adev->audio_endpt_idx_lock, flags); in dce_v8_0_audio_endpt_wreg()
144 spin_unlock_irqrestore(&adev->audio_endpt_idx_lock, flags); in dce_v8_0_audio_endpt_wreg()
149 if (crtc >= adev->mode_info.num_crtc) in dce_v8_0_vblank_get_counter()
159 /* Enable pflip interrupts */ in dce_v8_0_pageflip_interrupt_init()
160 for (i = 0; i < adev->mode_info.num_crtc; i++) in dce_v8_0_pageflip_interrupt_init()
[all …]
Ddce_v11_0.c163 switch (adev->asic_type) { in dce_v11_0_init_golden_registers()
200 spin_lock_irqsave(&adev->audio_endpt_idx_lock, flags); in dce_v11_0_audio_endpt_rreg()
203 spin_unlock_irqrestore(&adev->audio_endpt_idx_lock, flags); in dce_v11_0_audio_endpt_rreg()
213 spin_lock_irqsave(&adev->audio_endpt_idx_lock, flags); in dce_v11_0_audio_endpt_wreg()
216 spin_unlock_irqrestore(&adev->audio_endpt_idx_lock, flags); in dce_v11_0_audio_endpt_wreg()
221 if (crtc < 0 || crtc >= adev->mode_info.num_crtc) in dce_v11_0_vblank_get_counter()
231 /* Enable pflip interrupts */ in dce_v11_0_pageflip_interrupt_init()
232 for (i = 0; i < adev->mode_info.num_crtc; i++) in dce_v11_0_pageflip_interrupt_init()
233 amdgpu_irq_get(adev, &adev->pageflip_irq, i); in dce_v11_0_pageflip_interrupt_init()
241 for (i = 0; i < adev->mode_info.num_crtc; i++) in dce_v11_0_pageflip_interrupt_fini()
[all …]
Ddce_v10_0.c148 switch (adev->asic_type) { in dce_v10_0_init_golden_registers()
176 spin_lock_irqsave(&adev->audio_endpt_idx_lock, flags); in dce_v10_0_audio_endpt_rreg()
179 spin_unlock_irqrestore(&adev->audio_endpt_idx_lock, flags); in dce_v10_0_audio_endpt_rreg()
189 spin_lock_irqsave(&adev->audio_endpt_idx_lock, flags); in dce_v10_0_audio_endpt_wreg()
192 spin_unlock_irqrestore(&adev->audio_endpt_idx_lock, flags); in dce_v10_0_audio_endpt_wreg()
197 if (crtc >= adev->mode_info.num_crtc) in dce_v10_0_vblank_get_counter()
207 /* Enable pflip interrupts */ in dce_v10_0_pageflip_interrupt_init()
208 for (i = 0; i < adev->mode_info.num_crtc; i++) in dce_v10_0_pageflip_interrupt_init()
209 amdgpu_irq_get(adev, &adev->pageflip_irq, i); in dce_v10_0_pageflip_interrupt_init()
217 for (i = 0; i < adev->mode_info.num_crtc; i++) in dce_v10_0_pageflip_interrupt_fini()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
Ddce_v6_0.c57 static const u32 crtc_offsets[6] =
69 mmDC_HPD1_INT_STATUS - mmDC_HPD1_INT_STATUS,
70 mmDC_HPD2_INT_STATUS - mmDC_HPD1_INT_STATUS,
71 mmDC_HPD3_INT_STATUS - mmDC_HPD1_INT_STATUS,
72 mmDC_HPD4_INT_STATUS - mmDC_HPD1_INT_STATUS,
73 mmDC_HPD5_INT_STATUS - mmDC_HPD1_INT_STATUS,
74 mmDC_HPD6_INT_STATUS - mmDC_HPD1_INT_STATUS,
84 (0x13830 - 0x7030) >> 2,
93 } interrupt_status_offsets[6] = { {
131 spin_lock_irqsave(&adev->audio_endpt_idx_lock, flags); in dce_v6_0_audio_endpt_rreg()
[all …]
Ddce_v8_0.c54 static const u32 crtc_offsets[6] =
81 (0x13830 - 0x7030) >> 2,
90 } interrupt_status_offsets[6] = { {
128 spin_lock_irqsave(&adev->audio_endpt_idx_lock, flags); in dce_v8_0_audio_endpt_rreg()
131 spin_unlock_irqrestore(&adev->audio_endpt_idx_lock, flags); in dce_v8_0_audio_endpt_rreg()
141 spin_lock_irqsave(&adev->audio_endpt_idx_lock, flags); in dce_v8_0_audio_endpt_wreg()
144 spin_unlock_irqrestore(&adev->audio_endpt_idx_lock, flags); in dce_v8_0_audio_endpt_wreg()
149 if (crtc >= adev->mode_info.num_crtc) in dce_v8_0_vblank_get_counter()
159 /* Enable pflip interrupts */ in dce_v8_0_pageflip_interrupt_init()
160 for (i = 0; i < adev->mode_info.num_crtc; i++) in dce_v8_0_pageflip_interrupt_init()
[all …]
Ddce_v11_0.c161 switch (adev->asic_type) { in dce_v11_0_init_golden_registers()
198 spin_lock_irqsave(&adev->audio_endpt_idx_lock, flags); in dce_v11_0_audio_endpt_rreg()
201 spin_unlock_irqrestore(&adev->audio_endpt_idx_lock, flags); in dce_v11_0_audio_endpt_rreg()
211 spin_lock_irqsave(&adev->audio_endpt_idx_lock, flags); in dce_v11_0_audio_endpt_wreg()
214 spin_unlock_irqrestore(&adev->audio_endpt_idx_lock, flags); in dce_v11_0_audio_endpt_wreg()
219 if (crtc < 0 || crtc >= adev->mode_info.num_crtc) in dce_v11_0_vblank_get_counter()
229 /* Enable pflip interrupts */ in dce_v11_0_pageflip_interrupt_init()
230 for (i = 0; i < adev->mode_info.num_crtc; i++) in dce_v11_0_pageflip_interrupt_init()
231 amdgpu_irq_get(adev, &adev->pageflip_irq, i); in dce_v11_0_pageflip_interrupt_init()
239 for (i = 0; i < adev->mode_info.num_crtc; i++) in dce_v11_0_pageflip_interrupt_fini()
[all …]
Ddce_v10_0.c152 switch (adev->asic_type) { in dce_v10_0_init_golden_registers()
180 spin_lock_irqsave(&adev->audio_endpt_idx_lock, flags); in dce_v10_0_audio_endpt_rreg()
183 spin_unlock_irqrestore(&adev->audio_endpt_idx_lock, flags); in dce_v10_0_audio_endpt_rreg()
193 spin_lock_irqsave(&adev->audio_endpt_idx_lock, flags); in dce_v10_0_audio_endpt_wreg()
196 spin_unlock_irqrestore(&adev->audio_endpt_idx_lock, flags); in dce_v10_0_audio_endpt_wreg()
201 if (crtc >= adev->mode_info.num_crtc) in dce_v10_0_vblank_get_counter()
211 /* Enable pflip interrupts */ in dce_v10_0_pageflip_interrupt_init()
212 for (i = 0; i < adev->mode_info.num_crtc; i++) in dce_v10_0_pageflip_interrupt_init()
213 amdgpu_irq_get(adev, &adev->pageflip_irq, i); in dce_v10_0_pageflip_interrupt_init()
221 for (i = 0; i < adev->mode_info.num_crtc; i++) in dce_v10_0_pageflip_interrupt_fini()
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/kernel/linux/linux-6.6/Documentation/filesystems/
Dxfs-online-fsck-design.rst1 .. SPDX-License-Identifier: GPL-2.0
8 Heading 3 uses "----"
11 Heading 6 uses "~~~~"
25 - To help kernel distributors understand exactly what the XFS online fsck
28 - To help people reading the code to familiarize themselves with the relevant
31 - To help developers maintaining the system by capturing the reasons
46 Parts 5 and 6 show off the high level components and how they fit together, and
59 - Provide a hierarchy of names through which application programs can associate
62 - Virtualize physical storage media across those names, and
64 - Retrieve the named data blobs at any time.
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/
Dintel_dpll.c1 // SPDX-License-Identifier: MIT
46 .m2 = { .min = 6, .max = 16 },
59 .m2 = { .min = 6, .max = 16 },
72 .m2 = { .min = 6, .max = 16 },
74 .p1 = { .min = 1, .max = 6 },
82 .n = { .min = 1, .max = 6 },
95 .n = { .min = 1, .max = 6 },
156 .p1 = { .min = 2, .max = 6 },
166 .n = { .min = 3, .max = 6 },
180 .n = { .min = 3, .max = 6 },
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/kernel/linux/linux-5.10/drivers/firewire/
Dohci.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2003-2006 Kristian Hoegsberg <krh@bitplanet.net>
13 #include <linux/dma-mapping.h>
15 #include <linux/firewire-constants.h>
44 #define ohci_info(ohci, f, args...) dev_info(ohci->card.device, f, ##args)
45 #define ohci_notice(ohci, f, args...) dev_notice(ohci->card.device, f, ##args)
46 #define ohci_err(ohci, f, args...) dev_err(ohci->card.device, f, ##args)
55 #define DESCRIPTOR_YY (1 << 6)
106 * A buffer that contains a block of DMA-able coherent memory used for
126 * List of page-sized buffers for storing DMA descriptors.
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/kernel/linux/linux-6.6/drivers/firewire/
Dohci.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2003-2006 Kristian Hoegsberg <krh@bitplanet.net>
13 #include <linux/dma-mapping.h>
15 #include <linux/firewire-constants.h>
44 #define ohci_info(ohci, f, args...) dev_info(ohci->card.device, f, ##args)
45 #define ohci_notice(ohci, f, args...) dev_notice(ohci->card.device, f, ##args)
46 #define ohci_err(ohci, f, args...) dev_err(ohci->card.device, f, ##args)
55 #define DESCRIPTOR_YY (1 << 6)
106 * A buffer that contains a block of DMA-able coherent memory used for
126 * List of page-sized buffers for storing DMA descriptors.
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/kernel/linux/linux-5.10/kernel/sched/
Dfair.c1 // SPDX-License-Identifier: GPL-2.0
55 * Targeted preemption latency for CPU-bound tasks:
58 * 'timeslice length' - timeslices in CFS are of variable length
59 * and have no persistent notion like in traditional, time-slice
63 * run vmstat and monitor the context-switches (cs) field)
65 * (default: 6ms * (1 + ilog(ncpus)), units: nanoseconds)
71 * The initial- and re-scaling of tunables is configurable
75 * SCHED_TUNABLESCALING_NONE - unscaled, always *1
76 * SCHED_TUNABLESCALING_LOG - scaled logarithmical, *1+ilog(ncpus)
77 * SCHED_TUNABLESCALING_LINEAR - scaled linear, *ncpus
[all …]
/kernel/linux/linux-6.6/kernel/sched/
Dfair.c1 // SPDX-License-Identifier: GPL-2.0
43 #include <linux/memory-tiers.h>
93 * Targeted preemption latency for CPU-bound tasks:
96 * 'timeslice length' - timeslices in CFS are of variable length
97 * and have no persistent notion like in traditional, time-slice
101 * run vmstat and monitor the context-switches (cs) field)
103 * (default: 6ms * (1 + ilog(ncpus)), units: nanoseconds)
109 * The initial- and re-scaling of tunables is configurable
113 * SCHED_TUNABLESCALING_NONE - unscaled, always *1
114 * SCHED_TUNABLESCALING_LOG - scaled logarithmical, *1+ilog(ncpus)
[all …]
/kernel/linux/linux-6.6/tools/perf/scripts/python/
Dexported-sql-viewer.py2 # SPDX-License-Identifier: GPL-2.0
3 # exported-sql-viewer.py: view data from sql database
4 # Copyright (c) 2014-2018, Intel Corporation.
7 # export-to-sqlite.py or the export-to-postgresql.py script. Refer to those
11 # call-graph can be displayed for the pt_example database like this:
13 # python tools/perf/scripts/python/exported-sql-viewer.py pt_example
18 # python tools/perf/scripts/python/exported-sql-viewer.py "hostname=myhost username=myuser password…
20 # The result is a GUI window with a tree representing a context-sensitive
21 # call-graph. Expanding a couple of levels of the tree and adjusting column
25 # Call Path Object Count Time(ns) Time(%) Branch Count Branch C…
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/kernel/linux/patches/linux-5.10/yangfan_patch/
Ddrivers.patch1 diff --git a/drivers/Makefile b/drivers/Makefile
3 --- a/drivers/Makefile
5 @@ -6,6 +6,8 @@
6 # Rewritten to use lists instead of if-statements.
11 obj-y += irqchip/
12 obj-y += bus/
14 diff --git a/drivers/block/nbd.c b/drivers/block/nbd.c
16 --- a/drivers/block/nbd.c
18 @@ -2398,12 +2398,6 @@ static int nbd_genl_status(struct sk_buff *skb, struct genl_info *info)
22 - if (!dev_list) {
[all …]
/kernel/linux/linux-5.10/tools/perf/scripts/python/
Dexported-sql-viewer.py2 # SPDX-License-Identifier: GPL-2.0
3 # exported-sql-viewer.py: view data from sql database
4 # Copyright (c) 2014-2018, Intel Corporation.
7 # export-to-sqlite.py or the export-to-postgresql.py script. Refer to those
11 # call-graph can be displayed for the pt_example database like this:
13 # python tools/perf/scripts/python/exported-sql-viewer.py pt_example
18 # python tools/perf/scripts/python/exported-sql-viewer.py "hostname=myhost username=myuser password…
20 # The result is a GUI window with a tree representing a context-sensitive
21 # call-graph. Expanding a couple of levels of the tree and adjusting column
25 # Call Path Object Count Time(ns) Time(%) Branch Count Branch C…
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/
Dintel_display.c2 * Copyright © 2006-2007 Intel Corporation
29 #include <linux/intel-iommu.h>
32 #include <linux/dma-resv.h>
208 drm_WARN(&dev_priv->drm, (val & CCK_FREQUENCY_STATUS) != in vlv_get_cck_clock()
222 if (dev_priv->hpll_freq == 0) in vlv_get_cck_clock_hpll()
223 dev_priv->hpll_freq = vlv_get_hpll_vco(dev_priv); in vlv_get_cck_clock_hpll()
225 hpll = vlv_get_cck_clock(dev_priv, name, reg, dev_priv->hpll_freq); in vlv_get_cck_clock_hpll()
237 dev_priv->czclk_freq = vlv_get_cck_clock_hpll(dev_priv, "czclk", in intel_update_czclk()
240 drm_dbg(&dev_priv->drm, "CZ clock rate: %d kHz\n", in intel_update_czclk()
241 dev_priv->czclk_freq); in intel_update_czclk()
[all …]
/kernel/linux/linux-5.10/kernel/cgroup/
Dcpuset.c7 * Copyright (C) 2004-2007 Silicon Graphics, Inc.
11 * sysfs is Copyright (c) 2001-3 Patrick Mochel
13 * 2003-10-10 Written by Simon Derr.
14 * 2003-10-22 Updates by Stephen Hemminger.
15 * 2004 May-July Rework by Paul Jackson.
24 #include "cgroup-internal.h"
61 #include <linux/backing-dev.h>
80 spinlock_t lock; /* guards read or write of above */ member
91 * The user-configured masks can only be changed by writing to
105 * The user-configured masks are always the same with effective masks.
[all …]

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