| /kernel/liteos_m/components/power/ |
| D | los_pm.h | 2 * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved. 3 * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved. 42 * Pm error code: Invalid low-power mode. 60 * Pm error code: The current mode is unlocked. 96 * Pm error code: The hook for mode is not implemented. 144 …UINT32 (*suspend)(UINT32 mode); /* The device enters low-power consumption, Unlocked task scheduli… 145 …VOID (*resume)(UINT32 mode); /* The device exits from low-power consumption, Unlocked task sche… 149 /* Low-power timer related implementation functions. 150 * The function is not NULL, the low-power timer is enabled. 152 UINT32 freq; /* The frequency of the low-power timer */ [all …]
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| /kernel/liteos_a/kernel/include/ |
| D | los_pm.h | 2 * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved. 3 * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved. 55 …UINT32 (*suspend)(UINT32 mode); /* The device enters low power consumption, Unlocked task scheduli… 56 …VOID (*resume)(UINT32 mode); /* The device exits from low power consumption, Unlocked task sche… 60 /* Preparations before the CPU enters low power consumption. 61 * All modes except normal mode are invoked. 64 UINT32 (*early)(UINT32 mode); 65 /* The system performs low-power recovery. 66 * All modes except normal mode are invoked. 69 VOID (*late)(UINT32 mode); [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/regulator/ |
| D | maxim,max77802.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Maxim MAX77802 Power Management IC regulators 10 - Javier Martinez Canillas <javier@dowhile0.org> 11 - Krzysztof Kozlowski <krzk@kernel.org> 14 This is a part of device tree bindings for Maxim MAX77802 Power Management 17 The Maxim MAX77686 provides 10 high-efficiency Buck and 32 Low-DropOut (LDO) 23 Certain regulators support "regulator-initial-mode" and "regulator-mode". 24 The valid modes list is defined in the dt-bindings/regulator/maxim,max77802.h [all …]
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| D | samsung,s5m8767.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Samsung S5M8767 Power Management IC regulators 10 - Krzysztof Kozlowski <krzk@kernel.org> 13 This is a part of device tree bindings for S2M and S5M family of Power 23 "^LDO([1-9]|1[0-9]|2[0-8])$": 36 Describes the different operating modes of the LDO's with power mode 38 0 - always off mode 39 1 - on in normal mode [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/intel/pxa/ |
| D | pxa300-raumfeld-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 #include <dt-bindings/gpio/gpio.h> 5 #include <dt-bindings/input/input.h> 6 #include <dt-bindings/interrupt-controller/irq.h> 10 hw-revision = <0>; 14 stdout-path = &ffuart; 22 reg_3v3: regulator-3v3 { 23 compatible = "regulator-fixed"; 24 regulator-name = "3v3-fixed-supply"; 25 regulator-min-microvolt = <3300000>; [all …]
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| D | pxa300-raumfeld-controller.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 /dts-v1/; 5 #include "pxa300-raumfeld-common.dtsi" 9 compatible = "raumfeld,raumfeld-controller-pxa303", "marvell,pxa300"; 11 reg_vbatt: regulator-vbatt { 12 compatible = "regulator-fixed"; 13 regulator-name = "vbatt-fixed-supply"; 14 regulator-min-microvolt = <3700000>; 15 regulator-max-microvolt = <3700000>; 16 regulator-always-on; [all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | pxa300-raumfeld-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 #include <dt-bindings/gpio/gpio.h> 5 #include <dt-bindings/input/input.h> 6 #include <dt-bindings/interrupt-controller/irq.h> 10 hw-revision = <0>; 14 stdout-path = &ffuart; 22 reg_3v3: regulator-3v3 { 23 compatible = "regulator-fixed"; 24 regulator-name = "3v3-fixed-supply"; 25 regulator-min-microvolt = <3300000>; [all …]
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| D | pxa300-raumfeld-controller.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 /dts-v1/; 5 #include "pxa300-raumfeld-common.dtsi" 9 compatible = "raumfeld,raumfeld-controller-pxa303", "marvell,pxa300"; 11 reg_vbatt: regulator-vbatt { 12 compatible = "regulator-fixed"; 13 regulator-name = "vbatt-fixed-supply"; 14 regulator-min-microvolt = <3700000>; 15 regulator-max-microvolt = <3700000>; 16 regulator-always-on; [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/usb/ |
| D | pxa-usb.txt | 6 - compatible: Should be "marvell,pxa-ohci" for USB controllers 7 used in host mode. 10 - "marvell,enable-port1", "marvell,enable-port2", "marvell,enable-port3" 12 - "marvell,port-mode" selects the mode of the ports: 16 - "marvell,power-sense-low" - power sense pin is low-active. 17 - "marvell,power-control-low" - power control pin is low-active. 18 - "marvell,no-oc-protection" - disable over-current protection. 19 - "marvell,oc-mode-perport" - enable per-port over-current protection. 20 - "marvell,power_on_delay" Power On to Power Good time - in ms. 25 compatible = "marvell,pxa-ohci", "usb-ohci"; [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/usb/ |
| D | pxa-usb.txt | 6 - compatible: Should be "marvell,pxa-ohci" for USB controllers 7 used in host mode. 10 - "marvell,enable-port1", "marvell,enable-port2", "marvell,enable-port3" 12 - "marvell,port-mode" selects the mode of the ports: 16 - "marvell,power-sense-low" - power sense pin is low-active. 17 - "marvell,power-control-low" - power control pin is low-active. 18 - "marvell,no-oc-protection" - disable over-current protection. 19 - "marvell,oc-mode-perport" - enable per-port over-current protection. 20 - "marvell,power_on_delay" Power On to Power Good time - in ms. 25 compatible = "marvell,pxa-ohci"; [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/iio/addac/ |
| D | adi,ad74115.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Cosmin Tanislav <cosmin.tanislav@analog.com> 13 The AD74115H is a single-channel software configurable input/output 17 chip solution with an SPI interface. The device features a 16-bit ADC and a 18 14-bit DAC. 25 - adi,ad74115h 30 spi-max-frequency: 33 spi-cpol: true [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/ |
| D | pincfg-node.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/pincfg-node.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Linus Walleij <linus.walleij@linaro.org> 21 bias-disable: 25 bias-high-impedance: 27 description: high impedance mode ("third-state", "floating") 29 bias-bus-hold: 33 bias-pull-up: [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/ |
| D | pincfg-node.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/pincfg-node.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Linus Walleij <linus.walleij@linaro.org> 21 bias-disable: 25 bias-high-impedance: 27 description: high impedance mode ("third-state", "floating") 29 bias-bus-hold: 33 bias-pull-up: [all …]
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| /kernel/linux/linux-6.6/drivers/clk/ti/ |
| D | dpll44xx.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * OMAP4-specific DPLL control functions 20 * can supported when using the DPLL low-power mode. Frequencies are 22 * Status, and Low-Power Operation Mode". 45 mask = clk->flags & CLOCK_CLKOUTX2 ? in omap4_dpllmx_allow_gatectrl() 49 v = ti_clk_ll_ops->clk_readl(&clk->clksel_reg); in omap4_dpllmx_allow_gatectrl() 52 ti_clk_ll_ops->clk_writel(v, &clk->clksel_reg); in omap4_dpllmx_allow_gatectrl() 63 mask = clk->flags & CLOCK_CLKOUTX2 ? in omap4_dpllmx_deny_gatectrl() 67 v = ti_clk_ll_ops->clk_readl(&clk->clksel_reg); in omap4_dpllmx_deny_gatectrl() 70 ti_clk_ll_ops->clk_writel(v, &clk->clksel_reg); in omap4_dpllmx_deny_gatectrl() [all …]
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| /kernel/linux/linux-5.10/drivers/clk/ti/ |
| D | dpll44xx.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * OMAP4-specific DPLL control functions 20 * can supported when using the DPLL low-power mode. Frequencies are 22 * Status, and Low-Power Operation Mode". 45 mask = clk->flags & CLOCK_CLKOUTX2 ? in omap4_dpllmx_allow_gatectrl() 49 v = ti_clk_ll_ops->clk_readl(&clk->clksel_reg); in omap4_dpllmx_allow_gatectrl() 52 ti_clk_ll_ops->clk_writel(v, &clk->clksel_reg); in omap4_dpllmx_allow_gatectrl() 63 mask = clk->flags & CLOCK_CLKOUTX2 ? in omap4_dpllmx_deny_gatectrl() 67 v = ti_clk_ll_ops->clk_readl(&clk->clksel_reg); in omap4_dpllmx_deny_gatectrl() 70 ti_clk_ll_ops->clk_writel(v, &clk->clksel_reg); in omap4_dpllmx_deny_gatectrl() [all …]
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| /kernel/linux/linux-6.6/Documentation/ABI/testing/ |
| D | sysfs-bus-iio-vf610 | 3 Contact: linux-iio@vger.kernel.org 5 Specifies the hardware conversion mode used. The three 6 available modes are "normal", "high-speed" and "low-power", 7 where the last is the default mode. 12 Contact: linux-iio@vger.kernel.org 14 Specifies the hardware conversion mode used within DAC. 15 The two available modes are "high-power" and "low-power", 16 where "low-power" mode is the default mode.
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| /kernel/linux/linux-5.10/Documentation/ABI/testing/ |
| D | sysfs-bus-iio-vf610 | 3 Contact: linux-iio@vger.kernel.org 5 Specifies the hardware conversion mode used. The three 6 available modes are "normal", "high-speed" and "low-power", 7 where the last is the default mode. 12 Contact: linux-iio@vger.kernel.org 14 Specifies the hardware conversion mode used within DAC. 15 The two available modes are "high-power" and "low-power", 16 where "low-power" mode is the default mode.
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| /kernel/linux/linux-6.6/drivers/regulator/ |
| D | mcp16502.c | 1 // SPDX-License-Identifier: GPL-2.0 9 // Inspired from tps65086-regulator.c 29 * The PMIC has four sets of registers corresponding to four power modes: 30 * Performance, Active, Low-power, Hibernate. 33 * Each regulator has a register for each power mode. To access a register 34 * for a specific regulator and mode BASE_* and OFFSET_* need to be added. 41 * a low-power state while the PMIC is in Active mode. They are supposed to be 42 * configured at startup and then simply transition to/from a global low-power 43 * state by setting the GPIO lpm pin high/low. 45 * This driver keeps the PMIC in Active mode, Low-power state is set for the [all …]
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| /kernel/linux/linux-5.10/arch/arm/mach-omap2/ |
| D | omap-mpuss-lowpower.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * OMAP MPUSS low power code 8 * OMAP4430 MPUSS mainly consists of dual Cortex-A9 with per-CPU 11 * CPU0, CPU1 and MPUSS each have there own power domain and 12 * hence multiple low power combinations of MPUSS are possible. 15 * because the mode is not supported by hw constraints of dormant 16 * mode. While waking up from the dormant mode, a reset signal 17 * to the Cortex-A9 processor must be asserted by the external 18 * power controller. 21 * below modes are supported from power gain vs latency point of view. [all …]
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| /kernel/linux/linux-6.6/arch/arm/mach-omap2/ |
| D | omap-mpuss-lowpower.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * OMAP MPUSS low power code 8 * OMAP4430 MPUSS mainly consists of dual Cortex-A9 with per-CPU 11 * CPU0, CPU1 and MPUSS each have there own power domain and 12 * hence multiple low power combinations of MPUSS are possible. 15 * because the mode is not supported by hw constraints of dormant 16 * mode. While waking up from the dormant mode, a reset signal 17 * to the Cortex-A9 processor must be asserted by the external 18 * power controller. 21 * below modes are supported from power gain vs latency point of view. [all …]
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| /kernel/linux/linux-5.10/drivers/regulator/ |
| D | mcp16502.c | 1 // SPDX-License-Identifier: GPL-2.0 9 // Inspired from tps65086-regulator.c 29 * The PMIC has four sets of registers corresponding to four power modes: 30 * Performance, Active, Low-power, Hibernate. 33 * Each regulator has a register for each power mode. To access a register 34 * for a specific regulator and mode BASE_* and OFFSET_* need to be added. 41 * a low-power state while the PMIC is in Active mode. They are supposed to be 42 * configured at startup and then simply transition to/from a global low-power 43 * state by setting the GPIO lpm pin high/low. 45 * This driver keeps the PMIC in Active mode, Low-power state is set for the [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/iio/frequency/ |
| D | adf4350.txt | 4 - compatible: Should be one of 7 - reg: SPI chip select numbert for the device 8 - spi-max-frequency: Max SPI frequency to use (< 20000000) 9 - clocks: From common clock binding. Clock is phandle to clock for 13 - gpios: GPIO Lock detect - If set with a valid phandle and GPIO number, 15 - adi,channel-spacing: Channel spacing in Hz (influences MODULUS). 16 - adi,power-up-frequency: If set in Hz the PLL tunes to 18 - adi,reference-div-factor: If set the driver skips dynamic calculation 20 - adi,reference-doubler-enable: Enables reference doubler. 21 - adi,reference-div2-enable: Enables reference divider. [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/input/ |
| D | iqs626a.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jeff LaBundy <jeff@labundy.com> 13 The Azoteq IQS626A is a 14-channel capacitive touch controller that features 14 additional Hall-effect and inductive sensing capabilities. 19 - $ref: touchscreen/touchscreen.yaml# 31 "#address-cells": 34 "#size-cells": 37 azoteq,suspend-mode: [all …]
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| D | iqs269a.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jeff LaBundy <jeff@labundy.com> 13 The Azoteq IQS269A is an 8-channel capacitive touch controller that features 14 additional Hall-effect and inductive sensing capabilities. 28 "#address-cells": 31 "#size-cells": 34 azoteq,hall-enable: 37 Enables Hall-effect sensing on channels 6 and 7. In this case, keycodes [all …]
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| /kernel/linux/linux-6.6/sound/soc/codecs/ |
| D | wcd-clsh-v2.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 15 * bit 0: EAR mode 16 * bit 1: HPH Left mode 17 * bit 2: HPH Right mode 18 * bit 3: Lineout mode 32 CLS_H_NORMAL = 0, /* Class-H Default */ 33 CLS_H_HIFI, /* Class-H HiFi */ 34 CLS_H_LP, /* Class-H Low Power */ 35 CLS_AB, /* Class-AB */ 37 CLS_H_ULP, /* Ultra Low power */ [all …]
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