| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mfd/ |
| D | aspeed-lpc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/mfd/aspeed-lpc.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Aspeed Low Pin Count (LPC) Bus Controller 11 - Andrew Jeffery <andrew@aj.id.au> 12 - Chia-Wei Wang <chiawei_wang@aspeedtech.com> 15 The LPC bus is a means to bridge a host CPU to a number of low-bandwidth 17 primary use case of the Aspeed LPC controller is as a slave on the bus 21 The LPC controller is represented as a multi-function device to account for the [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/ipmi/ |
| D | aspeed,ast2400-kcs-bmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/ipmi/aspeed,ast2400-kcs-bmc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Andrew Jeffery <andrew@aj.id.au> 13 The Aspeed BMC SoCs typically use the Keyboard-Controller-Style (KCS) 14 interfaces on the LPC bus for in-band IPMI communication with their host. 19 - description: Channel ID derived from reg 22 - aspeed,ast2400-kcs-bmc-v2 23 - aspeed,ast2500-kcs-bmc-v2 [all …]
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| /kernel/linux/linux-6.6/Documentation/arch/loongarch/ |
| D | irq-chip-model.rst | 1 .. SPDX-License-Identifier: GPL-2.0 7 Currently, LoongArch based processors (e.g. Loongson-3A5000) can only work together 10 I/O Interrupt Controller), HTVECINTC (Hyper-Transport Vector Interrupt Controller), 11 PCH-PIC (Main Interrupt Controller in LS7A chipset), PCH-LPC (LPC Interrupt Controller 12 in LS7A chipset) and PCH-MSI (MSI Interrupt Controller). 14 CPUINTC is a per-core controller (in CPU), LIOINTC/EIOINTC/HTVECINTC are per-package 15 controllers (in CPU), while PCH-PIC/PCH-LPC/PCH-MSI are controllers out of CPU (i.e., 22 In this model, IPI (Inter-Processor Interrupt) and CPU Local Timer interrupt go 23 to CPUINTC directly, CPU UARTS interrupts go to LIOINTC, while all other devices 24 interrupts go to PCH-PIC/PCH-LPC/PCH-MSI and gathered by HTVECINTC, and then go [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/serial/ |
| D | 8250.yaml | 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - devicetree@vger.kernel.org 13 - $ref: serial.yaml# 14 - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml# 15 - if: 17 - required: 18 - aspeed,lpc-io-reg 19 - required: 20 - aspeed,lpc-interrupts [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/ipmi/ |
| D | aspeed-kcs-bmc.txt | 5 used to perform in-band IPMI communication with their host. 9 - compatible : should be one of 10 "aspeed,ast2400-kcs-bmc" 11 "aspeed,ast2500-kcs-bmc" 12 - interrupts : interrupt generated by the controller 13 - kcs_chan : The LPC channel number in the controller 14 - kcs_addr : The host CPU IO map address 18 - compatible : should be one of 19 "aspeed,ast2400-kcs-bmc-v2" 20 "aspeed,ast2500-kcs-bmc-v2" [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/rtc/ |
| D | rtc-st-lpc.txt | 1 STMicroelectronics Low Power Controller (LPC) - RTC 4 LPC currently supports Watchdog OR Real Time Clock OR Clocksource 8 [See: ../timer/st,stih407-lpc for Clocksource options] 12 - compatible : Must be: "st,stih407-lpc" 13 - reg : LPC registers base address + size 14 - interrupts : LPC interrupt line number and associated flags 15 - clocks : Clock used by LPC device (See: ../clock/clock-bindings.txt) 16 - st,lpc-mode : The LPC can run either one of three modes: 23 lpc@fde05000 { 24 compatible = "st,stih407-lpc"; [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/rtc/ |
| D | rtc-st-lpc.txt | 1 STMicroelectronics Low Power Controller (LPC) - RTC 4 LPC currently supports Watchdog OR Real Time Clock OR Clocksource 8 [See: ../timer/st,stih407-lpc for Clocksource options] 12 - compatible : Must be: "st,stih407-lpc" 13 - reg : LPC registers base address + size 14 - interrupts : LPC interrupt line number and associated flags 15 - clocks : Clock used by LPC device (See: ../clock/clock-bindings.txt) 16 - st,lpc-mode : The LPC can run either one of three modes: 23 lpc@fde05000 { 24 compatible = "st,stih407-lpc"; [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/timer/ |
| D | st,stih407-lpc | 1 STMicroelectronics Low Power Controller (LPC) - Clocksource 4 LPC currently supports Watchdog OR Real Time Clock OR Clocksource 8 [See: ../rtc/rtc-st-lpc.txt for RTC options] 12 - compatible : Must be: "st,stih407-lpc" 13 - reg : LPC registers base address + size 14 - interrupts : LPC interrupt line number and associated flags 15 - clocks : Clock used by LPC device (See: ../clock/clock-bindings.txt) 16 - st,lpc-mode : The LPC can run either one of three modes: 23 lpc@fde05000 { 24 compatible = "st,stih407-lpc"; [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/timer/ |
| D | st,stih407-lpc | 1 STMicroelectronics Low Power Controller (LPC) - Clocksource 4 LPC currently supports Watchdog OR Real Time Clock OR Clocksource 8 [See: ../rtc/rtc-st-lpc.txt for RTC options] 12 - compatible : Must be: "st,stih407-lpc" 13 - reg : LPC registers base address + size 14 - interrupts : LPC interrupt line number and associated flags 15 - clocks : Clock used by LPC device (See: ../clock/clock-bindings.txt) 16 - st,lpc-mode : The LPC can run either one of three modes: 23 lpc@fde05000 { 24 compatible = "st,stih407-lpc"; [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/watchdog/ |
| D | st_lpc_wdt.txt | 1 STMicroelectronics Low Power Controller (LPC) - Watchdog 4 LPC currently supports Watchdog OR Real Time Clock OR Clocksource 7 [See: ../rtc/rtc-st-lpc.txt for RTC options] 8 [See: ../timer/st,stih407-lpc for Clocksource options] 12 - compatible : Should be: "st,stih407-lpc" 13 - reg : LPC registers base address + size 14 - interrupts : LPC interrupt line number and associated flags 15 - clocks : Clock used by LPC device (See: ../clock/clock-bindings.txt) 16 - st,lpc-mode : The LPC can run either one of three modes: 24 - st,syscfg : Phandle to syscfg node used to enable watchdog and configure [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/watchdog/ |
| D | st_lpc_wdt.txt | 1 STMicroelectronics Low Power Controller (LPC) - Watchdog 4 LPC currently supports Watchdog OR Real Time Clock OR Clocksource 7 [See: ../rtc/rtc-st-lpc.txt for RTC options] 8 [See: ../timer/st,stih407-lpc for Clocksource options] 12 - compatible : Should be: "st,stih407-lpc" 13 - reg : LPC registers base address + size 14 - interrupts : LPC interrupt line number and associated flags 15 - clocks : Clock used by LPC device (See: ../clock/clock-bindings.txt) 16 - st,lpc-mode : The LPC can run either one of three modes: 24 - st,syscfg : Phandle to syscfg node used to enable watchdog and configure [all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | aspeed-g6.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h> 6 #include <dt-bindings/clock/ast2600-clock.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 13 interrupt-parent = <&gic>; 43 #address-cells = <1>; 44 #size-cells = <0>; 45 enable-method = "aspeed,ast2600-smp"; [all …]
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| D | aspeed-g4.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 2 #include <dt-bindings/clock/aspeed-clock.h> 7 #address-cells = <1>; 8 #size-cells = <1>; 9 interrupt-parent = <&vic>; 35 #address-cells = <1>; 36 #size-cells = <0>; 39 compatible = "arm,arm926ej-s"; 51 compatible = "simple-bus"; 52 #address-cells = <1>; [all …]
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| D | aspeed-g5.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 2 #include <dt-bindings/clock/aspeed-clock.h> 3 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h> 8 #address-cells = <1>; 9 #size-cells = <1>; 10 interrupt-parent = <&vic>; 36 #address-cells = <1>; 37 #size-cells = <0>; 40 compatible = "arm,arm1176jzf-s"; 52 compatible = "simple-bus"; [all …]
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| D | stih407-family.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 6 #include "stih407-pinctrl.dtsi" 7 #include <dt-bindings/mfd/st-lpc.h> 8 #include <dt-bindings/phy/phy.h> 9 #include <dt-bindings/reset/stih407-resets.h> 10 #include <dt-bindings/interrupt-controller/irq-st.h> 12 #address-cells = <1>; 13 #size-cells = <1>; 15 reserved-memory { 16 #address-cells = <1>; [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/ |
| D | lpc-eth.txt | 4 - compatible: Should be "nxp,lpc-eth" 5 - reg: Address and length of the register set for the device 6 - interrupts: Should contain ethernet controller interrupt 9 - phy-mode: See ethernet.txt file in the same directory. If the property is 11 - use-iram: Use LPC32xx internal SRAM (IRAM) for DMA buffering 14 - mdio : specifies the mdio bus, used as a container for phy nodes according to 21 compatible = "nxp,lpc-eth"; 23 interrupt-parent = <&mic>; 24 interrupts = <29 0>; 26 phy-mode = "rmii"; [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/ |
| D | lpc-eth.txt | 4 - compatible: Should be "nxp,lpc-eth" 5 - reg: Address and length of the register set for the device 6 - interrupts: Should contain ethernet controller interrupt 9 - phy-mode: See ethernet.txt file in the same directory. If the property is 11 - use-iram: Use LPC32xx internal SRAM (IRAM) for DMA buffering 14 - mdio : specifies the mdio bus, used as a container for phy nodes according to 21 compatible = "nxp,lpc-eth"; 23 interrupt-parent = <&mic>; 24 interrupts = <29 0>; 26 phy-mode = "rmii"; [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/aspeed/ |
| D | aspeed-g4.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 2 #include <dt-bindings/clock/aspeed-clock.h> 7 #address-cells = <1>; 8 #size-cells = <1>; 9 interrupt-parent = <&vic>; 35 #address-cells = <1>; 36 #size-cells = <0>; 39 compatible = "arm,arm926ej-s"; 51 compatible = "simple-bus"; 52 #address-cells = <1>; [all …]
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| D | aspeed-g6.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h> 6 #include <dt-bindings/clock/ast2600-clock.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 13 interrupt-parent = <&gic>; 47 #address-cells = <1>; 48 #size-cells = <0>; 49 enable-method = "aspeed,ast2600-smp"; [all …]
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| D | aspeed-g5.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 2 #include <dt-bindings/clock/aspeed-clock.h> 3 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h> 8 #address-cells = <1>; 9 #size-cells = <1>; 10 interrupt-parent = <&vic>; 36 #address-cells = <1>; 37 #size-cells = <0>; 40 compatible = "arm,arm1176jzf-s"; 52 compatible = "simple-bus"; [all …]
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| D | aspeed-bmc-amd-ethanolx.dts | 1 // SPDX-License-Identifier: GPL-2.0 4 /dts-v1/; 6 #include "aspeed-g5.dtsi" 7 #include <dt-bindings/gpio/aspeed-gpio.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 12 compatible = "amd,ethanolx-bmc", "aspeed,ast2500"; 18 reserved-memory { 19 #address-cells = <1>; 20 #size-cells = <1>; 26 compatible = "shared-dma-pool"; [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/st/ |
| D | stih407-family.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 6 #include "stih407-pinctrl.dtsi" 7 #include <dt-bindings/mfd/st-lpc.h> 8 #include <dt-bindings/phy/phy.h> 9 #include <dt-bindings/reset/stih407-resets.h> 10 #include <dt-bindings/interrupt-controller/irq-st.h> 12 #address-cells = <1>; 13 #size-cells = <1>; 15 reserved-memory { 16 #address-cells = <1>; [all …]
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| /kernel/linux/linux-6.6/drivers/tty/serial/8250/ |
| D | 8250_aspeed_vuart.c | 1 // SPDX-License-Identifier: GPL-2.0+ 62 * to the host on the Host <-> BMC LPC bus. It could be different on a 68 return readb(vuart->port->port.membase + reg); in aspeed_vuart_readb() 73 writeb(val, vuart->port->port.membase + reg); in aspeed_vuart_writeb() 91 return -EINVAL; in aspeed_vuart_set_lpc_address() 135 return -EINVAL; in aspeed_vuart_set_sirq() 251 struct aspeed_vuart *vuart = uart_8250_port->port.private_data; in aspeed_vuart_startup() 266 struct aspeed_vuart *vuart = uart_8250_port->port.private_data; in aspeed_vuart_shutdown() 279 lockdep_assert_held_once(&up->port.lock); in __aspeed_vuart_set_throttle() 281 up->ier &= ~irqs; in __aspeed_vuart_set_throttle() [all …]
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| /kernel/linux/linux-5.10/drivers/char/ |
| D | dtlk.c | 1 // SPDX-License-Identifier: GPL-2.0-only 2 /* -*- linux-c -*- 3 * dtlk.c - DoubleTalk PC driver for Linux 8 * 2000-03-18 Jim Van Zandt: Fix polling. 20 The DoubleTalk PC contains four voice synthesizers: text-to-speech 21 (TTS), linear predictive coding (LPC), PCM/ADPCM, and CVSD. It 22 also has a tone generator. Output data for LPC are written to the 23 LPC port, and output data for the other modes are written to the 29 of the speech) are read from the LPC port. Not all models of the 30 DoubleTalk PC implement index markers. Both the TTS and LPC ports [all …]
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| /kernel/linux/linux-6.6/drivers/char/ |
| D | dtlk.c | 1 // SPDX-License-Identifier: GPL-2.0-only 2 /* -*- linux-c -*- 3 * dtlk.c - DoubleTalk PC driver for Linux 8 * 2000-03-18 Jim Van Zandt: Fix polling. 20 The DoubleTalk PC contains four voice synthesizers: text-to-speech 21 (TTS), linear predictive coding (LPC), PCM/ADPCM, and CVSD. It 22 also has a tone generator. Output data for LPC are written to the 23 LPC port, and output data for the other modes are written to the 29 of the speech) are read from the LPC port. Not all models of the 30 DoubleTalk PC implement index markers. Both the TTS and LPC ports [all …]
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