| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/ddr/ |
| D | lpddr3.txt | 1 * LPDDR3 SDRAM memories compliant to JEDEC JESD209-3C
4 - compatible : Should be "<vendor>,<type>", and generic value "jedec,lpddr3".
8 - density : <u32> representing density in Mb (Mega bits)
9 - io-width : <u32> representing bus width. Possible values are 8, 16, 32, 64
10 - #address-cells: Must be set to 1
11 - #size-cells: Must be set to 0
17 These values shall be obtained from the device data-sheet.
18 - tRFC-min-tck
19 - tRRD-min-tck
20 - tRPab-min-tck
[all …]
|
| D | lpddr3-timings.txt | 1 * AC timing parameters of LPDDR3 memories for a given speed-bin.
6 - compatible : Should be "jedec,lpddr3-timings"
7 - min-freq : minimum DDR clock frequency for the speed-bin. Type is <u32>
8 - reg : maximum DDR clock frequency for the speed-bin. Type is <u32>
13 data-sheet of the device for a given speed-bin. All these properties are
15 - tRFC
16 - tRRD
17 - tRPab
18 - tRPpb
19 - tRCD
[all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/memory-controllers/ddr/ |
| D | jedec,lpddr3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: LPDDR3 SDRAM compliant to JEDEC JESD209-3
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 - $ref: jedec,lpddr-props.yaml#
18 - items:
19 - enum:
20 - samsung,K3QF2F20DB
[all …]
|
| D | jedec,lpddr3-timings.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr3-timings.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: LPDDR3 SDRAM AC timing parameters for a given speed-bin
10 - Krzysztof Kozlowski <krzk@kernel.org>
14 const: jedec,lpddr3-timings
19 Maximum DDR clock frequency for the speed-bin, in Hz.
20 Property is deprecated, use max-freq.
23 max-freq:
[all …]
|
| /kernel/linux/linux-5.10/drivers/memory/ |
| D | of_memory.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
19 * of_get_min_tck() - extract min timing values for ddr
26 * default min timings provided by JEDEC.
38 ret |= of_property_read_u32(np, "tRPab-min-tck", &min->tRPab); in of_get_min_tck()
39 ret |= of_property_read_u32(np, "tRCD-min-tck", &min->tRCD); in of_get_min_tck()
40 ret |= of_property_read_u32(np, "tWR-min-tck", &min->tWR); in of_get_min_tck()
41 ret |= of_property_read_u32(np, "tRASmin-min-tck", &min->tRASmin); in of_get_min_tck()
42 ret |= of_property_read_u32(np, "tRRD-min-tck", &min->tRRD); in of_get_min_tck()
43 ret |= of_property_read_u32(np, "tWTR-min-tck", &min->tWTR); in of_get_min_tck()
44 ret |= of_property_read_u32(np, "tXP-min-tck", &min->tXP); in of_get_min_tck()
[all …]
|
| D | jedec_ddr.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
64 /* Refresh rate in nano-seconds */
123 * Structure for timings from the LPDDR2 datasheet
174 * Structure for timings for LPDDR3 based on LPDDR2 plus additional fields.
|
| /kernel/linux/linux-6.6/drivers/memory/ |
| D | of_memory.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
19 * of_get_min_tck() - extract min timing values for ddr
26 * default min timings provided by JEDEC.
38 ret |= of_property_read_u32(np, "tRPab-min-tck", &min->tRPab); in of_get_min_tck()
39 ret |= of_property_read_u32(np, "tRCD-min-tck", &min->tRCD); in of_get_min_tck()
40 ret |= of_property_read_u32(np, "tWR-min-tck", &min->tWR); in of_get_min_tck()
41 ret |= of_property_read_u32(np, "tRASmin-min-tck", &min->tRASmin); in of_get_min_tck()
42 ret |= of_property_read_u32(np, "tRRD-min-tck", &min->tRRD); in of_get_min_tck()
43 ret |= of_property_read_u32(np, "tWTR-min-tck", &min->tWTR); in of_get_min_tck()
44 ret |= of_property_read_u32(np, "tXP-min-tck", &min->tXP); in of_get_min_tck()
[all …]
|
| D | jedec_ddr.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
64 /* Refresh rate in nano-seconds */
143 * Structure for timings from the LPDDR2 datasheet
207 * -ENOENT if info unavailable.
221 * Structure for timings for LPDDR3 based on LPDDR2 plus additional fields.
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/memory-controllers/ |
| D | nvidia,tegra124-mc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra124-mc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jon Hunter <jonathanh@nvidia.com>
11 - Thierry Reding <thierry.reding@gmail.com>
14 Tegra124 SoC features a hybrid 2x32-bit / 1x64-bit memory controller.
18 for DDR3L and LPDDR3 SDRAMs.
22 const: nvidia,tegra124-mc
30 clock-names:
[all …]
|
| D | nvidia,tegra30-emc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra30-emc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dmitry Osipenko <digetx@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12 - Thierry Reding <thierry.reding@gmail.com>
15 The EMC interfaces with the off-chip SDRAM to service the request stream
16 sent from Memory Controller. The EMC also has various performance-affecting
19 LPDDR3, and DDR3.
[all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/memory-controllers/ |
| D | nvidia,tegra124-mc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra124-mc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jon Hunter <jonathanh@nvidia.com>
11 - Thierry Reding <thierry.reding@gmail.com>
14 Tegra124 SoC features a hybrid 2x32-bit / 1x64-bit memory controller.
18 for DDR3L and LPDDR3 SDRAMs.
22 const: nvidia,tegra124-mc
30 clock-names:
[all …]
|
| D | nvidia,tegra30-emc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra30-emc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dmitry Osipenko <digetx@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12 - Thierry Reding <thierry.reding@gmail.com>
15 The EMC interfaces with the off-chip SDRAM to service the request stream
16 sent from Memory Controller. The EMC also has various performance-affecting
19 LPDDR3, and DDR3.
[all …]
|
| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | exynos5422-odroid-core.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 * Hardkernel Odroid XU3/XU3-Lite/XU4/HC1 boards core device tree source
6 * Copyright (c) 2013-2017 Samsung Electronics Co., Ltd.
10 #include <dt-bindings/clock/samsung,s2mps11.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
14 #include "exynos5422-cpus.dtsi"
23 stdout-path = "serial2:115200n8";
27 compatible = "samsung,secure-firmware";
31 fixed-rate-clocks {
[all …]
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/samsung/ |
| D | exynos5422-odroid-core.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 * Hardkernel Odroid XU3/XU3-Lite/XU4/HC1 boards core device tree source
6 * Copyright (c) 2013-2017 Samsung Electronics Co., Ltd.
10 #include <dt-bindings/clock/samsung,s2mps11.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
14 #include "exynos5422-cpus.dtsi"
27 stdout-path = "serial2:115200n8";
31 compatible = "samsung,secure-firmware";
35 fixed-rate-clocks {
[all …]
|
| /kernel/linux/linux-5.10/drivers/memory/tegra/ |
| D | tegra124-emc.c | 1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/clk-provider.h>
476 struct emc_timing *timings; member
491 writel(value, emc->regs + EMC_CCFIFO_DATA); in emc_ccfifo_writel()
492 writel(offset, emc->regs + EMC_CCFIFO_ADDR); in emc_ccfifo_writel()
500 writel(1, emc->regs + EMC_TIMING_CONTROL); in emc_seq_update_timing()
503 value = readl(emc->regs + EMC_STATUS); in emc_seq_update_timing()
509 dev_err(emc->dev, "timing update timed out\n"); in emc_seq_update_timing()
517 writel(0, emc->regs + EMC_AUTO_CAL_INTERVAL); in emc_seq_disable_auto_cal()
520 value = readl(emc->regs + EMC_AUTO_CAL_STATUS); in emc_seq_disable_auto_cal()
[all …]
|
| /kernel/linux/linux-6.6/drivers/memory/tegra/ |
| D | tegra124-emc.c | 1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/clk-provider.h>
15 #include <linux/interconnect-provider.h>
495 struct emc_timing *timings; member
512 /* protect shared rate-change code path */
521 writel(value, emc->regs + EMC_CCFIFO_DATA); in emc_ccfifo_writel()
522 writel(offset, emc->regs + EMC_CCFIFO_ADDR); in emc_ccfifo_writel()
530 writel(1, emc->regs + EMC_TIMING_CONTROL); in emc_seq_update_timing()
533 value = readl(emc->regs + EMC_STATUS); in emc_seq_update_timing()
539 dev_err(emc->dev, "timing update timed out\n"); in emc_seq_update_timing()
[all …]
|
| /kernel/linux/patches/linux-5.10/yangfan_patch/ |
| D | drivers.patch | 1 diff --git a/drivers/Makefile b/drivers/Makefile
3 --- a/drivers/Makefile
5 @@ -6,6 +6,8 @@
6 # Rewritten to use lists instead of if-statements.
11 obj-y += irqchip/
12 obj-y += bus/
14 diff --git a/drivers/block/nbd.c b/drivers/block/nbd.c
16 --- a/drivers/block/nbd.c
18 @@ -2398,12 +2398,6 @@ static int nbd_genl_status(struct sk_buff *skb, struct genl_info *info)
22 - if (!dev_list) {
[all …]
|