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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/
Dfsl,ls-extirq.txt3 Some Layerscape SOCs (LS1021A, LS1043A, LS1046A) support inverting
7 Supplemental Configuration Unit (SCFG).
10 - compatible: should be "fsl,<soc-name>-extirq", e.g. "fsl,ls1021a-extirq".
11 - #interrupt-cells: Must be 2. The first element is the index of the
13 - #address-cells: Must be 0.
14 - interrupt-controller: Identifies the node as an interrupt controller
15 - reg: Specifies the Interrupt Polarity Control Register (INTPCR) in
16 the SCFG.
17 - interrupt-map: Specifies the mapping from external interrupts to GIC
19 - interrupt-map-mask: Must be <0xffffffff 0>.
[all …]
Dfsl,ls-scfg-msi.txt1 * Freescale Layerscape SCFG PCIe MSI controller
5 - compatible: should be "fsl,<soc-name>-msi" to identify
7 "fsl,ls1021a-msi"
8 "fsl,ls1043a-msi"
9 "fsl,ls1046a-msi"
10 "fsl,ls1043a-v1.1-msi"
11 "fsl,ls1012a-msi"
12 - msi-controller: indicates that this is a PCIe MSI controller node
13 - reg: physical base address of the controller and length of memory mapped.
14 - interrupts: an interrupt to the parent interrupt controller.
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/freescale/
Dfsl,layerscape-scfg.txt1 Freescale SCFG
3 SCFG is the supplemental configuration unit, that provides SoC specific
8 - compatible: Should contain a chip-specific compatible string,
9 Chip-specific strings are of the form "fsl,<chip>-scfg",
11 ls1012a, ls1021a, ls1043a, ls1046a, ls2080a.
13 - reg: should contain base address and length of SCFG memory-mapped registers
16 scfg: scfg@1570000 {
17 compatible = "fsl,ls1021a-scfg";
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/soc/fsl/
Dfsl,layerscape-scfg.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/fsl/fsl,layerscape-scfg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
11 - Li Yang <leoyang.li@nxp.com>
14 SCFG is the supplemental configuration unit, that provides SoC specific
21 - enum:
22 - fsl,ls1012a-scfg
23 - fsl,ls1021a-scfg
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pci/
Dlayerscape-pci.txt4 and thus inherits all the common properties defined in designware-pcie.txt.
7 which is used to describe the PLL settings at the time of chip-reset.
15 - compatible: should contain the platform identifier such as:
17 "fsl,ls1021a-pcie"
18 "fsl,ls2080a-pcie", "fsl,ls2085a-pcie"
19 "fsl,ls2088a-pcie"
20 "fsl,ls1088a-pcie"
21 "fsl,ls1046a-pcie"
22 "fsl,ls1043a-pcie"
23 "fsl,ls1012a-pcie"
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/nxp/ls/
Dls1021a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright 2013-2014 Freescale Semiconductor, Inc.
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/thermal/thermal.h>
10 #address-cells = <2>;
11 #size-cells = <2>;
12 interrupt-parent = <&gic>;
30 #address-cells = <1>;
31 #size-cells = <0>;
34 compatible = "arm,cortex-a7";
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dls1021a.dtsi2 * Copyright 2013-2014 Freescale Semiconductor, Inc.
4 * This file is dual-licensed: you can use it either under the terms
22 * MA 02110-1301 USA
48 #include <dt-bindings/interrupt-controller/arm-gic.h>
49 #include <dt-bindings/thermal/thermal.h>
52 #address-cells = <2>;
53 #size-cells = <2>;
54 compatible = "fsl,ls1021a";
55 interrupt-parent = <&gic>;
73 #address-cells = <1>;
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/fsl-dcu/
Dfsl_dcu_drm_drv.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #include <linux/clk-provider.h>
55 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; in fsl_dcu_irq_reset()
57 regmap_write(fsl_dev->regmap, DCU_INT_STATUS, ~0); in fsl_dcu_irq_reset()
58 regmap_write(fsl_dev->regmap, DCU_INT_MASK, ~0); in fsl_dcu_irq_reset()
64 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; in fsl_dcu_drm_irq()
68 ret = regmap_read(fsl_dev->regmap, DCU_INT_STATUS, &int_status); in fsl_dcu_drm_irq()
70 dev_err(dev->dev, "read DCU_INT_STATUS failed\n"); in fsl_dcu_drm_irq()
77 regmap_write(fsl_dev->regmap, DCU_INT_STATUS, int_status); in fsl_dcu_drm_irq()
85 return -ENOTCONN; in fsl_dcu_irq_install()
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/freescale/
Dfsl-ls1043a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1043A family SoC.
5 * Copyright 2014-2015 Freescale Semiconductor, Inc.
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/thermal/thermal.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/gpio/gpio.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
[all …]
Dfsl-ls1046a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1046A family SoC.
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
14 #include <dt-bindings/gpio/gpio.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
37 #address-cells = <1>;
[all …]
Dfsl-ls1012a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1012A family SoC.
6 * Copyright 2019-2020 NXP
10 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
23 rtic-a = &rtic_a;
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/interrupt-controller/
Dfsl,ls-extirq.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/fsl,ls-extirq.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
11 - Li Yang <leoyang.li@nxp.com>
14 Some Layerscape SOCs (LS1021A, LS1043A, LS1046A LS1088A, LS208xA,
21 - enum:
22 - fsl,ls1021a-extirq
23 - fsl,ls1043a-extirq
[all …]
Dfsl,ls-scfg-msi.txt1 * Freescale Layerscape SCFG PCIe MSI controller
5 - compatible: should be "fsl,<soc-name>-msi" to identify
7 "fsl,ls1021a-msi"
8 "fsl,ls1043a-msi"
9 "fsl,ls1046a-msi"
10 "fsl,ls1043a-v1.1-msi"
11 "fsl,ls1012a-msi"
12 - msi-controller: indicates that this is a PCIe MSI controller node
13 - reg: physical base address of the controller and length of memory mapped.
14 - interrupts: an interrupt to the parent interrupt controller.
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pci/
Dlayerscape-pci.txt4 and thus inherits all the common properties defined in snps,dw-pcie.yaml.
7 which is used to describe the PLL settings at the time of chip-reset.
15 - compatible: should contain the platform identifier such as:
17 "fsl,ls1021a-pcie"
18 "fsl,ls2080a-pcie", "fsl,ls2085a-pcie"
19 "fsl,ls2088a-pcie"
20 "fsl,ls1088a-pcie"
21 "fsl,ls1046a-pcie"
22 "fsl,ls1043a-pcie"
23 "fsl,ls1012a-pcie"
[all …]
/kernel/linux/linux-5.10/drivers/pci/controller/dwc/
Dpci-layerscape.c1 // SPDX-License-Identifier: GPL-2.0
23 #include "pcie-designware.h"
34 #define PCIE_ABSERR_SETTING 0x9401 /* Forward error of non-posted request */
49 struct regmap *scfg; member
54 #define to_ls_pcie(x) dev_get_drvdata((x)->dev)
58 struct dw_pcie *pci = pcie->pci; in ls_pcie_is_bridge()
61 header_type = ioread8(pci->dbi_base + PCI_HEADER_TYPE); in ls_pcie_is_bridge()
67 /* Clear multi-function bit */
70 struct dw_pcie *pci = pcie->pci; in ls_pcie_clear_multifunction()
72 iowrite8(PCI_HEADER_TYPE_BRIDGE, pci->dbi_base + PCI_HEADER_TYPE); in ls_pcie_clear_multifunction()
[all …]
/kernel/linux/linux-6.6/drivers/soc/fsl/
Drcpm.c1 // SPDX-License-Identifier: GPL-2.0
3 // rcpm.c - Freescale QorIQ RCPM driver
5 // Copyright 2019-2020 NXP
34 np = of_find_compatible_node(NULL, NULL, "fsl,ls1021a-scfg"); in copy_ippdexpcr1_setting()
50 * rcpm_pm_prepare - performs device-level tasks associated with power
61 struct device_node *np = dev->of_node; in rcpm_pm_prepare()
67 return -EINVAL; in rcpm_pm_prepare()
69 base = rcpm->ippdexpcr_base; in rcpm_pm_prepare()
76 if (!ws->dev || !ws->dev->parent) in rcpm_pm_prepare()
79 ret = device_property_read_u32_array(ws->dev->parent, in rcpm_pm_prepare()
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/
Dfsl-ls1046a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1046A family SoC.
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
35 #address-cells = <1>;
36 #size-cells = <0>;
40 compatible = "arm,cortex-a72";
[all …]
Dfsl-ls1043a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1043A family SoC.
5 * Copyright 2014-2015 Freescale Semiconductor, Inc.
11 #include <dt-bindings/thermal/thermal.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
34 #address-cells = <1>;
35 #size-cells = <0>;
[all …]
Dfsl-ls1012a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1012A family SoC.
6 * Copyright 2019-2020 NXP
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/thermal/thermal.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
22 rtic-a = &rtic_a;
23 rtic-b = &rtic_b;
[all …]
Dfsl-ls1028a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1028A family SoC.
5 * Copyright 2018-2020 NXP
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
25 #address-cells = <1>;
26 #size-cells = <0>;
[all …]
/kernel/linux/linux-6.6/drivers/irqchip/
Dirq-ls-extirq.c1 // SPDX-License-Identifier: GPL-2.0
3 #define pr_fmt(fmt) "irq-ls-extirq: " fmt
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
33 * IRQ descriptors, making sure the read-modify-write is atomic. in ls_extirq_intpcr_rmw()
35 raw_spin_lock(&priv->lock); in ls_extirq_intpcr_rmw()
37 if (priv->big_endian) in ls_extirq_intpcr_rmw()
38 intpcr = ioread32be(priv->intpcr); in ls_extirq_intpcr_rmw()
40 intpcr = ioread32(priv->intpcr); in ls_extirq_intpcr_rmw()
45 if (priv->big_endian) in ls_extirq_intpcr_rmw()
46 iowrite32be(intpcr, priv->intpcr); in ls_extirq_intpcr_rmw()
[all …]
Dirq-ls-scfg-msi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Freescale SCFG MSI(-X) support
76 if (p && strncmp(p, "no-affinity", 11) == 0) in early_parse_ls_scfg_msi()
89 msg->address_hi = upper_32_bits(msi_data->msiir_addr); in ls_scfg_msi_compose_msg()
90 msg->address_lo = lower_32_bits(msi_data->msiir_addr); in ls_scfg_msi_compose_msg()
91 msg->data = data->hwirq; in ls_scfg_msi_compose_msg()
97 msg->data |= cpumask_first(mask); in ls_scfg_msi_compose_msg()
110 return -EINVAL; in ls_scfg_msi_set_affinity()
117 if (cpu >= msi_data->msir_num) in ls_scfg_msi_set_affinity()
118 return -EINVAL; in ls_scfg_msi_set_affinity()
[all …]
/kernel/linux/linux-5.10/drivers/irqchip/
Dirq-ls-scfg-msi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Freescale SCFG MSI(-X) support
21 #include <linux/dma-iommu.h>
76 if (p && strncmp(p, "no-affinity", 11) == 0) in early_parse_ls_scfg_msi()
89 msg->address_hi = upper_32_bits(msi_data->msiir_addr); in ls_scfg_msi_compose_msg()
90 msg->address_lo = lower_32_bits(msi_data->msiir_addr); in ls_scfg_msi_compose_msg()
91 msg->data = data->hwirq; in ls_scfg_msi_compose_msg()
97 msg->data |= cpumask_first(mask); in ls_scfg_msi_compose_msg()
110 return -EINVAL; in ls_scfg_msi_set_affinity()
117 if (cpu >= msi_data->msir_num) in ls_scfg_msi_set_affinity()
[all …]
/kernel/linux/linux-6.6/drivers/mmc/host/
Dsdhci-of-esdhc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
22 #include <linux/dma-mapping.h>
26 #include "sdhci-pltfm.h"
27 #include "sdhci-esdhc.h"
71 { .compatible = "fsl,ls1021a-esdhc", .data = &ls1021a_esdhc_clk},
72 { .compatible = "fsl,ls1043a-esdhc", .data = &ls1043a_esdhc_clk},
73 { .compatible = "fsl,ls1046a-esdhc", .data = &ls1046a_esdhc_clk},
74 { .compatible = "fsl,ls1012a-esdhc", .data = &ls1012a_esdhc_clk},
75 { .compatible = "fsl,p1010-esdhc", .data = &p1010_esdhc_clk},
76 { .compatible = "fsl,mpc8379-esdhc" },
[all …]
/kernel/linux/linux-5.10/drivers/mmc/host/
Dsdhci-of-esdhc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
22 #include <linux/dma-mapping.h>
26 #include "sdhci-pltfm.h"
27 #include "sdhci-esdhc.h"
65 { .compatible = "fsl,ls1021a-esdhc", .data = &ls1021a_esdhc_clk},
66 { .compatible = "fsl,ls1046a-esdhc", .data = &ls1046a_esdhc_clk},
67 { .compatible = "fsl,ls1012a-esdhc", .data = &ls1012a_esdhc_clk},
68 { .compatible = "fsl,p1010-esdhc", .data = &p1010_esdhc_clk},
69 { .compatible = "fsl,mpc8379-esdhc" },
70 { .compatible = "fsl,mpc8536-esdhc" },
[all …]

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