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/kernel/linux/linux-6.6/drivers/gpu/drm/gma500/
Doaktrail.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2007-2011, Intel Corporation.
16 u8 hblank_hi:4;
17 u8 hactive_hi:4;
20 u8 vblank_hi:4;
21 u8 vactive_hi:4;
24 u8 vsync_pulse_width_lo:4;
25 u8 vsync_offset_lo:4;
32 u8 height_mm_hi:4;
33 u8 width_mm_hi:4;
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Dintel_bios.h1 /* SPDX-License-Identifier: GPL-2.0-only */
22 u32 aim_offset[4]; /**< from beginning of VBT */
41 u8 rsvd3[4];
60 #define BDB_MODE_SUPPORT_LIST 4
92 /* bits 1 */
99 /* bits 2 */
107 /* bits 3 */
112 /* bits 4 */
115 /* bits 5 */
124 /* pre-915 */
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Doaktrail_lvds.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright © 2006-2009 Intel Corporation
14 #include <asm/intel-mid.h>
26 /* The max/min PWM frequency in BPCR[31:17] - */
28 * 15-bit field of the and then*/
29 /* shifts to the left by one bit to get the actual 16-bit
30 * value that the 15-bits correspond to.*/
53 dev_priv->is_lvds_on = true; in oaktrail_lvds_set_power()
54 if (dev_priv->ops->lvds_bl_power) in oaktrail_lvds_set_power()
55 dev_priv->ops->lvds_bl_power(dev, true); in oaktrail_lvds_set_power()
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/kernel/linux/linux-5.10/drivers/gpu/drm/gma500/
Doaktrail.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2007-2011, Intel Corporation.
16 u8 hblank_hi:4;
17 u8 hactive_hi:4;
20 u8 vblank_hi:4;
21 u8 vactive_hi:4;
24 u8 vsync_pulse_width_lo:4;
25 u8 vsync_offset_lo:4;
32 u8 height_mm_hi:4;
33 u8 width_mm_hi:4;
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Dintel_bios.h1 /* SPDX-License-Identifier: GPL-2.0-only */
22 u32 aim_offset[4]; /**< from beginning of VBT */
41 u8 rsvd3[4];
60 #define BDB_MODE_SUPPORT_LIST 4
92 /* bits 1 */
99 /* bits 2 */
107 /* bits 3 */
112 /* bits 4 */
115 /* bits 5 */
124 /* pre-915 */
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Doaktrail_lvds.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright © 2006-2009 Intel Corporation
14 #include <asm/intel-mid.h>
24 /* The max/min PWM frequency in BPCR[31:17] - */
26 * 15-bit field of the and then*/
27 /* shifts to the left by one bit to get the actual 16-bit
28 * value that the 15-bits correspond to.*/
40 struct drm_psb_private *dev_priv = dev->dev_private; in oaktrail_lvds_set_power()
51 dev_priv->is_lvds_on = true; in oaktrail_lvds_set_power()
52 if (dev_priv->ops->lvds_bl_power) in oaktrail_lvds_set_power()
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/kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/
Dintel_vbt_defs.h2 * Copyright © 2006-2016 Intel Corporation
43 * struct vbt_header - VBT Header structure
51 * @aim_offset: Offsets of add-in data blocks from beginning of VBT
61 u32 aim_offset[4];
65 * struct bdb_header - BDB Header structure
87 BDB_MODE_SUPPORT_LIST = 4,
123 * Block 1 - General Bit Definitions
127 /* bits 1 */
134 /* bits 2 */
144 /* bits 3 */
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Ddvo_ch7017.c63 #define CH7017_DAC3_POWER_DOWN (1 << 4)
64 /** Powers down the TV out block, and DAC0-3 */
87 /**< Low bits of horizontal active pixel input */
90 /** High bits of horizontal active pixel input */
92 /** High bits of vertical active line output */
96 /**< Low bits of vertical active line output */
99 /**< Low bits of horizontal active pixel output */
102 /** High bits of horizontal active pixel output */
104 /** Enables the LVDS power down state transition */
106 /** Enables the LVDS upscaler */
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/kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/
Ddvo_ch7017.c63 #define CH7017_DAC3_POWER_DOWN (1 << 4)
64 /** Powers down the TV out block, and DAC0-3 */
87 /**< Low bits of horizontal active pixel input */
90 /** High bits of horizontal active pixel input */
92 /** High bits of vertical active line output */
96 /**< Low bits of vertical active line output */
99 /**< Low bits of horizontal active pixel output */
102 /** High bits of horizontal active pixel output */
104 /** Enables the LVDS power down state transition */
106 /** Enables the LVDS upscaler */
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Dintel_vbt_defs.h2 * Copyright © 2006-2016 Intel Corporation
43 * struct vbt_header - VBT Header structure
51 * @aim_offset: Offsets of add-in data blocks from beginning of VBT
61 u32 aim_offset[4];
65 * struct bdb_header - BDB Header structure
85 * <start>-<end>
101 BDB_MODE_SUPPORT_LIST = 4,
137 * Block 1 - General Bit Definitions
141 /* bits 1 */
148 /* bits 2 */
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Dintel_lvds_regs.h1 /* SPDX-License-Identifier: MIT */
11 /* LVDS port control */
12 #define LVDS _MMIO(0x61180) macro
14 * Enables the LVDS port. This bit must be set before DPLLs are enabled, as
15 * the DPLL semantics change when the LVDS is assigned to that pipe.
18 /* Selects pipe B for LVDS data. Must be set on pre-965. */
23 /* LVDS dithering flag on 965/g4x platform */
25 /* LVDS sync polarity flags. Set to invert (i.e. negative) */
29 /* Enable border for unscaled (or aspect-scaled) display */
32 * Enables the A0-A2 data pairs and CLKA, containing 18 bits of color data per
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/panel/
Dlvds.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/panel/lvds.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: LVDS Display Panel
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
11 - Thierry Reding <thierry.reding@gmail.com>
14 LVDS is a physical layer specification defined in ANSI/TIA/EIA-644-A. Multiple
16 to LVDS panels. This bindings supports display panels compatible with the
19 [JEIDA] "Digital Interface Standards for Monitor", JEIDA-59-1999, February
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/
Dlvds.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/lvds.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: LVDS Display Common Properties
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
11 - Thierry Reding <thierry.reding@gmail.com>
14 LVDS is a physical layer specification defined in ANSI/TIA/EIA-644-A. Multiple
16 to LVDS devices. This bindings supports devices compatible with the following
19 [JEIDA] "Digital Interface Standards for Monitor", JEIDA-59-1999, February
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Dxylon,logicvc-display.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/display/xylon,logicvc-display.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Paul Kocialkowski <paul.kocialkowski@bootlin.com>
16 with Xilinx Zynq-7000 SoCs and Xilinx FPGAs.
20 synthesis time. As a result, many of the device-tree bindings are meant to
24 Layers are declared in the "layers" sub-node and have dedicated configuration.
26 starting from the video memory base address for its framebuffer. In version 4,
32 - xylon,logicvc-3.02.a-display
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/imx/
Dldb.txt1 Device-Tree bindings for LVDS Display Bridge (ldb)
3 LVDS Display Bridge
6 The LVDS Display Bridge device tree node contains up to two lvds-channel
7 nodes describing each of the two LVDS encoder channels of the bridge.
10 - #address-cells : should be <1>
11 - #size-cells : should be <0>
12 - compatible : should be "fsl,imx53-ldb" or "fsl,imx6q-ldb".
15 interfaces as input for each LVDS channel.
16 - gpr : should be <&gpr> on i.MX53 and i.MX6q.
17 The phandle points to the iomuxc-gpr region containing the LVDS
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/imx/
Dldb.txt1 Device-Tree bindings for LVDS Display Bridge (ldb)
3 LVDS Display Bridge
6 The LVDS Display Bridge device tree node contains up to two lvds-channel
7 nodes describing each of the two LVDS encoder channels of the bridge.
10 - #address-cells : should be <1>
11 - #size-cells : should be <0>
12 - compatible : should be "fsl,imx53-ldb" or "fsl,imx6q-ldb".
15 interfaces as input for each LVDS channel.
16 - gpr : should be <&gpr> on i.MX53 and i.MX6q.
17 The phandle points to the iomuxc-gpr region containing the LVDS
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/
Dnouveau_bios.c2 * Copyright 2005-2006 Erik Waling
4 * Copyright 2007-2009 Stuart Bennett
30 #include <linux/io-mapping.h>
40 #define BIOSLOG(sip, fmt, arg...) NV_DEBUG(sip->dev, fmt, ##arg)
71 if (bios->major_version < 5) /* pre BIT */ in clkcmptable()
74 compare_record_len = 4; in clkcmptable()
77 compareclk = ROM16(bios->data[clktable + compare_record_len * i]); in clkcmptable()
79 if (bios->major_version < 5) { in clkcmptable()
80 uint8_t tmdssub = bios->data[clktable + 2 + compare_record_len * i]; in clkcmptable()
81 scriptptr = ROM16(bios->data[bios->init_script_tbls_ptr + tmdssub * 2]); in clkcmptable()
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/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/
Dnouveau_bios.c2 * Copyright 2005-2006 Erik Waling
4 * Copyright 2007-2009 Stuart Bennett
31 #include <linux/io-mapping.h>
41 #define BIOSLOG(sip, fmt, arg...) NV_DEBUG(sip->dev, fmt, ##arg)
72 if (bios->major_version < 5) /* pre BIT */ in clkcmptable()
75 compare_record_len = 4; in clkcmptable()
78 compareclk = ROM16(bios->data[clktable + compare_record_len * i]); in clkcmptable()
80 if (bios->major_version < 5) { in clkcmptable()
81 uint8_t tmdssub = bios->data[clktable + 2 + compare_record_len * i]; in clkcmptable()
82 scriptptr = ROM16(bios->data[bios->init_script_tbls_ptr + tmdssub * 2]); in clkcmptable()
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/kernel/linux/linux-6.6/drivers/gpu/drm/renesas/rcar-du/
Drcar_lvds.c1 // SPDX-License-Identifier: GPL-2.0
3 * R-Car LVDS Encoder
5 * Copyright (C) 2013-2018 Renesas Electronics Corporation
13 #include <linux/media-bus-format.h>
41 RCAR_LVDS_MODE_VESA = 4,
50 #define RCAR_LVDS_QUIRK_LANES BIT(0) /* LVDS lanes 1 and 3 inverted */
54 #define RCAR_LVDS_QUIRK_DUAL_LINK BIT(4) /* Supports dual-link operation */
59 void (*pll_setup)(struct rcar_lvds *lvds, unsigned int freq);
86 static u32 rcar_lvds_read(struct rcar_lvds *lvds, u32 reg) in rcar_lvds_read() argument
88 return ioread32(lvds->mmio + reg); in rcar_lvds_read()
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Drcar_du_drv.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * R-Car Display Unit DRM driver
5 * Copyright (C) 2013-2015 Renesas Electronics Corporation
29 #define RCAR_DU_FEATURE_CRTC_IRQ BIT(0) /* Per-CRTC IRQ */
30 #define RCAR_DU_FEATURE_CRTC_CLOCK BIT(1) /* Per-CRTC clock */
33 #define RCAR_DU_FEATURE_TVM_SYNC BIT(4) /* Has TV switch/sync modes */
34 #define RCAR_DU_FEATURE_NO_BLENDING BIT(5) /* PnMR.SPIM does not have ALP nor EOR bits */
52 * struct rcar_du_output_routing - Output routing specification
58 * of in-SoC encoder for the output.
66 * struct rcar_du_device_info - DU model-specific information
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Drcar_du_drv.c1 // SPDX-License-Identifier: GPL-2.0+
3 * R-Car Display Unit DRM driver
5 * Copyright (C) 2013-2015 Renesas Electronics Corporation
11 #include <linux/dma-mapping.h>
31 /* -----------------------------------------------------------------------------
44 * R8A774[34] has one RGB output and one LVDS output
56 .num_rpf = 4,
79 .num_rpf = 4,
91 * R8A77470 has two RGB outputs, one LVDS output, and
107 .num_rpf = 4,
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/kernel/linux/linux-6.6/drivers/gpu/drm/bridge/
Dti-sn65dsi83.c1 // SPDX-License-Identifier: GPL-2.0
6 * - SN65DSI83
7 * = 1x Single-link DSI ~ 1x Single-link LVDS
8 * - Supported
9 * - Single-link LVDS mode tested
10 * - SN65DSI84
11 * = 1x Single-link DSI ~ 2x Single-link or 1x Dual-link LVDS
12 * - Supported
13 * - Dual-link LVDS mode tested
14 * - 2x Single-link LVDS mode unsupported
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/kernel/linux/linux-5.10/drivers/gpu/drm/rcar-du/
Drcar_lvds.c1 // SPDX-License-Identifier: GPL-2.0
3 * rcar_lvds.c -- R-Car LVDS Encoder
5 * Copyright (C) 2013-2018 Renesas Electronics Corporation
38 RCAR_LVDS_MODE_VESA = 4,
47 #define RCAR_LVDS_QUIRK_LANES BIT(0) /* LVDS lanes 1 and 3 inverted */
51 #define RCAR_LVDS_QUIRK_DUAL_LINK BIT(4) /* Supports dual-link operation */
56 void (*pll_setup)(struct rcar_lvds *lvds, unsigned int freq);
86 static void rcar_lvds_write(struct rcar_lvds *lvds, u32 reg, u32 data) in rcar_lvds_write() argument
88 iowrite32(data, lvds->mmio + reg); in rcar_lvds_write()
91 /* -----------------------------------------------------------------------------
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/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/
Datombios.h2 * Copyright 2006-2007 Advanced Micro Devices, Inc.
66 #define ATOM_CRTC5 4
124 #define ATOM_TV_PALM 4
134 #define ATOM_DAC1_PAL 4
179 #define ATOM_MAX_SIZE_OF_M54T_FLAG_STRING 4 //sizeof( ATOM_M54T_FLAG_STRING )
214 UCHAR uaFirmWareSignature[4]; /*Signature to distinguish between Atombios and non-atombios,
397 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
403 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
410 …ULONG ulClock; //When returen, it's the re-calculated clock based on given Fb_div Post_Di…
475 #define ATOM_PLL_CNTL_FLAG_FRACTION_DISABLE 4
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/kernel/linux/linux-6.6/drivers/gpu/drm/radeon/
Datombios.h2 * Copyright 2006-2007 Advanced Micro Devices, Inc.
66 #define ATOM_CRTC5 4
124 #define ATOM_TV_PALM 4
134 #define ATOM_DAC1_PAL 4
179 #define ATOM_MAX_SIZE_OF_M54T_FLAG_STRING 4 //sizeof( ATOM_M54T_FLAG_STRING )
214 UCHAR uaFirmWareSignature[4]; /*Signature to distinguish between Atombios and non-atombios,
397 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
403 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
410 …ULONG ulClock; //When returen, it's the re-calculated clock based on given Fb_div Post_Di…
475 #define ATOM_PLL_CNTL_FLAG_FRACTION_DISABLE 4
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