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Searched +full:ma35d1 +full:- +full:reset (Results 1 – 8 of 8) sorted by relevance

/kernel/linux/linux-6.6/arch/arm64/boot/dts/nuvoton/
Dma35d1.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 * Author: Shan-Chun Hung <schung@nuvoton.com>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/clock/nuvoton,ma35d1-clk.h>
12 #include <dt-bindings/reset/nuvoton,ma35d1-reset.h>
15 compatible = "nuvoton,ma35d1";
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/reset/
Dnuvoton,ma35d1-reset.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/nuvoton,ma35d1-reset.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Nuvoton MA35D1 Reset Controller
10 - Chi-Fang Li <cfli0@nuvoton.com>
11 - Jacky Huang <ychuang3@nuvoton.com>
14 The system reset controller can be used to reset various peripheral
15 controllers in MA35D1 SoC.
20 - const: nuvoton,ma35d1-reset
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/kernel/linux/linux-6.6/drivers/reset/
Dreset-ma35d1.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Chi-Fang Li <cfli0@nuvoton.com>
16 #include <linux/reset-controller.h>
18 #include <dt-bindings/reset/nuvoton,ma35d1-reset.h>
24 /* protect registers against concurrent read-modify-write */
135 data->base + ma35d1_reset_map[id].reg_ofs); in ma35d1_restart_handler()
146 return -EINVAL; in ma35d1_reset_update()
148 spin_lock_irqsave(&data->lock, flags); in ma35d1_reset_update()
149 reg = readl_relaxed(data->base + ma35d1_reset_map[id].reg_ofs); in ma35d1_reset_update()
154 writel_relaxed(reg, data->base + ma35d1_reset_map[id].reg_ofs); in ma35d1_reset_update()
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
6 bool "Reset Controller Support"
9 Generic Reset Controller support.
11 This framework is designed to abstract reset handling of devices
12 via GPIOs or SoC-internal reset controller modules.
19 tristate "Altera Arria10 System Resource Reset"
22 This option enables support for the external reset functions for
26 bool "AR71xx Reset Driver" if COMPILE_TEST
29 This enables the ATH79 reset controller driver that supports the
30 AR71xx SoC reset controller.
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DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-y += core.o
3 obj-y += hisilicon/
4 obj-y += starfive/
5 obj-$(CONFIG_ARCH_STI) += sti/
6 obj-$(CONFIG_ARCH_TEGRA) += tegra/
7 obj-$(CONFIG_RESET_A10SR) += reset-a10sr.o
8 obj-$(CONFIG_RESET_ATH79) += reset-ath79.o
9 obj-$(CONFIG_RESET_AXS10X) += reset-axs10x.o
10 obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o
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/kernel/linux/linux-6.6/drivers/tty/serial/
Dma35d1_serial.c1 // SPDX-License-Identifier: GPL-2.0+
3 * MA35D1 serial driver
36 /* MA35_IER_REG - Interrupt Enable Register */
40 #define MA35_IER_RTO_IEN BIT(4) /* RX Time-out Interrupt Enable */
42 #define MA35_IER_TIME_OUT_EN BIT(11) /* RX Buffer Time-out Counter Enable */
43 #define MA35_IER_AUTO_RTS BIT(12) /* nRTS Auto-flow Control Enable */
44 #define MA35_IER_AUTO_CTS BIT(13) /* nCTS Auto-flow Control Enable */
46 /* MA35_FCR_REG - FIFO Control Register */
47 #define MA35_FCR_RFR BIT(1) /* RX Field Software Reset */
48 #define MA35_FCR_TFR BIT(2) /* TX Field Software Reset */
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/kernel/linux/linux-6.6/include/dt-bindings/reset/
Dnuvoton,ma35d1-reset.h1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
4 * Author: Chi-Fen Li <cfli0@nuvoton.com>
6 * Device Tree binding constants for MA35D1 reset controller.
/kernel/linux/linux-6.6/
DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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