| /kernel/linux/linux-6.6/drivers/mailbox/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
2 menuconfig MAILBOX config
3 bool "Mailbox Hardware Support"
5 Mailbox is a framework to control hardware communication between
6 on-chip processors through queued messages and interrupt driven
9 if MAILBOX
12 tristate "Apple Mailbox driver"
16 Apple SoCs have various co-processors required for certain
18 driver adds support for the mailbox controller used to
24 tristate "ARM MHU Mailbox"
[all …]
|
| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0
2 # Generic MAILBOX API
4 obj-$(CONFIG_MAILBOX) += mailbox.o
6 obj-$(CONFIG_MAILBOX_TEST) += mailbox-test.o
8 obj-$(CONFIG_ARM_MHU) += arm_mhu.o arm_mhu_db.o
10 obj-$(CONFIG_ARM_MHU_V2) += arm_mhuv2.o
12 obj-$(CONFIG_IMX_MBOX) += imx-mailbox.o
14 obj-$(CONFIG_ARMADA_37XX_RWTM_MBOX) += armada-37xx-rwtm-mailbox.o
16 obj-$(CONFIG_PLATFORM_MHU) += platform_mhu.o
18 obj-$(CONFIG_PL320_MBOX) += pl320-ipc.o
[all …]
|
| /kernel/linux/linux-5.10/drivers/mailbox/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
2 menuconfig MAILBOX config
3 bool "Mailbox Hardware Support"
5 Mailbox is a framework to control hardware communication between
6 on-chip processors through queued messages and interrupt driven
9 if MAILBOX
12 tristate "ARM MHU Mailbox"
16 The controller has 3 mailbox channels, the last of which can be
20 tristate "i.MX Mailbox"
23 Mailbox implementation for i.MX Messaging Unit (MU).
[all …]
|
| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0
2 # Generic MAILBOX API
4 obj-$(CONFIG_MAILBOX) += mailbox.o
6 obj-$(CONFIG_MAILBOX_TEST) += mailbox-test.o
8 obj-$(CONFIG_ARM_MHU) += arm_mhu.o arm_mhu_db.o
10 obj-$(CONFIG_IMX_MBOX) += imx-mailbox.o
12 obj-$(CONFIG_ARMADA_37XX_RWTM_MBOX) += armada-37xx-rwtm-mailbox.o
14 obj-$(CONFIG_PLATFORM_MHU) += platform_mhu.o
16 obj-$(CONFIG_PL320_MBOX) += pl320-ipc.o
18 obj-$(CONFIG_OMAP2PLUS_MBOX) += omap-mailbox.o
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mailbox/ |
| D | omap-mailbox.txt | 1 OMAP2+ and K3 Mailbox
4 The OMAP mailbox hardware facilitates communication between different processors
5 using a queued mailbox interrupt mechanism. The IP block is external to the
10 Each mailbox IP block/cluster has a certain number of h/w fifo queues and output
25 routed to different processor sub-systems on DRA7xx as they are routed through
32 Mailbox Device Node:
34 A Mailbox device node is used to represent a Mailbox IP instance/cluster within
35 a SoC. The sub-mailboxes are represented as child nodes of this parent node.
38 --------------------
39 - compatible: Should be one of the following,
[all …]
|
| D | hisilicon,hi6220-mailbox.txt | 1 Hisilicon Hi6220 Mailbox Driver
4 Hisilicon Hi6220 mailbox supports up to 32 channels. Each channel
9 Mailbox Device Node:
13 --------------------
14 - compatible: Shall be "hisilicon,hi6220-mbox"
15 - reg: Contains the mailbox register address range (base
19 - #mbox-cells: Common mailbox binding property to identify the number
20 of cells required for the mailbox specifier. Must be 3.
22 phandle: Label name of mailbox controller
27 mailbox driver uses it to acknowledge interrupt
[all …]
|
| D | mailbox.txt | 1 * Generic Mailbox Controller and client driver bindings
3 Generic binding to provide a way for Mailbox controller drivers to
4 assign appropriate mailbox channel to client drivers.
6 * Mailbox Controller
9 - #mbox-cells: Must be at least 1. Number of cells in a mailbox
13 mailbox: mailbox {
15 #mbox-cells = <1>;
19 * Mailbox Client
22 - mboxes: List of phandle and mailbox channel specifiers.
25 - mbox-names: List of identifier strings for each mailbox channel.
[all …]
|
| D | altera-mailbox.txt | 1 Altera Mailbox Driver
5 - compatible : "altr,mailbox-1.0".
6 - reg : physical base address of the mailbox and length of
8 - #mbox-cells: Common mailbox binding property to identify the number
9 of cells required for the mailbox specifier. Should be 1.
12 - interrupts : interrupt number. The interrupt specifier format
16 mbox_tx: mailbox@100 {
17 compatible = "altr,mailbox-1.0";
19 interrupt-parent = < &gic_0 >;
21 #mbox-cells = <1>;
[all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mailbox/ |
| D | ti,omap-mailbox.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/ti,omap-mailbox.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI OMAP2+ and K3 Mailbox devices
10 - Suman Anna <s-anna@ti.com>
13 The OMAP Mailbox hardware facilitates communication between different
14 processors using a queued mailbox interrupt mechanism. The IP block is
19 Each mailbox IP block/cluster has a certain number of h/w fifo queues and
35 lines can also be routed to different processor sub-systems on DRA7xx as they
[all …]
|
| D | hisilicon,hi6220-mailbox.txt | 1 Hisilicon Hi6220 Mailbox Driver
4 Hisilicon Hi6220 mailbox supports up to 32 channels. Each channel
9 Mailbox Device Node:
13 --------------------
14 - compatible: Shall be "hisilicon,hi6220-mbox"
15 - reg: Contains the mailbox register address range (base
19 - #mbox-cells: Common mailbox binding property to identify the number
20 of cells required for the mailbox specifier. Must be 3.
22 phandle: Label name of mailbox controller
27 mailbox driver uses it to acknowledge interrupt
[all …]
|
| D | mailbox.txt | 1 * Generic Mailbox Controller and client driver bindings
3 Generic binding to provide a way for Mailbox controller drivers to
4 assign appropriate mailbox channel to client drivers.
6 * Mailbox Controller
9 - #mbox-cells: Must be at least 1. Number of cells in a mailbox
13 mailbox: mailbox {
15 #mbox-cells = <1>;
19 * Mailbox Client
22 - mboxes: List of phandle and mailbox channel specifiers.
25 - mbox-names: List of identifier strings for each mailbox channel.
[all …]
|
| D | apple,mailbox.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mailbox/apple,mailbox.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Apple Mailbox Controller
10 - Hector Martin <marcan@marcan.st>
11 - Sven Peter <sven@svenpeter.dev>
14 The Apple mailbox consists of two FIFOs used to exchange 64+32 bit
15 messages between the main CPU and a co-processor. Multiple instances
16 of this mailbox can be found on Apple SoCs.
[all …]
|
| D | altera-mailbox.txt | 1 Altera Mailbox Driver
5 - compatible : "altr,mailbox-1.0".
6 - reg : physical base address of the mailbox and length of
8 - #mbox-cells: Common mailbox binding property to identify the number
9 of cells required for the mailbox specifier. Should be 1.
12 - interrupts : interrupt number. The interrupt specifier format
16 mbox_tx: mailbox@100 {
17 compatible = "altr,mailbox-1.0";
19 interrupt-parent = < &gic_0 >;
21 #mbox-cells = <1>;
[all …]
|
| /kernel/linux/linux-5.10/drivers/net/ethernet/mellanox/mlx4/ |
| D | fw_qos.c | 16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
58 __be16 max_bw_units; /* 3-100Mbps, 4-1Gbps, other values - reserved */
87 struct mlx4_cmd_mailbox *mailbox; in mlx4_SET_PORT_PRIO2TC() local
93 mailbox = mlx4_alloc_cmd_mailbox(dev); in mlx4_SET_PORT_PRIO2TC()
94 if (IS_ERR(mailbox)) in mlx4_SET_PORT_PRIO2TC()
95 return PTR_ERR(mailbox); in mlx4_SET_PORT_PRIO2TC()
97 context = mailbox->buf; in mlx4_SET_PORT_PRIO2TC()
100 context->prio2tc[i >> 1] = prio2tc[i] << 4 | prio2tc[i + 1]; in mlx4_SET_PORT_PRIO2TC()
103 err = mlx4_cmd(dev, mailbox->dma, in_mod, 1, MLX4_CMD_SET_PORT, in mlx4_SET_PORT_PRIO2TC()
[all …]
|
| /kernel/linux/linux-6.6/drivers/net/ethernet/mellanox/mlx4/ |
| D | fw_qos.c | 16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
58 __be16 max_bw_units; /* 3-100Mbps, 4-1Gbps, other values - reserved */
87 struct mlx4_cmd_mailbox *mailbox; in mlx4_SET_PORT_PRIO2TC() local
93 mailbox = mlx4_alloc_cmd_mailbox(dev); in mlx4_SET_PORT_PRIO2TC()
94 if (IS_ERR(mailbox)) in mlx4_SET_PORT_PRIO2TC()
95 return PTR_ERR(mailbox); in mlx4_SET_PORT_PRIO2TC()
97 context = mailbox->buf; in mlx4_SET_PORT_PRIO2TC()
100 context->prio2tc[i >> 1] = prio2tc[i] << 4 | prio2tc[i + 1]; in mlx4_SET_PORT_PRIO2TC()
103 err = mlx4_cmd(dev, mailbox->dma, in_mod, 1, MLX4_CMD_SET_PORT, in mlx4_SET_PORT_PRIO2TC()
[all …]
|
| /kernel/linux/linux-6.6/drivers/net/ethernet/intel/ice/ |
| D | ice_vf_mbx.c | 1 // SPDX-License-Identifier: GPL-2.0
11 * @v_opcode: opcodes for VF-PF communication
17 * Send message to VF driver (0x0802) using mailbox
31 cmd->id = cpu_to_le32(vfid); in ice_aq_send_msg_to_vf()
39 return ice_sq_send_cmd(hw, &hw->mailboxq, &desc, msg, msglen, cd); in ice_aq_send_msg_to_vf()
71 u32 index = fls(link_speed) - 1; in ice_conv_link_speed_to_virtchnl()
86 /* The mailbox overflow detection algorithm helps to check if there
89 * 1. The mailbox snapshot structure, ice_mbx_snapshot, is initialized during
92 * messages within the mailbox queue while looking for a malicious VF.
94 * 2. When the caller starts processing its mailbox queue in response to an
[all …]
|
| /kernel/linux/linux-5.10/arch/arm64/kernel/ |
| D | acpi_parking_protocol.c | 1 // SPDX-License-Identifier: GPL-2.0-only
21 struct parking_protocol_mailbox __iomem *mailbox; member
34 cpu_entry->mailbox_addr = p->parked_address; in acpi_set_mailbox_entry()
35 cpu_entry->version = p->parking_version; in acpi_set_mailbox_entry()
36 cpu_entry->gic_cpu_id = p->cpu_interface_number; in acpi_set_mailbox_entry()
43 return cpu_entry->mailbox_addr && cpu_entry->version; in acpi_parking_protocol_valid()
62 struct parking_protocol_mailbox __iomem *mailbox; in acpi_parking_protocol_cpu_boot() local
66 * Map mailbox memory with attribute device nGnRE (ie ioremap - in acpi_parking_protocol_cpu_boot()
71 * If the mailbox is mistakenly allocated in the linear mapping in acpi_parking_protocol_cpu_boot()
76 mailbox = ioremap(cpu_entry->mailbox_addr, sizeof(*mailbox)); in acpi_parking_protocol_cpu_boot()
[all …]
|
| /kernel/linux/linux-6.6/arch/arm64/kernel/ |
| D | acpi_parking_protocol.c | 1 // SPDX-License-Identifier: GPL-2.0-only
21 struct parking_protocol_mailbox __iomem *mailbox; member
34 cpu_entry->mailbox_addr = p->parked_address; in acpi_set_mailbox_entry()
35 cpu_entry->version = p->parking_version; in acpi_set_mailbox_entry()
36 cpu_entry->gic_cpu_id = p->cpu_interface_number; in acpi_set_mailbox_entry()
43 return cpu_entry->mailbox_addr && cpu_entry->version; in acpi_parking_protocol_valid()
62 struct parking_protocol_mailbox __iomem *mailbox; in acpi_parking_protocol_cpu_boot() local
66 * Map mailbox memory with attribute device nGnRE (ie ioremap - in acpi_parking_protocol_cpu_boot()
71 * If the mailbox is mistakenly allocated in the linear mapping in acpi_parking_protocol_cpu_boot()
76 mailbox = ioremap(cpu_entry->mailbox_addr, sizeof(*mailbox)); in acpi_parking_protocol_cpu_boot()
[all …]
|
| /kernel/linux/linux-6.6/drivers/scsi/lpfc/ |
| D | lpfc_mbox.c | 4 * Copyright (C) 2017-2022 Broadcom. All Rights Reserved. The term *
6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
47 * lpfc_mbox_rsrc_prep - Prepare a mailbox with DMA buffer memory.
49 * @mbox: pointer to the driver internal queue element for mailbox command.
51 * A mailbox command consists of the pool memory for the command, @mbox, and
69 return -ENOMEM; in lpfc_mbox_rsrc_prep()
71 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys); in lpfc_mbox_rsrc_prep()
72 if (!mp->virt) { in lpfc_mbox_rsrc_prep()
[all …]
|
| /kernel/linux/linux-5.10/drivers/scsi/lpfc/ |
| D | lpfc_mbox.c | 4 * Copyright (C) 2017-2018 Broadcom. All Rights Reserved. The term *
6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
47 * lpfc_dump_static_vport - Dump HBA's static vport information.
49 * @pmb: pointer to the driver internal queue element for mailbox command.
52 * The dump mailbox command provides a method for the device driver to obtain
55 * This routine prepares the mailbox command for dumping list of static
65 mb = &pmb->u.mb; in lpfc_dump_static_vport()
69 mb->mbxCommand = MBX_DUMP_MEMORY; in lpfc_dump_static_vport()
[all …]
|
| /kernel/linux/linux-5.10/drivers/infiniband/hw/mthca/ |
| D | mthca_cmd.c | 16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
151 * commands. So we can't use strict timeouts described in PRM -- we
194 return readl(dev->hcr + HCR_STATUS_OFFSET) & in go_bit()
206 void __iomem *ptr = dev->cmd.dbell_map; in mthca_cmd_post_dbell()
207 u16 *offs = dev->cmd.dbell_offsets; in mthca_cmd_post_dbell()
249 return -EAGAIN; in mthca_cmd_post_hcr()
257 __raw_writel((__force u32) cpu_to_be32(in_param >> 32), dev->hcr + 0 * 4); in mthca_cmd_post_hcr()
258 __raw_writel((__force u32) cpu_to_be32(in_param & 0xfffffffful), dev->hcr + 1 * 4); in mthca_cmd_post_hcr()
259 __raw_writel((__force u32) cpu_to_be32(in_modifier), dev->hcr + 2 * 4); in mthca_cmd_post_hcr()
[all …]
|
| D | mthca_mcg.c | 14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
54 * If GID is found in MGM or MGM is empty, *index = *hash, *prev = -1
60 * If no AMGM exists for given gid, *index = -1, *prev = index of last
67 struct mthca_mailbox *mailbox; in find_mgm() local
68 struct mthca_mgm *mgm = mgm_mailbox->buf; in find_mgm()
72 mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); in find_mgm()
73 if (IS_ERR(mailbox)) in find_mgm()
74 return -ENOMEM; in find_mgm()
75 mgid = mailbox->buf; in find_mgm()
[all …]
|
| /kernel/linux/linux-6.6/drivers/infiniband/hw/mthca/ |
| D | mthca_cmd.c | 16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
151 * commands. So we can't use strict timeouts described in PRM -- we
194 return readl(dev->hcr + HCR_STATUS_OFFSET) & in go_bit()
206 void __iomem *ptr = dev->cmd.dbell_map; in mthca_cmd_post_dbell()
207 u16 *offs = dev->cmd.dbell_offsets; in mthca_cmd_post_dbell()
249 return -EAGAIN; in mthca_cmd_post_hcr()
257 __raw_writel((__force u32) cpu_to_be32(in_param >> 32), dev->hcr + 0 * 4); in mthca_cmd_post_hcr()
258 __raw_writel((__force u32) cpu_to_be32(in_param & 0xfffffffful), dev->hcr + 1 * 4); in mthca_cmd_post_hcr()
259 __raw_writel((__force u32) cpu_to_be32(in_modifier), dev->hcr + 2 * 4); in mthca_cmd_post_hcr()
[all …]
|
| D | mthca_mcg.c | 14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
54 * If GID is found in MGM or MGM is empty, *index = *hash, *prev = -1
60 * If no AMGM exists for given gid, *index = -1, *prev = index of last
67 struct mthca_mailbox *mailbox; in find_mgm() local
68 struct mthca_mgm *mgm = mgm_mailbox->buf; in find_mgm()
72 mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); in find_mgm()
73 if (IS_ERR(mailbox)) in find_mgm()
74 return -ENOMEM; in find_mgm()
75 mgid = mailbox->buf; in find_mgm()
[all …]
|
| /kernel/linux/linux-6.6/drivers/net/ethernet/intel/fm10k/ |
| D | fm10k_mbx.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2019 Intel Corporation. */
7 * fm10k_fifo_init - Initialize a message FIFO
10 * @size: maximum message size to store in FIFO, must be 2^n - 1
14 fifo->buffer = buffer; in fm10k_fifo_init()
15 fifo->size = size; in fm10k_fifo_init()
16 fifo->head = 0; in fm10k_fifo_init()
17 fifo->tail = 0; in fm10k_fifo_init()
21 * fm10k_fifo_used - Retrieve used space in FIFO
28 return fifo->tail - fifo->head; in fm10k_fifo_used()
[all …]
|