| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mailbox/ |
| D | ti,omap-mailbox.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/ti,omap-mailbox.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
26 interrupt configuration registers, and have a rx and tx interrupt source per
28 appropriate programming of the rx and tx interrupt sources on the appropriate
35 lines can also be routed to different processor sub-systems on DRA7xx as they
49 within a SoC. The sub-mailboxes (actual communication channels) are
56 "mbox-names" (please see Documentation/devicetree/bindings/mailbox/mailbox.txt
[all …]
|
| D | hisilicon,hi6220-mailbox.txt | 13 --------------------
14 - compatible: Shall be "hisilicon,hi6220-mbox"
15 - reg: Contains the mailbox register address range (base
19 - #mbox-cells: Common mailbox binding property to identify the number
23 slot_id: Slot id used either for TX or RX
26 TX/RX interrupt to application processor,
28 - interrupts: Contains the interrupt information for the mailbox
33 --------------------
34 - hi6220,mbox-tx-noirq: Property of MCU firmware's feature, so mailbox driver
36 flag" mode or IRQ generated mode to acknowledge a TX
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mailbox/ |
| D | omap-mailbox.txt | 17 and tx interrupt source per h/w fifo. Communication between different processors
18 is achieved through the appropriate programming of the rx and tx interrupt
25 routed to different processor sub-systems on DRA7xx as they are routed through
35 a SoC. The sub-mailboxes are represented as child nodes of this parent node.
38 --------------------
39 - compatible: Should be one of the following,
40 "ti,omap2-mailbox" for OMAP2420, OMAP2430 SoCs
41 "ti,omap3-mailbox" for OMAP3430, OMAP3630 SoCs
42 "ti,omap4-mailbox" for OMAP44xx, OMAP54xx, AM33xx,
44 "ti,am654-mailbox" for K3 AM65x and J721E SoCs
[all …]
|
| D | hisilicon,hi6220-mailbox.txt | 13 --------------------
14 - compatible: Shall be "hisilicon,hi6220-mbox"
15 - reg: Contains the mailbox register address range (base
19 - #mbox-cells: Common mailbox binding property to identify the number
23 slot_id: Slot id used either for TX or RX
26 TX/RX interrupt to application processor,
28 - interrupts: Contains the interrupt information for the mailbox
33 --------------------
34 - hi6220,mbox-tx-noirq: Property of MCU firmware's feature, so mailbox driver
36 flag" mode or IRQ generated mode to acknowledge a TX
[all …]
|
| /kernel/linux/linux-5.10/arch/arm64/boot/dts/ti/ |
| D | k3-j721e-som-p0.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
8 #include "k3-j721e.dtsi"
18 reserved_memory: reserved-memory {
19 #address-cells = <2>;
20 #size-cells = <2>;
26 no-map;
29 c66_1_dma_memory_region: c66-dma-memory@a6000000 {
30 compatible = "shared-dma-pool";
[all …]
|
| /kernel/linux/linux-6.6/drivers/firmware/tegra/ |
| D | bpmp-tegra186.c | 1 // SPDX-License-Identifier: GPL-2.0
13 #include <soc/tegra/bpmp-abi.h>
16 #include "bpmp-private.h"
28 } tx, rx; member
33 } mbox; member
41 priv = container_of(client, struct tegra186_bpmp, mbox.client); in mbox_client_to_bpmp()
43 return priv->parent; in mbox_client_to_bpmp()
50 err = tegra_ivc_read_get_next_frame(channel->ivc, &channel->ib); in tegra186_bpmp_is_message_ready()
52 iosys_map_clear(&channel->ib); in tegra186_bpmp_is_message_ready()
63 err = tegra_ivc_write_get_next_frame(channel->ivc, &channel->ob); in tegra186_bpmp_is_channel_free()
[all …]
|
| /kernel/linux/linux-5.10/drivers/firmware/tegra/ |
| D | bpmp-tegra186.c | 1 // SPDX-License-Identifier: GPL-2.0
11 #include <soc/tegra/bpmp-abi.h>
14 #include "bpmp-private.h"
23 } tx, rx; member
28 } mbox; member
36 priv = container_of(client, struct tegra186_bpmp, mbox.client); in mbox_client_to_bpmp()
38 return priv->parent; in mbox_client_to_bpmp()
45 frame = tegra_ivc_read_get_next_frame(channel->ivc); in tegra186_bpmp_is_message_ready()
47 channel->ib = NULL; in tegra186_bpmp_is_message_ready()
51 channel->ib = frame; in tegra186_bpmp_is_message_ready()
[all …]
|
| /kernel/linux/linux-6.6/drivers/net/ethernet/marvell/octeontx2/nic/ |
| D | otx2_dcbnl.c | 1 // SPDX-License-Identifier: GPL-2.0
12 u8 tx_queues = pfvf->hw.tx_queues, prio; in otx2_check_pfc_config()
13 u8 pfc_en = pfvf->pfc_en; in otx2_check_pfc_config()
17 prio > tx_queues - 1) { in otx2_check_pfc_config()
18 dev_warn(pfvf->dev, in otx2_check_pfc_config()
19 "Increase number of tx queues from %d to %d to support PFC.\n", in otx2_check_pfc_config()
21 return -EINVAL; in otx2_check_pfc_config()
33 pfc_en = pfvf->pfc_en; in otx2_pfc_txschq_config()
38 * or tx scheduler is not allocated for the priority in otx2_pfc_txschq_config()
40 if (!pfc_bit_set || !pfvf->pfc_alloc_status[prio]) in otx2_pfc_txschq_config()
[all …]
|
| /kernel/linux/linux-5.10/drivers/mailbox/ |
| D | mailbox.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013-2014 Linaro Ltd.
31 spin_lock_irqsave(&chan->lock, flags); in add_to_rbuf()
34 if (chan->msg_count == MBOX_TX_QUEUE_LEN) { in add_to_rbuf()
35 spin_unlock_irqrestore(&chan->lock, flags); in add_to_rbuf()
36 return -ENOBUFS; in add_to_rbuf()
39 idx = chan->msg_free; in add_to_rbuf()
40 chan->msg_data[idx] = mssg; in add_to_rbuf()
41 chan->msg_count++; in add_to_rbuf()
43 if (idx == MBOX_TX_QUEUE_LEN - 1) in add_to_rbuf()
[all …]
|
| D | hi6220-mailbox.c | 1 // SPDX-License-Identifier: GPL-2.0-only
56 * - direction: tx or rx
57 * - dst irq: peer core's irq number
58 * - ack irq: local irq number
59 * - slot number
72 /* flag of enabling tx's irq mode */
89 static void mbox_set_state(struct hi6220_mbox *mbox, in mbox_set_state() argument
94 status = readl(mbox->base + MBOX_MODE_REG(slot)); in mbox_set_state()
96 writel(status, mbox->base + MBOX_MODE_REG(slot)); in mbox_set_state()
99 static void mbox_set_mode(struct hi6220_mbox *mbox, in mbox_set_mode() argument
[all …]
|
| D | mailbox-sti.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
30 #define STI_IRQ_SET_OFFSET 0x24 /* Generate a Tx channel interrupt */
36 #define MBOX_BASE(mdev, inst) ((mdev)->base + ((inst) * 4))
44 * A channel an be used for TX or RX
47 * @mbox: Representation of a communication channel controller
55 struct mbox_controller *mbox; member
88 struct sti_channel *chan_info = chan->con_priv; in sti_mbox_channel_is_enabled()
89 struct sti_mbox_device *mdev = chan_info->mdev; in sti_mbox_channel_is_enabled()
90 unsigned int instance = chan_info->instance; in sti_mbox_channel_is_enabled()
91 unsigned int channel = chan_info->channel; in sti_mbox_channel_is_enabled()
[all …]
|
| D | zynqmp-ipi-mailbox.c | 1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/arm-smccc.h>
15 #include <linux/mailbox/zynqmp-ipi-message.h>
54 #define IPI_MB_CHNL_TX 0 /* IPI mailbox TX channel */
58 * struct zynqmp_ipi_mchan - Description of a Xilinx ZynqMP IPI mailbox channel
78 * struct zynqmp_ipi_mbox - Description of a ZynqMP IPI mailbox
84 * @mbox: mailbox Controller
85 * @mchans: array for channels, tx channel and rx channel.
92 struct mbox_controller mbox; member
97 * struct zynqmp_ipi_pdata - Description of z ZynqMP IPI agent platform data.
[all …]
|
| /kernel/linux/linux-6.6/drivers/mailbox/ |
| D | mailbox.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013-2014 Linaro Ltd.
32 spin_lock_irqsave(&chan->lock, flags); in add_to_rbuf()
35 if (chan->msg_count == MBOX_TX_QUEUE_LEN) { in add_to_rbuf()
36 spin_unlock_irqrestore(&chan->lock, flags); in add_to_rbuf()
37 return -ENOBUFS; in add_to_rbuf()
40 idx = chan->msg_free; in add_to_rbuf()
41 chan->msg_data[idx] = mssg; in add_to_rbuf()
42 chan->msg_count++; in add_to_rbuf()
44 if (idx == MBOX_TX_QUEUE_LEN - 1) in add_to_rbuf()
[all …]
|
| D | hi6220-mailbox.c | 1 // SPDX-License-Identifier: GPL-2.0-only
57 * - direction: tx or rx
58 * - dst irq: peer core's irq number
59 * - ack irq: local irq number
60 * - slot number
73 /* flag of enabling tx's irq mode */
90 static void mbox_set_state(struct hi6220_mbox *mbox, in mbox_set_state() argument
95 status = readl(mbox->base + MBOX_MODE_REG(slot)); in mbox_set_state()
97 writel(status, mbox->base + MBOX_MODE_REG(slot)); in mbox_set_state()
100 static void mbox_set_mode(struct hi6220_mbox *mbox, in mbox_set_mode() argument
[all …]
|
| D | mailbox-sti.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
30 #define STI_IRQ_SET_OFFSET 0x24 /* Generate a Tx channel interrupt */
36 #define MBOX_BASE(mdev, inst) ((mdev)->base + ((inst) * 4))
39 * struct sti_mbox_device - STi Mailbox device data
42 * @mbox: Representation of a communication channel controller
51 * A channel an be used for TX or RX
55 struct mbox_controller *mbox; member
63 * struct sti_mbox_pdata - STi Mailbox platform specific configuration
74 * struct sti_channel - STi Mailbox allocated channel information
88 struct sti_channel *chan_info = chan->con_priv; in sti_mbox_channel_is_enabled()
[all …]
|
| D | zynqmp-ipi-mailbox.c | 1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/arm-smccc.h>
15 #include <linux/mailbox/zynqmp-ipi-message.h>
52 #define IPI_MB_CHNL_TX 0 /* IPI mailbox TX channel */
56 * struct zynqmp_ipi_mchan - Description of a Xilinx ZynqMP IPI mailbox channel
76 * struct zynqmp_ipi_mbox - Description of a ZynqMP IPI mailbox
82 * @mbox: mailbox Controller
83 * @mchans: array for channels, tx channel and rx channel.
90 struct mbox_controller mbox; member
95 * struct zynqmp_ipi_pdata - Description of z ZynqMP IPI agent platform data.
[all …]
|
| /kernel/linux/linux-6.6/arch/arm64/boot/dts/ti/ |
| D | k3-j721e-som-p0.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2019-2020 Texas Instruments Incorporated - https://www.ti.com/
8 /dts-v1/;
10 #include "k3-j721e.dtsi"
20 reserved_memory: reserved-memory {
21 #address-cells = <2>;
22 #size-cells = <2>;
28 no-map;
31 mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
32 compatible = "shared-dma-pool";
[all …]
|
| D | k3-am642-tqma64xxl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
4 * Copyright (c) 2022-2023 TQ-Systems GmbH <linux@ew.tq-group.com>, D-82229 Seefeld, Germany.
7 #include "k3-am642.dtsi"
18 /* 1G RAM - default variant */
23 reserved-memory {
24 #address-cells = <2>;
25 #size-cells = <2>;
31 no-map;
34 main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
[all …]
|
| D | k3-j784s4-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
8 /dts-v1/;
10 #include <dt-bindings/net/ti-dp83867.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include "k3-j784s4.dtsi"
15 compatible = "ti,j784s4-evm", "ti,j784s4";
19 stdout-path = "serial2:115200n8";
39 reserved_memory: reserved-memory {
40 #address-cells = <2>;
[all …]
|
| /kernel/linux/linux-5.10/drivers/net/ethernet/marvell/octeontx2/af/ |
| D | mbox.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
37 #define INTR_MASK(pfvfs) ((pfvfs < 64) ? (BIT_ULL(pfvfs) - 1) : (~0ull))
39 #define MBOX_RSP_TIMEOUT 2000 /* Time(ms) to wait for mbox response */
41 #define MBOX_MSG_ALIGN 16 /* Align mbox msg start to 16bytes */
54 void *mbase; /* This dev's mbox region */
64 void *hwbase; /* Mbox region advertised by HW */
66 u64 trigger; /* Trigger mbox notification */
67 u16 tr_shift; /* Mbox trigger shift */
68 u64 rx_start; /* Offset of Rx region in mbox memory */
69 u64 tx_start; /* Offset of Tx region in mbox memory */
[all …]
|
| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | dra72x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
20 compatible = "arm,cortex-a15-pmu";
21 interrupt-parent = <&wakeupgen>;
27 target-module@5b000 { /* 0x4845b000, ap 59 46.0 */
28 compatible = "ti,sysc-omap4", "ti,sysc";
31 reg-names = "rev", "sysc";
32 ti,sysc-midle = <SYSC_IDLE_FORCE>,
34 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
37 clock-names = "fck";
[all …]
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/ti/omap/ |
| D | dra72x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
20 compatible = "arm,cortex-a15-pmu";
21 interrupt-parent = <&wakeupgen>;
27 target-module@5b000 { /* 0x4845b000, ap 59 46.0 */
28 compatible = "ti,sysc-omap4", "ti,sysc";
31 reg-names = "rev", "sysc";
32 ti,sysc-midle = <SYSC_IDLE_FORCE>,
34 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
37 clock-names = "fck";
[all …]
|
| D | omap2420.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
15 compatible = "ti,omap2-l4", "simple-bus";
16 #address-cells = <1>;
17 #size-cells = <1>;
21 compatible = "ti,omap2-prcm";
25 #address-cells = <1>;
26 #size-cells = <0>;
34 compatible = "ti,omap2-scm", "simple-bus";
36 #address-cells = <1>;
[all …]
|
| /kernel/linux/linux-6.6/include/linux/ |
| D | mailbox_controller.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
15 * struct mbox_chan_ops - methods to control mailbox channels
16 * @send_data: The API asks the MBOX controller driver, in atomic
18 * data is accepted for transmission, -EBUSY while rejecting
21 * mbox_chan_txdone (if it has some TX ACK irq). It must not
37 * this to poll status of last TX. The controller must
40 * mode 'send_data' is expected to return -EBUSY.
56 * struct mbox_controller - Controller of a class of communication channels
63 * Eg, if it has some TX ACK irq.
64 * @txdone_poll: If the controller can read but not report the TX
[all …]
|
| /kernel/linux/linux-5.10/include/linux/ |
| D | mailbox_controller.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
15 * struct mbox_chan_ops - methods to control mailbox channels
16 * @send_data: The API asks the MBOX controller driver, in atomic
18 * data is accepted for transmission, -EBUSY while rejecting
21 * mbox_chan_txdone (if it has some TX ACK irq). It must not
37 * this to poll status of last TX. The controller must
40 * mode 'send_data' is expected to return -EBUSY.
56 * struct mbox_controller - Controller of a class of communication channels
63 * Eg, if it has some TX ACK irq.
64 * @txdone_poll: If the controller can read but not report the TX
[all …]
|