| /kernel/linux/linux-5.10/drivers/clk/hisilicon/ |
| D | clk-hi3620.c | 284 struct clk_mmc *mclk = to_mmc(hw); in mmc_clk_determine_rate() local
286 if ((req->rate <= 13000000) && (mclk->id == HI3620_MMC_CIUCLK1)) { in mmc_clk_determine_rate()
323 struct clk_mmc *mclk = to_mmc(hw); in mmc_clk_set_timing() local
360 val = readl_relaxed(mclk->clken_reg); in mmc_clk_set_timing()
361 val &= ~(1 << mclk->clken_bit); in mmc_clk_set_timing()
362 writel_relaxed(val, mclk->clken_reg); in mmc_clk_set_timing()
364 val = readl_relaxed(mclk->sam_reg); in mmc_clk_set_timing()
365 val = mmc_clk_delay(val, sam, mclk->sam_off, mclk->sam_bits); in mmc_clk_set_timing()
366 writel_relaxed(val, mclk->sam_reg); in mmc_clk_set_timing()
368 val = readl_relaxed(mclk->drv_reg); in mmc_clk_set_timing()
[all …]
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| /kernel/linux/linux-6.6/drivers/clk/hisilicon/ |
| D | clk-hi3620.c | 283 struct clk_mmc *mclk = to_mmc(hw); in mmc_clk_determine_rate() local
285 if ((req->rate <= 13000000) && (mclk->id == HI3620_MMC_CIUCLK1)) { in mmc_clk_determine_rate()
322 struct clk_mmc *mclk = to_mmc(hw); in mmc_clk_set_timing() local
359 val = readl_relaxed(mclk->clken_reg); in mmc_clk_set_timing()
360 val &= ~(1 << mclk->clken_bit); in mmc_clk_set_timing()
361 writel_relaxed(val, mclk->clken_reg); in mmc_clk_set_timing()
363 val = readl_relaxed(mclk->sam_reg); in mmc_clk_set_timing()
364 val = mmc_clk_delay(val, sam, mclk->sam_off, mclk->sam_bits); in mmc_clk_set_timing()
365 writel_relaxed(val, mclk->sam_reg); in mmc_clk_set_timing()
367 val = readl_relaxed(mclk->drv_reg); in mmc_clk_set_timing()
[all …]
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| /kernel/linux/linux-6.6/sound/soc/ti/ |
| D | davinci-evm.c | 25 struct clk *mclk; member
36 if (drvdata->mclk) in evm_startup()
37 return clk_prepare_enable(drvdata->mclk); in evm_startup()
49 clk_disable_unprepare(drvdata->mclk); in evm_shutdown()
181 struct clk *mclk; in davinci_evm_probe() local
209 mclk = devm_clk_get(&pdev->dev, "mclk"); in davinci_evm_probe()
210 if (PTR_ERR(mclk) == -EPROBE_DEFER) { in davinci_evm_probe()
212 } else if (IS_ERR(mclk)) { in davinci_evm_probe()
213 dev_dbg(&pdev->dev, "mclk not found.\n"); in davinci_evm_probe()
214 mclk = NULL; in davinci_evm_probe()
[all …]
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| /kernel/linux/linux-5.10/sound/soc/atmel/ |
| D | sam9g20_wm8731.c | 49 static struct clk *mclk; variable
62 ret = clk_enable(mclk); in at91sam9g20ek_set_bias_level()
70 clk_disable(mclk); in at91sam9g20ek_set_bias_level()
166 * Codec MCLK is supplied by PCK0 - set it up. in at91sam9g20ek_audio_probe()
168 mclk = clk_get(NULL, "pck0"); in at91sam9g20ek_audio_probe()
169 if (IS_ERR(mclk)) { in at91sam9g20ek_audio_probe()
170 dev_err(&pdev->dev, "Failed to get MCLK\n"); in at91sam9g20ek_audio_probe()
171 ret = PTR_ERR(mclk); in at91sam9g20ek_audio_probe()
181 ret = clk_set_parent(mclk, pllb); in at91sam9g20ek_audio_probe()
184 dev_err(&pdev->dev, "Failed to set MCLK parent\n"); in at91sam9g20ek_audio_probe()
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/radeon/ |
| D | rv730_dpm.c | 118 LPRV7XX_SMC_MCLK_VALUE mclk) in rv730_populate_mclk_value() argument
183 mclk->mclk730.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl); in rv730_populate_mclk_value()
184 mclk->mclk730.vDLL_CNTL = cpu_to_be32(dll_cntl); in rv730_populate_mclk_value()
185 mclk->mclk730.mclk_value = cpu_to_be32(memory_clock); in rv730_populate_mclk_value()
186 mclk->mclk730.vMPLL_FUNC_CNTL = cpu_to_be32(mpll_func_cntl); in rv730_populate_mclk_value()
187 mclk->mclk730.vMPLL_FUNC_CNTL2 = cpu_to_be32(mpll_func_cntl_2); in rv730_populate_mclk_value()
188 mclk->mclk730.vMPLL_FUNC_CNTL3 = cpu_to_be32(mpll_func_cntl_3); in rv730_populate_mclk_value()
189 mclk->mclk730.vMPLL_SS = cpu_to_be32(mpll_ss); in rv730_populate_mclk_value()
190 mclk->mclk730.vMPLL_SS2 = cpu_to_be32(mpll_ss2); in rv730_populate_mclk_value()
294 table->ACPIState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL = cpu_to_be32(mpll_func_cntl); in rv730_populate_smc_acpi_state()
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| D | rv740_dpm.c | 114 DRM_DEBUG_KMS("Target MCLK greater than largest MCLK in DLL speed table\n"); in rv740_get_dll_speed()
187 RV7XX_SMC_MCLK_VALUE *mclk) in rv740_populate_mclk_value() argument
274 mclk->mclk770.mclk_value = cpu_to_be32(memory_clock); in rv740_populate_mclk_value()
275 mclk->mclk770.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl); in rv740_populate_mclk_value()
276 mclk->mclk770.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2); in rv740_populate_mclk_value()
277 mclk->mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); in rv740_populate_mclk_value()
278 mclk->mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2); in rv740_populate_mclk_value()
279 mclk->mclk770.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl); in rv740_populate_mclk_value()
280 mclk->mclk770.vDLL_CNTL = cpu_to_be32(dll_cntl); in rv740_populate_mclk_value()
281 mclk->mclk770.vMPLL_SS = cpu_to_be32(mpll_ss1); in rv740_populate_mclk_value()
[all …]
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| D | rv770_dpm.c | 389 RV7XX_SMC_MCLK_VALUE *mclk) in rv770_populate_mclk_value() argument
474 mclk->mclk770.mclk_value = cpu_to_be32(memory_clock); in rv770_populate_mclk_value()
475 mclk->mclk770.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl); in rv770_populate_mclk_value()
476 mclk->mclk770.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2); in rv770_populate_mclk_value()
477 mclk->mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); in rv770_populate_mclk_value()
478 mclk->mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2); in rv770_populate_mclk_value()
479 mclk->mclk770.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl); in rv770_populate_mclk_value()
480 mclk->mclk770.vDLL_CNTL = cpu_to_be32(dll_cntl); in rv770_populate_mclk_value()
593 int rv770_populate_mvdd_value(struct radeon_device *rdev, u32 mclk, in rv770_populate_mvdd_value() argument
604 if (mclk <= pi->mvdd_split_frequency) { in rv770_populate_mvdd_value()
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/radeon/ |
| D | rv730_dpm.c | 120 LPRV7XX_SMC_MCLK_VALUE mclk) in rv730_populate_mclk_value() argument
185 mclk->mclk730.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl); in rv730_populate_mclk_value()
186 mclk->mclk730.vDLL_CNTL = cpu_to_be32(dll_cntl); in rv730_populate_mclk_value()
187 mclk->mclk730.mclk_value = cpu_to_be32(memory_clock); in rv730_populate_mclk_value()
188 mclk->mclk730.vMPLL_FUNC_CNTL = cpu_to_be32(mpll_func_cntl); in rv730_populate_mclk_value()
189 mclk->mclk730.vMPLL_FUNC_CNTL2 = cpu_to_be32(mpll_func_cntl_2); in rv730_populate_mclk_value()
190 mclk->mclk730.vMPLL_FUNC_CNTL3 = cpu_to_be32(mpll_func_cntl_3); in rv730_populate_mclk_value()
191 mclk->mclk730.vMPLL_SS = cpu_to_be32(mpll_ss); in rv730_populate_mclk_value()
192 mclk->mclk730.vMPLL_SS2 = cpu_to_be32(mpll_ss2); in rv730_populate_mclk_value()
296 table->ACPIState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL = cpu_to_be32(mpll_func_cntl); in rv730_populate_smc_acpi_state()
[all …]
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| D | rv740_dpm.c | 115 DRM_DEBUG_KMS("Target MCLK greater than largest MCLK in DLL speed table\n"); in rv740_get_dll_speed()
188 RV7XX_SMC_MCLK_VALUE *mclk) in rv740_populate_mclk_value() argument
275 mclk->mclk770.mclk_value = cpu_to_be32(memory_clock); in rv740_populate_mclk_value()
276 mclk->mclk770.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl); in rv740_populate_mclk_value()
277 mclk->mclk770.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2); in rv740_populate_mclk_value()
278 mclk->mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); in rv740_populate_mclk_value()
279 mclk->mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2); in rv740_populate_mclk_value()
280 mclk->mclk770.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl); in rv740_populate_mclk_value()
281 mclk->mclk770.vDLL_CNTL = cpu_to_be32(dll_cntl); in rv740_populate_mclk_value()
282 mclk->mclk770.vMPLL_SS = cpu_to_be32(mpll_ss1); in rv740_populate_mclk_value()
[all …]
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| D | rv770_dpm.c | 387 RV7XX_SMC_MCLK_VALUE *mclk) in rv770_populate_mclk_value() argument
472 mclk->mclk770.mclk_value = cpu_to_be32(memory_clock); in rv770_populate_mclk_value()
473 mclk->mclk770.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl); in rv770_populate_mclk_value()
474 mclk->mclk770.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2); in rv770_populate_mclk_value()
475 mclk->mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); in rv770_populate_mclk_value()
476 mclk->mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2); in rv770_populate_mclk_value()
477 mclk->mclk770.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl); in rv770_populate_mclk_value()
478 mclk->mclk770.vDLL_CNTL = cpu_to_be32(dll_cntl); in rv770_populate_mclk_value()
591 int rv770_populate_mvdd_value(struct radeon_device *rdev, u32 mclk, in rv770_populate_mvdd_value() argument
602 if (mclk <= pi->mvdd_split_frequency) { in rv770_populate_mvdd_value()
[all …]
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| /kernel/linux/linux-5.10/sound/soc/mxs/ |
| D | mxs-sgtl5000.c | 26 u32 mclk; in mxs_sgtl5000_hw_params() local
32 mclk = 256 * rate; in mxs_sgtl5000_hw_params()
35 mclk = 512 * rate; in mxs_sgtl5000_hw_params()
39 /* Set SGTL5000's SYSCLK (provided by SAIF MCLK) */ in mxs_sgtl5000_hw_params()
40 ret = snd_soc_dai_set_sysclk(codec_dai, SGTL5000_SYSCLK, mclk, 0); in mxs_sgtl5000_hw_params()
43 mclk / 1000000, mclk / 1000 % 1000); in mxs_sgtl5000_hw_params()
47 /* The SAIF MCLK should be the same as SGTL5000_SYSCLK */ in mxs_sgtl5000_hw_params()
48 ret = snd_soc_dai_set_sysclk(cpu_dai, MXS_SAIF_MCLK, mclk, 0); in mxs_sgtl5000_hw_params()
51 mclk / 1000000, mclk / 1000 % 1000); in mxs_sgtl5000_hw_params()
142 * The Sgtl5000 sysclk is derived from saif0 mclk and it's range in mxs_sgtl5000_probe()
[all …]
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| D | mxs-saif.c | 55 saif->mclk = freq; in mxs_saif_set_dai_sysclk()
75 * Set SAIF clock and MCLK
78 unsigned int mclk, in mxs_saif_set_clk() argument
85 dev_dbg(saif->dev, "mclk %d rate %d\n", mclk, rate); in mxs_saif_set_clk()
110 * If MCLK is used, the SAIF clk ratio needs to match mclk ratio. in mxs_saif_set_clk()
114 * If MCLK is not used, we just set saif clk to 512*fs. in mxs_saif_set_clk()
121 switch (mclk / rate) { in mxs_saif_set_clk()
138 /* SAIF MCLK should be a sub-rate of 512x or 384x */ in mxs_saif_set_clk()
160 * Program the over-sample rate for MCLK output in mxs_saif_set_clk()
162 * The available MCLK range is 32x, 48x... 512x. The rate in mxs_saif_set_clk()
[all …]
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| /kernel/linux/linux-6.6/sound/soc/mxs/ |
| D | mxs-sgtl5000.c | 26 u32 mclk; in mxs_sgtl5000_hw_params() local
32 mclk = 256 * rate; in mxs_sgtl5000_hw_params()
35 mclk = 512 * rate; in mxs_sgtl5000_hw_params()
39 /* Set SGTL5000's SYSCLK (provided by SAIF MCLK) */ in mxs_sgtl5000_hw_params()
40 ret = snd_soc_dai_set_sysclk(codec_dai, SGTL5000_SYSCLK, mclk, 0); in mxs_sgtl5000_hw_params()
43 mclk / 1000000, mclk / 1000 % 1000); in mxs_sgtl5000_hw_params()
47 /* The SAIF MCLK should be the same as SGTL5000_SYSCLK */ in mxs_sgtl5000_hw_params()
48 ret = snd_soc_dai_set_sysclk(cpu_dai, MXS_SAIF_MCLK, mclk, 0); in mxs_sgtl5000_hw_params()
51 mclk / 1000000, mclk / 1000 % 1000); in mxs_sgtl5000_hw_params()
142 * The Sgtl5000 sysclk is derived from saif0 mclk and it's range in mxs_sgtl5000_probe()
[all …]
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| D | mxs-saif.c | 55 saif->mclk = freq; in mxs_saif_set_dai_sysclk()
75 * Set SAIF clock and MCLK
78 unsigned int mclk, in mxs_saif_set_clk() argument
85 dev_dbg(saif->dev, "mclk %d rate %d\n", mclk, rate); in mxs_saif_set_clk()
110 * If MCLK is used, the SAIF clk ratio needs to match mclk ratio. in mxs_saif_set_clk()
114 * If MCLK is not used, we just set saif clk to 512*fs. in mxs_saif_set_clk()
121 switch (mclk / rate) { in mxs_saif_set_clk()
138 /* SAIF MCLK should be a sub-rate of 512x or 384x */ in mxs_saif_set_clk()
160 * Program the over-sample rate for MCLK output in mxs_saif_set_clk()
162 * The available MCLK range is 32x, 48x... 512x. The rate in mxs_saif_set_clk()
[all …]
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| /kernel/linux/linux-6.6/sound/soc/qcom/qdsp6/ |
| D | q6prm.h | 67 /* Clock ID for MCLK for WSA2 core */
69 /* Clock ID for NPL MCLK for WSA2 core */
71 /* Clock ID for RX Core TX MCLK */
73 /* Clock ID for RX CORE TX 2X MCLK */
75 /* Clock ID for WSA core TX MCLK */
77 /* Clock ID for WSA core TX 2X MCLK */
79 /* Clock ID for WSA2 core TX MCLK */
81 /* Clock ID for WSA2 core TX 2X MCLK */
83 /* Clock ID for RX CORE MCLK2 2X MCLK */
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| /kernel/linux/linux-5.10/sound/soc/intel/boards/ |
| D | cht_bsw_rt5672.c | 26 /* The platform clock #3 outputs 19.2Mhz clock to codec as I2S MCLK */
33 struct clk *mclk; member
64 if (ctx->mclk) { in platform_clock_control()
65 ret = clk_prepare_enable(ctx->mclk); in platform_clock_control()
68 "could not configure MCLK state"); in platform_clock_control()
73 /* set codec PLL source to the 19.2MHz platform clock (MCLK) */ in platform_clock_control()
90 * PLL will be off when idle and MCLK will also be off by ACPI in platform_clock_control()
97 if (ctx->mclk) in platform_clock_control()
98 clk_disable_unprepare(ctx->mclk); in platform_clock_control()
150 /* set codec PLL source to the 19.2MHz platform clock (MCLK) */ in cht_aif1_hw_params()
[all …]
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| /kernel/linux/linux-5.10/sound/soc/rockchip/ |
| D | rk3399_gru_sound.c | 68 unsigned int mclk; in rockchip_sound_max98357a_hw_params() local
71 mclk = params_rate(params) * SOUND_FS; in rockchip_sound_max98357a_hw_params()
73 ret = snd_soc_dai_set_sysclk(asoc_rtd_to_cpu(rtd, 0), 0, mclk, 0); in rockchip_sound_max98357a_hw_params()
76 __func__, mclk, ret); in rockchip_sound_max98357a_hw_params()
89 unsigned int mclk; in rockchip_sound_rt5514_hw_params() local
92 mclk = params_rate(params) * SOUND_FS; in rockchip_sound_rt5514_hw_params()
94 ret = snd_soc_dai_set_sysclk(cpu_dai, 0, mclk, in rockchip_sound_rt5514_hw_params()
102 mclk, SND_SOC_CLOCK_IN); in rockchip_sound_rt5514_hw_params()
121 int mclk, ret; in rockchip_sound_da7219_hw_params() local
123 /* in bypass mode, the mclk has to be one of the frequencies below */ in rockchip_sound_da7219_hw_params()
[all …]
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| D | rockchip_spdif.c | 36 struct clk *mclk; member
70 clk_disable_unprepare(spdif->mclk); in rk_spdif_runtime_suspend()
81 ret = clk_prepare_enable(spdif->mclk); in rk_spdif_runtime_resume()
83 dev_err(spdif->dev, "mclk clock enable failed %d\n", ret); in rk_spdif_runtime_resume()
89 clk_disable_unprepare(spdif->mclk); in rk_spdif_runtime_resume()
99 clk_disable_unprepare(spdif->mclk); in rk_spdif_runtime_resume()
112 int srate, mclk; in rk_spdif_hw_params() local
116 mclk = srate * 128; in rk_spdif_hw_params()
133 ret = clk_set_rate(spdif->mclk, mclk); in rk_spdif_hw_params()
313 spdif->mclk = devm_clk_get(&pdev->dev, "mclk"); in rk_spdif_probe()
[all …]
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| /kernel/linux/linux-6.6/sound/soc/rockchip/ |
| D | rk3399_gru_sound.c | 72 unsigned int mclk; in rockchip_sound_max98357a_hw_params() local
75 mclk = params_rate(params) * SOUND_FS; in rockchip_sound_max98357a_hw_params()
77 ret = snd_soc_dai_set_sysclk(asoc_rtd_to_cpu(rtd, 0), 0, mclk, 0); in rockchip_sound_max98357a_hw_params()
80 __func__, mclk, ret); in rockchip_sound_max98357a_hw_params()
93 unsigned int mclk; in rockchip_sound_rt5514_hw_params() local
96 mclk = params_rate(params) * SOUND_FS; in rockchip_sound_rt5514_hw_params()
98 ret = snd_soc_dai_set_sysclk(cpu_dai, 0, mclk, in rockchip_sound_rt5514_hw_params()
106 mclk, SND_SOC_CLOCK_IN); in rockchip_sound_rt5514_hw_params()
125 int mclk, ret; in rockchip_sound_da7219_hw_params() local
127 /* in bypass mode, the mclk has to be one of the frequencies below */ in rockchip_sound_da7219_hw_params()
[all …]
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| D | rockchip_spdif.c | 36 struct clk *mclk; member
72 clk_disable_unprepare(spdif->mclk); in rk_spdif_runtime_suspend()
83 ret = clk_prepare_enable(spdif->mclk); in rk_spdif_runtime_resume()
85 dev_err(spdif->dev, "mclk clock enable failed %d\n", ret); in rk_spdif_runtime_resume()
91 clk_disable_unprepare(spdif->mclk); in rk_spdif_runtime_resume()
101 clk_disable_unprepare(spdif->mclk); in rk_spdif_runtime_resume()
114 int srate, mclk; in rk_spdif_hw_params() local
118 mclk = srate * 128; in rk_spdif_hw_params()
135 ret = clk_set_rate(spdif->mclk, mclk); in rk_spdif_hw_params()
318 spdif->mclk = devm_clk_get(&pdev->dev, "mclk"); in rk_spdif_probe()
[all …]
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| /kernel/linux/linux-5.10/sound/soc/meson/ |
| D | axg-tdm-interface.c | 106 if (!iface->mclk) { in axg_tdm_iface_set_sysclk()
109 ret = clk_set_rate(iface->mclk, freq); in axg_tdm_iface_set_sysclk()
124 if (!iface->mclk) { in axg_tdm_iface_set_fmt()
125 dev_err(dai->dev, "cpu clock master: mclk missing\n"); in axg_tdm_iface_set_fmt()
269 /* If no specific mclk is requested, default to bit clock * 4 */ in axg_tdm_iface_set_sclk()
270 clk_set_rate(iface->mclk, 4 * srate); in axg_tdm_iface_set_sclk()
272 /* Check if we can actually get the bit clock from mclk */ in axg_tdm_iface_set_sclk()
275 "can't derive sclk %lu from mclk %lu\n", in axg_tdm_iface_set_sclk()
454 ret = clk_prepare_enable(iface->mclk); in axg_tdm_iface_set_bias_level()
459 clk_disable_unprepare(iface->mclk); in axg_tdm_iface_set_bias_level()
[all …]
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| /kernel/linux/linux-5.10/sound/soc/ti/ |
| D | davinci-evm.c | 25 struct clk *mclk; member
36 if (drvdata->mclk) in evm_startup()
37 return clk_prepare_enable(drvdata->mclk); in evm_startup()
49 if (drvdata->mclk) in evm_shutdown()
50 clk_disable_unprepare(drvdata->mclk); in evm_shutdown()
390 struct clk *mclk; in davinci_evm_probe() local
418 mclk = devm_clk_get(&pdev->dev, "mclk"); in davinci_evm_probe()
419 if (PTR_ERR(mclk) == -EPROBE_DEFER) { in davinci_evm_probe()
421 } else if (IS_ERR(mclk)) { in davinci_evm_probe()
422 dev_dbg(&pdev->dev, "mclk not found.\n"); in davinci_evm_probe()
[all …]
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| /kernel/linux/linux-6.6/sound/soc/meson/ |
| D | axg-tdm-interface.c | 107 if (!iface->mclk) { in axg_tdm_iface_set_sysclk()
110 ret = clk_set_rate(iface->mclk, freq); in axg_tdm_iface_set_sysclk()
125 if (!iface->mclk) { in axg_tdm_iface_set_fmt()
126 dev_err(dai->dev, "cpu clock master: mclk missing\n"); in axg_tdm_iface_set_fmt()
278 /* If no specific mclk is requested, default to bit clock * 2 */ in axg_tdm_iface_set_sclk()
279 clk_set_rate(iface->mclk, 2 * srate); in axg_tdm_iface_set_sclk()
281 /* Check if we can actually get the bit clock from mclk */ in axg_tdm_iface_set_sclk()
284 "can't derive sclk %lu from mclk %lu\n", in axg_tdm_iface_set_sclk()
469 ret = clk_prepare_enable(iface->mclk); in axg_tdm_iface_set_bias_level()
474 clk_disable_unprepare(iface->mclk); in axg_tdm_iface_set_bias_level()
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| /kernel/linux/linux-6.6/include/dt-bindings/sound/ |
| D | qcom,q6dsp-lpass-ports.h | 204 /* Clock ID for MCLK for WSA2 core */
206 /* Clock ID for NPL MCLK for WSA2 core */
208 /* Clock ID for RX Core TX MCLK */
210 /* Clock ID for RX CORE TX 2X MCLK */
212 /* Clock ID for WSA core TX MCLK */
214 /* Clock ID for WSA core TX 2X MCLK */
216 /* Clock ID for WSA2 core TX MCLK */
218 /* Clock ID for WSA2 core TX 2X MCLK */
220 /* Clock ID for RX CORE MCLK2 2X MCLK */
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| /kernel/linux/linux-6.6/sound/soc/intel/skylake/ |
| D | skl-nhlt.c | 170 /* MCLK Divider Source Select */ in skl_get_ssp_clks()
173 clk_src = get_clk_src(i2s_config->mclk, in skl_get_ssp_clks()
176 clk_src = get_clk_src(i2s_config_ext->mclk, in skl_get_ssp_clks()
204 static void skl_get_mclk(struct skl_dev *skl, struct skl_ssp_clk *mclk, in skl_get_mclk() argument
217 /* MCLK Divider Source Select and divider */ in skl_get_mclk()
220 clk_src = get_clk_src(i2s_config->mclk, in skl_get_mclk()
222 clkdiv = i2s_config->mclk.mdivr & in skl_get_mclk()
225 clk_src = get_clk_src(i2s_config_ext->mclk, in skl_get_mclk()
227 clkdiv = i2s_config_ext->mclk.mdivr[0] & in skl_get_mclk()
238 /* Calculate MCLK rate from source using div value */ in skl_get_mclk()
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