| /kernel/linux/linux-6.6/drivers/net/mdio/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 # MDIO Layer Configuration
7 tristate "MDIO bus device drivers"
9 MDIO devices and driver infrastructure code.
20 loadable module or built-in.
27 FWNODE MDIO bus (Ethernet PHY) accessors
35 OpenFirmware MDIO bus (Ethernet PHY) accessors
42 ACPI MDIO bus (Ethernet PHY) accessors
50 tristate "Allwinner sun4i MDIO interface support"
53 This driver supports the MDIO interface found in the network
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| D | mdio-bcm-unimac.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Broadcom UniMAC MDIO bus controller driver
5 * Copyright (C) 2014-2017 Broadcom
17 #include <linux/platform_data/mdio-bcm-unimac.h>
50 * peripheral registers for CPU-native byte order. in unimac_mdio_readl()
53 return __raw_readl(priv->base + offset); in unimac_mdio_readl()
55 return readl_relaxed(priv->base + offset); in unimac_mdio_readl()
62 __raw_writel(val, priv->base + offset); in unimac_mdio_writel()
64 writel_relaxed(val, priv->base + offset); in unimac_mdio_writel()
91 } while (--timeout); in unimac_mdio_poll()
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| /kernel/linux/linux-5.10/drivers/net/mdio/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 # MDIO Layer Configuration
7 tristate "MDIO bus device drivers"
9 MDIO devices and driver infrastructure code.
20 loadable module or built-in.
28 OpenFirmware MDIO bus (Ethernet PHY) accessors
36 tristate "Allwinner sun4i MDIO interface support"
39 This driver supports the MDIO interface found in the network
44 tristate "APM X-Gene SoC MDIO bus controller"
47 This module provides a driver for the MDIO busses found in the
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| D | mdio-bcm-unimac.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Broadcom UniMAC MDIO bus controller driver
5 * Copyright (C) 2014-2017 Broadcom
17 #include <linux/platform_data/mdio-bcm-unimac.h>
50 * peripheral registers for CPU-native byte order. in unimac_mdio_readl()
53 return __raw_readl(priv->base + offset); in unimac_mdio_readl()
55 return readl_relaxed(priv->base + offset); in unimac_mdio_readl()
62 __raw_writel(val, priv->base + offset); in unimac_mdio_writel()
64 writel_relaxed(val, priv->base + offset); in unimac_mdio_writel()
91 } while (--timeout); in unimac_mdio_poll()
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| /kernel/linux/linux-6.6/drivers/net/ethernet/hisilicon/ |
| D | hns_mdio.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) 2014-2015 Hisilicon Limited.
23 #define MDIO_DRV_NAME "Hi-HNS_MDIO"
24 #define MDIO_BUS_NAME "Hisilicon MII Bus"
38 u8 __iomem *vbase; /* mdio reg base address */
43 /* mdio reg */
101 mdio_write_reg((a)->vbase, (reg), (value))
126 mdio_set_reg_field((dev)->vbase, (reg), (mask), (shift), (val))
137 mdio_get_reg_field((dev)->vbase, (reg), (mask), (shift))
140 mdio_get_reg_field((dev)->vbase, (reg), 0x1ull, (bit))
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/ |
| D | mdio-mux-multiplexer.txt | 1 Properties for an MDIO bus multiplexer consumer device
3 This is a special case of MDIO mux when MDIO mux is defined as a consumer
7 Required properties in addition to the MDIO Bus multiplexer properties:
9 - compatible : should be "mmio-mux-multiplexer"
10 - mux-controls : mux controller node to use for operating the mux
11 - mdio-parent-bus : phandle to the parent MDIO bus.
13 each child node of mdio bus multiplexer consumer device represent a mdio
14 bus.
17 Documentation/devicetree/bindings/mux/mux-controller.txt
18 and Documentation/devicetree/bindings/net/mdio-mux.txt
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| D | mdio-mux-mmioreg.txt | 1 Properties for an MDIO bus multiplexer controlled by a memory-mapped device
3 This is a special case of a MDIO bus multiplexer. A memory-mapped device,
4 like an FPGA, is used to control which child bus is connected. The mdio-mux
5 node must be a child of the memory-mapped device. The driver currently only
6 supports devices with 8, 16 or 32-bit registers.
10 - compatible : string, must contain "mdio-mux-mmioreg"
12 - reg : integer, contains the offset of the register that controls the bus
16 - mux-mask : integer, contains an eight-bit mask that specifies which
17 bits in the register control the actual bus multiplexer. The
18 'reg' property of each child mdio-mux node must be constrained by
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| D | brcm,unimac-mdio.txt | 1 * Broadcom UniMAC MDIO bus controller
4 - compatible: should one from "brcm,genet-mdio-v1", "brcm,genet-mdio-v2",
5 "brcm,genet-mdio-v3", "brcm,genet-mdio-v4", "brcm,genet-mdio-v5" or
6 "brcm,unimac-mdio"
7 - reg: address and length of the register set for the device, first one is the
9 larger than 16-bits MDIO transactions
10 - reg-names: name(s) of the register must be "mdio" and optional "mdio_indir_rw"
11 - #size-cells: must be 1
12 - #address-cells: must be 0
15 - interrupts: must be one if the interrupt is shared with the Ethernet MAC or
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| D | mdio.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/mdio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MDIO Bus Generic Binding
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
15 These are generic properties that can apply to any MDIO bus. Any
16 MDIO bus must have a list of child nodes, one per device on the
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| /kernel/linux/linux-5.10/drivers/net/ethernet/xilinx/ |
| D | xilinx_axienet_mdio.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * MDIO bus driver for the Xilinx Axi Ethernet device
6 * Copyright (c) 2010 - 2011 Michal Simek <monstr@monstr.eu>
7 * Copyright (c) 2010 - 2011 PetaLogix
9 * Copyright (c) 2010 - 2012 Xilinx, Inc. All rights reserved.
23 /* Wait till MDIO interface is ready to accept a new transaction.*/
34 * axienet_mdio_read - MDIO interface read function
35 * @bus: Pointer to mii bus structure
39 * Return: The register contents on success, -ETIMEDOUT on a timeout
45 static int axienet_mdio_read(struct mii_bus *bus, int phy_id, int reg) in axienet_mdio_read() argument
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| /kernel/linux/linux-6.6/drivers/net/ethernet/arc/ |
| D | emac_mdio.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2004-2013 Synopsys, Inc. (www.synopsys.com)
5 * MDIO implementation for ARC EMAC
15 /* Number of seconds we wait for "MDIO complete" flag to appear */
19 * arc_mdio_complete_wait - Waits until MDIO transaction is completed.
22 * returns: 0 on success, -ETIMEDOUT on a timeout.
34 /* Reset "MDIO complete" flag */ in arc_mdio_complete_wait()
42 return -ETIMEDOUT; in arc_mdio_complete_wait()
46 * arc_mdio_read - MDIO interface read function.
47 * @bus: Pointer to MII bus structure.
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| /kernel/linux/linux-5.10/include/linux/ |
| D | mdio.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/mdio.h: definitions for MDIO (clause 45) transceivers
4 * Copyright 2006-2009 Solarflare Communications Inc.
9 #include <uapi/linux/mdio.h>
37 struct mii_bus *bus; member
44 /* Bus address of the MDIO device (0-31) */
54 /* struct mdio_driver_common: Common to all MDIO drivers */
63 /* struct mdio_driver: Generic MDIO driver */
69 * up device-specific structures, if any
83 static inline void mdiodev_set_drvdata(struct mdio_device *mdio, void *data) in mdiodev_set_drvdata() argument
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| /kernel/linux/linux-6.6/drivers/net/ethernet/xilinx/ |
| D | xilinx_axienet_mdio.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * MDIO bus driver for the Xilinx Axi Ethernet device
6 * Copyright (c) 2010 - 2011 Michal Simek <monstr@monstr.eu>
7 * Copyright (c) 2010 - 2011 PetaLogix
9 * Copyright (c) 2010 - 2012 Xilinx, Inc. All rights reserved.
23 /* Wait till MDIO interface is ready to accept a new transaction.*/
33 /* Enable the MDIO MDC. Called prior to a read/write operation */
37 ((u32)lp->mii_clk_div | XAE_MDIO_MC_MDIOEN_MASK)); in axienet_mdio_mdc_enable()
40 /* Disable the MDIO MDC. Called after a read/write operation*/
51 * axienet_mdio_read - MDIO interface read function
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| /kernel/linux/linux-5.10/drivers/net/ethernet/hisilicon/ |
| D | hns_mdio.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) 2014-2015 Hisilicon Limited.
23 #define MDIO_DRV_NAME "Hi-HNS_MDIO"
24 #define MDIO_BUS_NAME "Hisilicon MII Bus"
38 u8 __iomem *vbase; /* mdio reg base address */
43 /* mdio reg */
101 mdio_write_reg((a)->vbase, (reg), (value))
126 mdio_set_reg_field((dev)->vbase, (reg), (mask), (shift), (val))
137 mdio_get_reg_field((dev)->vbase, (reg), (mask), (shift))
140 mdio_get_reg_field((dev)->vbase, (reg), 0x1ull, (bit))
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| /kernel/linux/linux-6.6/drivers/net/phy/ |
| D | mdio_bus.c | 1 // SPDX-License-Identifier: GPL-2.0+
2 /* MDIO Bus interface
40 #include <trace/events/mdio.h>
42 #include "mdio-boardinfo.h"
47 mdiodev->reset_gpio = gpiod_get_optional(&mdiodev->dev, in mdiobus_register_gpiod()
49 if (IS_ERR(mdiodev->reset_gpio)) in mdiobus_register_gpiod()
50 return PTR_ERR(mdiodev->reset_gpio); in mdiobus_register_gpiod()
52 if (mdiodev->reset_gpio) in mdiobus_register_gpiod()
53 gpiod_set_consumer_name(mdiodev->reset_gpio, "PHY reset"); in mdiobus_register_gpiod()
62 reset = reset_control_get_optional_exclusive(&mdiodev->dev, "phy"); in mdiobus_register_reset()
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| /kernel/linux/linux-5.10/drivers/net/ethernet/arc/ |
| D | emac_mdio.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2004-2013 Synopsys, Inc. (www.synopsys.com)
5 * MDIO implementation for ARC EMAC
15 /* Number of seconds we wait for "MDIO complete" flag to appear */
19 * arc_mdio_complete_wait - Waits until MDIO transaction is completed.
22 * returns: 0 on success, -ETIMEDOUT on a timeout.
34 /* Reset "MDIO complete" flag */ in arc_mdio_complete_wait()
42 return -ETIMEDOUT; in arc_mdio_complete_wait()
46 * arc_mdio_read - MDIO interface read function.
47 * @bus: Pointer to MII bus structure.
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| /kernel/linux/linux-6.6/drivers/net/ethernet/freescale/ |
| D | fsl_pq_mdio.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Freescale PowerQUICC Ethernet Driver -- MIIM bus implementation
4 * Provides Bus interface for MIIM regs
9 * Copyright 2002-2004, 2008-2009 Freescale Semiconductor, Inc.
51 u32 ieventm; /* MDIO Interrupt event register (for etsec2)*/
52 u32 imaskm; /* MDIO Interrupt mask register (for etsec2)*/
54 u32 emapm; /* MDIO Event mapping register (for etsec2)*/
71 * Per-device-type data. Each type of device tree node that we support gets
89 * Write value to the PHY at mii_id at register regnum, on the bus attached
90 * to the local interface, which may be different from the generic mdio bus
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| /kernel/linux/linux-5.10/drivers/net/ethernet/freescale/ |
| D | fsl_pq_mdio.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Freescale PowerQUICC Ethernet Driver -- MIIM bus implementation
4 * Provides Bus interface for MIIM regs
9 * Copyright 2002-2004, 2008-2009 Freescale Semiconductor, Inc.
50 u32 ieventm; /* MDIO Interrupt event register (for etsec2)*/
51 u32 imaskm; /* MDIO Interrupt mask register (for etsec2)*/
53 u32 emapm; /* MDIO Event mapping register (for etsec2)*/
70 * Per-device-type data. Each type of device tree node that we support gets
88 * Write value to the PHY at mii_id at register regnum, on the bus attached
89 * to the local interface, which may be different from the generic mdio bus
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| /kernel/linux/linux-5.10/drivers/net/phy/ |
| D | mdio_bus.c | 1 // SPDX-License-Identifier: GPL-2.0+
2 /* MDIO Bus interface
39 #include <trace/events/mdio.h>
41 #include "mdio-boardinfo.h"
46 mdiodev->reset_gpio = gpiod_get_optional(&mdiodev->dev, in mdiobus_register_gpiod()
48 if (IS_ERR(mdiodev->reset_gpio)) in mdiobus_register_gpiod()
49 return PTR_ERR(mdiodev->reset_gpio); in mdiobus_register_gpiod()
51 if (mdiodev->reset_gpio) in mdiobus_register_gpiod()
52 gpiod_set_consumer_name(mdiodev->reset_gpio, "PHY reset"); in mdiobus_register_gpiod()
61 reset = reset_control_get_optional_exclusive(&mdiodev->dev, "phy"); in mdiobus_register_reset()
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/ |
| D | mdio.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/mdio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MDIO Bus Common Properties
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
15 These are generic properties that can apply to any MDIO bus. Any
16 MDIO bus must have a list of child nodes, one per device on the
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| D | mdio-mux-mmioreg.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/mdio-mux-mmioreg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Properties for an MDIO bus multiplexer controlled by a memory-mapped device
10 - Andrew Lunn <andrew@lunn.ch>
13 This is a special case of a MDIO bus multiplexer. A memory-mapped device,
14 like an FPGA, is used to control which child bus is connected. The mdio-mux
15 node must be a child of the memory-mapped device. The driver currently only
16 supports devices with 8, 16 or 32-bit registers.
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| D | amlogic,gxl-mdio-mux.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/amlogic,gxl-mdio-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Amlogic GXL MDIO bus multiplexer
10 - Jerome Brunet <jbrunet@baylibre.com>
13 This is a special case of a MDIO bus multiplexer. It allows to choose between
14 the internal mdio bus leading to the embedded 10/100 PHY or the external
15 MDIO bus on the Amlogic GXL SoC family.
18 - $ref: mdio-mux.yaml#
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| D | brcm,unimac-mdio.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/brcm,unimac-mdio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom UniMAC MDIO bus controller
10 - Doug Berger <opendmb@gmail.com>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Rafał Miłecki <rafal@milecki.pl>
15 - $ref: mdio.yaml#
20 - brcm,genet-mdio-v1
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| D | mdio-mux.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/mdio-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Common MDIO bus multiplexer/switch properties.
10 - Andrew Lunn <andrew@lunn.ch>
13 An MDIO bus multiplexer/switch will have several child busses that are
14 numbered uniquely in a device dependent manner. The nodes for an MDIO
15 bus multiplexer/switch will have one child node for each child bus.
18 mdio-parent-bus:
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| /kernel/linux/linux-5.10/drivers/net/pcs/ |
| D | pcs-lynx.c | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Lynx PCS MDIO helpers
6 #include <linux/mdio.h>
8 #include <linux/pcs-lynx.h>
36 struct mii_bus *bus = pcs->bus; in lynx_pcs_get_state_usxgmii() local
37 int addr = pcs->addr; in lynx_pcs_get_state_usxgmii()
40 status = mdiobus_c45_read(bus, addr, MDIO_MMD_VEND2, MII_BMSR); in lynx_pcs_get_state_usxgmii()
44 state->link = !!(status & MDIO_STAT1_LSTATUS); in lynx_pcs_get_state_usxgmii()
45 state->an_complete = !!(status & MDIO_AN_STAT1_COMPLETE); in lynx_pcs_get_state_usxgmii()
46 if (!state->link || !state->an_complete) in lynx_pcs_get_state_usxgmii()
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