| /kernel/linux/linux-5.10/drivers/gpu/drm/ttm/ |
| D | ttm_bo_util.c | 1 /* SPDX-License-Identifier: GPL-2.0 OR MIT */
4 * Copyright (c) 2007-2009 VMware, Inc., Palo Alto, CA., USA
21 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
29 * Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com>
41 #include <linux/dma-resv.h>
44 struct ttm_buffer_object base; member
50 ttm_resource_free(bo, &bo->mem); in ttm_bo_free_old_node()
57 struct ttm_tt *ttm = bo->ttm; in ttm_bo_move_ttm()
58 struct ttm_resource *old_mem = &bo->mem; in ttm_bo_move_ttm()
61 if (old_mem->mem_type != TTM_PL_SYSTEM) { in ttm_bo_move_ttm()
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| D | ttm_bo.c | 1 /* SPDX-License-Identifier: GPL-2.0 OR MIT */
4 * Copyright (c) 2006-2009 VMware, Inc., Palo Alto, CA., USA
21 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
29 * Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com>
44 #include <linux/dma-resv.h>
49 * ttm_global_mutex - protecting the global BO state
75 bo, bo->mem.num_pages, bo->mem.size >> 10, in ttm_bo_mem_space_debug()
76 bo->mem.size >> 20); in ttm_bo_mem_space_debug()
77 for (i = 0; i < placement->num_placement; i++) { in ttm_bo_mem_space_debug()
78 mem_type = placement->placement[i].mem_type; in ttm_bo_mem_space_debug()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/dispnv50/ |
| D | headc57d.c | 33 struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push; in headc57d_or()
34 const int i = head->base.index; in headc57d_or()
41 switch (asyh->or.depth) { in headc57d_or()
47 depth = asyh->or.depth; in headc57d_or()
56 NVVAL(NVC57D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, CRC_MODE, asyh->or.crc_raster) | in headc57d_or()
57 NVVAL(NVC57D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, HSYNC_POLARITY, asyh->or.nhsync) | in headc57d_or()
58 NVVAL(NVC57D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, VSYNC_POLARITY, asyh->or.nvsync) | in headc57d_or()
68 struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push; in headc57d_procamp()
69 const int i = head->base.index; in headc57d_procamp()
86 struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push; in headc57d_olut_clr()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/dispnv50/ |
| D | headc57d.c | 33 struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push; in headc57d_or()
34 const int i = head->base.index; in headc57d_or()
41 switch (asyh->or.depth) { in headc57d_or()
47 depth = asyh->or.depth; in headc57d_or()
56 NVVAL(NVC57D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, CRC_MODE, asyh->or.crc_raster) | in headc57d_or()
57 NVVAL(NVC57D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, HSYNC_POLARITY, asyh->or.nhsync) | in headc57d_or()
58 NVVAL(NVC57D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, VSYNC_POLARITY, asyh->or.nvsync) | in headc57d_or()
68 struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push; in headc57d_procamp()
69 const int i = head->base.index; in headc57d_procamp()
86 struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push; in headc57d_olut_clr()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/bar/ |
| D | nv50.c | 32 nv50_bar_flush(struct nvkm_bar *base) in nv50_bar_flush() argument
34 struct nv50_bar *bar = nv50_bar(base); in nv50_bar_flush()
35 struct nvkm_device *device = bar->base.subdev.device; in nv50_bar_flush()
37 spin_lock_irqsave(&bar->base.lock, flags); in nv50_bar_flush()
43 spin_unlock_irqrestore(&bar->base.lock, flags); in nv50_bar_flush()
47 nv50_bar_bar1_vmm(struct nvkm_bar *base) in nv50_bar_bar1_vmm() argument
49 return nv50_bar(base)->bar1_vmm; in nv50_bar_bar1_vmm()
53 nv50_bar_bar1_wait(struct nvkm_bar *base) in nv50_bar_bar1_wait() argument
55 nvkm_bar_flush(base); in nv50_bar_bar1_wait()
61 nvkm_wr32(bar->subdev.device, 0x001708, 0x00000000); in nv50_bar_bar1_fini()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/subdev/bar/ |
| D | nv50.c | 32 nv50_bar_flush(struct nvkm_bar *base) in nv50_bar_flush() argument
34 struct nv50_bar *bar = nv50_bar(base); in nv50_bar_flush()
35 struct nvkm_device *device = bar->base.subdev.device; in nv50_bar_flush()
37 spin_lock_irqsave(&bar->base.lock, flags); in nv50_bar_flush()
43 spin_unlock_irqrestore(&bar->base.lock, flags); in nv50_bar_flush()
47 nv50_bar_bar1_vmm(struct nvkm_bar *base) in nv50_bar_bar1_vmm() argument
49 return nv50_bar(base)->bar1_vmm; in nv50_bar_bar1_vmm()
53 nv50_bar_bar1_wait(struct nvkm_bar *base) in nv50_bar_bar1_wait() argument
55 nvkm_bar_flush(base); in nv50_bar_bar1_wait()
61 nvkm_wr32(bar->subdev.device, 0x001708, 0x00000000); in nv50_bar_bar1_fini()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_amdkfd_gpuvm.c | 1 // SPDX-License-Identifier: MIT
3 * Copyright 2014-2018 Advanced Micro Devices, Inc.
23 #include <linux/dma-buf.h>
72 #define domain_string(domain) domain_bit_to_string[ffs(domain)-1]
77 struct kgd_mem *mem) in kfd_mem_is_attached() argument
81 list_for_each_entry(entry, &mem->attachments, list) in kfd_mem_is_attached()
82 if (entry->bo_va->base.vm == avm) in kfd_mem_is_attached()
89 * reuse_dmamap() - Check whether adev can share the original
103 return (adev->ram_is_direct_mapped && bo_adev->ram_is_direct_mapped) || in reuse_dmamap()
104 (adev->dev->iommu_group == bo_adev->dev->iommu_group); in reuse_dmamap()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/ttm/ |
| D | ttm_bo_util.c | 1 /* SPDX-License-Identifier: GPL-2.0 OR MIT */
4 * Copyright (c) 2007-2009 VMware, Inc., Palo Alto, CA., USA
21 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
29 * Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com>
41 struct ttm_buffer_object base; member
46 struct ttm_resource *mem) in ttm_mem_io_reserve() argument
48 if (mem->bus.offset || mem->bus.addr) in ttm_mem_io_reserve()
51 mem->bus.is_iomem = false; in ttm_mem_io_reserve()
52 if (!bdev->funcs->io_mem_reserve) in ttm_mem_io_reserve()
55 return bdev->funcs->io_mem_reserve(bdev, mem); in ttm_mem_io_reserve()
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| /kernel/linux/linux-5.10/drivers/watchdog/ |
| D | menz69_wdt.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Watchdog driver for the MEN z069 IP-Core
15 void __iomem *base; member
16 struct resource *mem; member
39 val = readw(drv->base + MEN_Z069_WTR); in men_z069_wdt_start()
41 writew(val, drv->base + MEN_Z069_WTR); in men_z069_wdt_start()
51 val = readw(drv->base + MEN_Z069_WTR); in men_z069_wdt_stop()
53 writew(val, drv->base + MEN_Z069_WTR); in men_z069_wdt_stop()
64 val = readw(drv->base + MEN_Z069_WVR); in men_z069_wdt_ping()
66 writew(val, drv->base + MEN_Z069_WVR); in men_z069_wdt_ping()
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| /kernel/linux/linux-6.6/drivers/watchdog/ |
| D | menz69_wdt.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Watchdog driver for the MEN z069 IP-Core
15 void __iomem *base; member
16 struct resource *mem; member
39 val = readw(drv->base + MEN_Z069_WTR); in men_z069_wdt_start()
41 writew(val, drv->base + MEN_Z069_WTR); in men_z069_wdt_start()
51 val = readw(drv->base + MEN_Z069_WTR); in men_z069_wdt_stop()
53 writew(val, drv->base + MEN_Z069_WTR); in men_z069_wdt_stop()
64 val = readw(drv->base + MEN_Z069_WVR); in men_z069_wdt_ping()
66 writew(val, drv->base + MEN_Z069_WVR); in men_z069_wdt_ping()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_amdkfd_gpuvm.c | 2 * Copyright 2014-2018 Advanced Micro Devices, Inc.
22 #include <linux/dma-buf.h>
60 #define domain_string(domain) domain_bit_to_string[ffs(domain)-1]
71 struct kgd_mem *mem) in check_if_add_bo_to_vm() argument
75 list_for_each_entry(entry, &mem->bo_va_list, bo_list) in check_if_add_bo_to_vm()
76 if (entry->bo_va->base.vm == avm) in check_if_add_bo_to_vm()
83 * System (TTM + userptr) memory - 15/16th System RAM
84 * TTM memory - 3/8th System RAM
89 uint64_t mem; in amdgpu_amdkfd_gpuvm_init_mem_limits() local
92 mem = si.totalram - si.totalhigh; in amdgpu_amdkfd_gpuvm_init_mem_limits()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/ |
| D | nouveau_mem.c | 36 nouveau_mem_map(struct nouveau_mem *mem, in nouveau_mem_map() argument
47 switch (vmm->object.oclass) { in nouveau_mem_map()
54 args.nv50.kind = mem->kind; in nouveau_mem_map()
55 args.nv50.comp = mem->comp; in nouveau_mem_map()
62 if (mem->mem.type & NVIF_MEM_VRAM) in nouveau_mem_map()
68 args.gf100.kind = mem->kind; in nouveau_mem_map()
73 return -ENOSYS; in nouveau_mem_map()
76 super = vmm->object.client->super; in nouveau_mem_map()
77 vmm->object.client->super = true; in nouveau_mem_map()
78 ret = nvif_vmm_map(vmm, vma->addr, mem->mem.size, &args, argc, in nouveau_mem_map()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/gem/ |
| D | i915_gem_stolen.c | 2 * SPDX-License-Identifier: MIT
4 * Copyright © 2008-2012 Intel Corporation
46 if (!drm_mm_initialized(&i915->mm.stolen)) in i915_gem_stolen_insert_node_in_range()
47 return -ENODEV; in i915_gem_stolen_insert_node_in_range()
53 mutex_lock(&i915->mm.stolen_lock); in i915_gem_stolen_insert_node_in_range()
54 ret = drm_mm_insert_node_in_range(&i915->mm.stolen, node, in i915_gem_stolen_insert_node_in_range()
57 mutex_unlock(&i915->mm.stolen_lock); in i915_gem_stolen_insert_node_in_range()
75 mutex_lock(&i915->mm.stolen_lock); in i915_gem_stolen_remove_node()
77 mutex_unlock(&i915->mm.stolen_lock); in i915_gem_stolen_remove_node()
82 return (dsm->start != 0 || HAS_LMEMBAR_SMEM_STOLEN(i915)) && dsm->end > dsm->start; in valid_stolen_size()
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| /kernel/linux/linux-6.6/drivers/spi/ |
| D | spi-sn-f-ospi.c | 1 // SPDX-License-Identifier: GPL-2.0-only
16 #include <linux/spi/spi-mem.h>
111 void __iomem *base; member
119 if (!op->dummy.nbytes) in f_ospi_get_dummy_cycle()
122 return (op->dummy.nbytes * 8) / op->dummy.buswidth; in f_ospi_get_dummy_cycle()
128 ospi->base + OSPI_IRQ); in f_ospi_clear_irq()
135 val = readl(ospi->base + OSPI_IRQ_STAT_EN); in f_ospi_enable_irq_status()
137 writel(val, ospi->base + OSPI_IRQ_STAT_EN); in f_ospi_enable_irq_status()
144 val = readl(ospi->base + OSPI_IRQ_STAT_EN); in f_ospi_disable_irq_status()
146 writel(val, ospi->base + OSPI_IRQ_STAT_EN); in f_ospi_disable_irq_status()
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| /kernel/linux/linux-5.10/drivers/net/can/sja1000/ |
| D | sja1000_isa.c | 1 // SPDX-License-Identifier: GPL-2.0-only
24 MODULE_DESCRIPTION("Socket-CAN driver for SJA1000 on the ISA bus");
32 static unsigned long mem[MAXDEV]; variable
35 static unsigned char cdr[MAXDEV] = {[0 ... (MAXDEV - 1)] = 0xff};
36 static unsigned char ocr[MAXDEV] = {[0 ... (MAXDEV - 1)] = 0xff};
37 static int indirect[MAXDEV] = {[0 ... (MAXDEV - 1)] = -1};
43 module_param_hw_array(mem, ulong, iomem, NULL, 0444);
44 MODULE_PARM_DESC(mem, "I/O memory address");
71 return readb(priv->reg_base + reg); in sja1000_isa_mem_read_reg()
77 writeb(val, priv->reg_base + reg); in sja1000_isa_mem_write_reg()
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| /kernel/linux/linux-6.6/drivers/net/can/sja1000/ |
| D | sja1000_isa.c | 1 // SPDX-License-Identifier: GPL-2.0-only
24 MODULE_DESCRIPTION("Socket-CAN driver for SJA1000 on the ISA bus");
32 static unsigned long mem[MAXDEV]; variable
35 static unsigned char cdr[MAXDEV] = {[0 ... (MAXDEV - 1)] = 0xff};
36 static unsigned char ocr[MAXDEV] = {[0 ... (MAXDEV - 1)] = 0xff};
37 static int indirect[MAXDEV] = {[0 ... (MAXDEV - 1)] = -1};
43 module_param_hw_array(mem, ulong, iomem, NULL, 0444);
44 MODULE_PARM_DESC(mem, "I/O memory address");
71 return readb(priv->reg_base + reg); in sja1000_isa_mem_read_reg()
77 writeb(val, priv->reg_base + reg); in sja1000_isa_mem_write_reg()
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| /kernel/linux/linux-6.6/drivers/iio/adc/ |
| D | men_z188_adc.c | 1 // SPDX-License-Identifier: GPL-2.0-only
25 struct resource *mem; member
26 void __iomem *base; member
59 tmp = readw(adc->base + chan->channel * 4); in z188_iio_read_raw()
62 dev_info(&iio_dev->dev, in z188_iio_read_raw()
64 chan->channel); in z188_iio_read_raw()
65 return -EIO; in z188_iio_read_raw()
71 ret = -EINVAL; in z188_iio_read_raw()
105 struct resource *mem; in men_z188_probe() local
108 indio_dev = devm_iio_device_alloc(&dev->dev, sizeof(struct z188_adc)); in men_z188_probe()
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| /kernel/linux/linux-5.10/drivers/iio/adc/ |
| D | men_z188_adc.c | 1 // SPDX-License-Identifier: GPL-2.0-only
25 struct resource *mem; member
26 void __iomem *base; member
59 tmp = readw(adc->base + chan->channel * 4); in z188_iio_read_raw()
62 dev_info(&iio_dev->dev, in z188_iio_read_raw()
64 chan->channel); in z188_iio_read_raw()
65 return -EIO; in z188_iio_read_raw()
71 ret = -EINVAL; in z188_iio_read_raw()
105 struct resource *mem; in men_z188_probe() local
108 indio_dev = devm_iio_device_alloc(&dev->dev, sizeof(struct z188_adc)); in men_z188_probe()
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| /kernel/linux/linux-6.6/drivers/mcb/ |
| D | mcb-lpc.c | 1 // SPDX-License-Identifier: GPL-2.0-only
14 #include "mcb-internal.h"
18 struct resource *mem; member
19 void __iomem *base; member
28 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); in mcb_lpc_probe()
30 return -ENOMEM; in mcb_lpc_probe()
32 priv->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); in mcb_lpc_probe()
33 if (!priv->mem) { in mcb_lpc_probe()
34 dev_err(&pdev->dev, "No Memory resource\n"); in mcb_lpc_probe()
35 return -ENODEV; in mcb_lpc_probe()
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| /kernel/linux/linux-5.10/drivers/mcb/ |
| D | mcb-lpc.c | 1 // SPDX-License-Identifier: GPL-2.0-only
14 #include "mcb-internal.h"
18 struct resource *mem; member
19 void __iomem *base; member
28 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); in mcb_lpc_probe()
30 return -ENOMEM; in mcb_lpc_probe()
32 priv->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); in mcb_lpc_probe()
33 if (!priv->mem) { in mcb_lpc_probe()
34 dev_err(&pdev->dev, "No Memory resource\n"); in mcb_lpc_probe()
35 return -ENODEV; in mcb_lpc_probe()
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| /kernel/linux/linux-6.6/drivers/pci/controller/ |
| D | pci-v3-semi.c | 1 // SPDX-License-Identifier: GPL-2.0
6 * Based on the code from arch/arm/mach-integrator/pci_v3.c
8 * Copyright (C) 2000-2001 Deep Blue Solutions Ltd
134 /* PCI BASE bits (PCI -> Local Bus) */
141 /* PCI MAP bits (PCI -> Local bus) */
150 /* LB_BASE0,1 bits (Local bus -> PCI) */
172 /* LB_MAP0,1 bits (Local bus -> PCI) */
185 /* LB_BASE2 bits (Local bus -> PCI IO) */
192 /* LB_MAP2 bits (Local bus -> PCI IO) */
229 /* ARM Integrator-specific extended control registers */
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| /kernel/linux/linux-5.10/drivers/pci/controller/ |
| D | pci-v3-semi.c | 1 // SPDX-License-Identifier: GPL-2.0
6 * Based on the code from arch/arm/mach-integrator/pci_v3.c
8 * Copyright (C) 2000-2001 Deep Blue Solutions Ltd
136 /* PCI BASE bits (PCI -> Local Bus) */
143 /* PCI MAP bits (PCI -> Local bus) */
152 /* LB_BASE0,1 bits (Local bus -> PCI) */
174 /* LB_MAP0,1 bits (Local bus -> PCI) */
187 /* LB_BASE2 bits (Local bus -> PCI IO) */
194 /* LB_MAP2 bits (Local bus -> PCI IO) */
231 /* ARM Integrator-specific extended control registers */
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| /kernel/linux/linux-5.10/drivers/net/can/cc770/ |
| D | cc770_isa.c | 1 // SPDX-License-Identifier: GPL-2.0-only
9 * Bosch CC770 and Intel AN82527 CAN controllers on the ISA or PC-104 bus.
17 * insmod cc770_isa.ko mem=0xd1000,0xd1000 irq=7,11
32 * Note: for clk, cir, bcr and cor, the first argument re-defines the
35 * insmod cc770_isa.ko mem=0xd1000,0xd1000 irq=7,11 clk=24000000
39 * insmod cc770_isa.ko mem=0xd1000,0xd1000 irq=7,11 clk=24000000,24000000
61 MODULE_DESCRIPTION("Socket-CAN driver for CC770 on the ISA bus");
69 static unsigned long mem[MAXDEV]; variable
72 static u8 cir[MAXDEV] = {[0 ... (MAXDEV - 1)] = 0xff};
73 static u8 cor[MAXDEV] = {[0 ... (MAXDEV - 1)] = 0xff};
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| /kernel/linux/linux-6.6/drivers/net/can/cc770/ |
| D | cc770_isa.c | 1 // SPDX-License-Identifier: GPL-2.0-only
9 * Bosch CC770 and Intel AN82527 CAN controllers on the ISA or PC-104 bus.
17 * insmod cc770_isa.ko mem=0xd1000,0xd1000 irq=7,11
32 * Note: for clk, cir, bcr and cor, the first argument re-defines the
35 * insmod cc770_isa.ko mem=0xd1000,0xd1000 irq=7,11 clk=24000000
39 * insmod cc770_isa.ko mem=0xd1000,0xd1000 irq=7,11 clk=24000000,24000000
61 MODULE_DESCRIPTION("Socket-CAN driver for CC770 on the ISA bus");
69 static unsigned long mem[MAXDEV]; variable
72 static u8 cir[MAXDEV] = {[0 ... (MAXDEV - 1)] = 0xff};
73 static u8 cor[MAXDEV] = {[0 ... (MAXDEV - 1)] = 0xff};
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| /kernel/linux/linux-5.10/arch/arm/mm/ |
| D | pmsa-v7.c | 20 phys_addr_t base; member
25 static struct region __initdata mem[MPU_MAX_REGIONS]; variable
52 /* Data-side / unified region attributes */
66 /* Region base address register */
76 /* Optional instruction-side region attributes */
78 /* I-side Region access control register */
84 /* I-side Region size register */
90 /* I-side Region base address register */
108 /* Data-side / unified region attributes */
126 /* Region base address register */
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