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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pci/
Drockchip-pcie-ep.txt4 - compatible: Should contain "rockchip,rk3399-pcie-ep"
5 - reg: Two register ranges as listed in the reg-names property
6 - reg-names: Must include the following names
7 - "apb-base"
8 - "mem-base"
9 - clocks: Must contain an entry for each entry in clock-names.
10 See ../clocks/clock-bindings.txt for details.
11 - clock-names: Must include the following entries:
12 - "aclk"
13 - "aclk-perf"
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Drockchip-pcie-host.txt4 - #address-cells: Address representation for root ports, set to <3>
5 - #size-cells: Size representation for root ports, set to <2>
6 - #interrupt-cells: specifies the number of cells needed to encode an
8 - compatible: Should contain "rockchip,rk3399-pcie"
9 - reg: Two register ranges as listed in the reg-names property
10 - reg-names: Must include the following names
11 - "axi-base"
12 - "apb-base"
13 - clocks: Must contain an entry for each entry in clock-names.
14 See ../clocks/clock-bindings.txt for details.
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pci/
Drockchip,rk3399-pcie-common.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/rockchip,rk3399-pcie-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Lin <shawn.lin@rock-chips.com>
19 clock-names:
21 - const: aclk
22 - const: aclk-perf
23 - const: hclk
24 - const: pm
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Drockchip,rk3399-pcie-ep.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/rockchip,rk3399-pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Lin <shawn.lin@rock-chips.com>
13 - $ref: /schemas/pci/pci-ep.yaml#
14 - $ref: rockchip,rk3399-pcie-common.yaml#
18 const: rockchip,rk3399-pcie-ep
22 reg-names:
24 - const: apb-base
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Drockchip,rk3399-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/rockchip,rk3399-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Lin <shawn.lin@rock-chips.com>
13 - $ref: /schemas/pci/pci-bus.yaml#
14 - $ref: rockchip,rk3399-pcie-common.yaml#
18 const: rockchip,rk3399-pcie
22 reg-names:
24 - const: axi-base
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/kernel/linux/linux-5.10/drivers/pci/controller/
Dpcie-rockchip.c1 // SPDX-License-Identifier: GPL-2.0+
7 * Author: Shawn Lin <shawn.lin@rock-chips.com>
8 * Wenrui Li <wenrui.li@rock-chips.com>
24 #include "pcie-rockchip.h"
28 struct device *dev = rockchip->dev; in rockchip_pcie_parse_dt()
30 struct device_node *node = dev->of_node; in rockchip_pcie_parse_dt()
34 if (rockchip->is_rc) { in rockchip_pcie_parse_dt()
37 "axi-base"); in rockchip_pcie_parse_dt()
38 rockchip->reg_base = devm_pci_remap_cfg_resource(dev, regs); in rockchip_pcie_parse_dt()
39 if (IS_ERR(rockchip->reg_base)) in rockchip_pcie_parse_dt()
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/kernel/linux/linux-6.6/drivers/pci/controller/
Dpcie-rockchip.c1 // SPDX-License-Identifier: GPL-2.0+
7 * Author: Shawn Lin <shawn.lin@rock-chips.com>
8 * Wenrui Li <wenrui.li@rock-chips.com>
25 #include "pcie-rockchip.h"
29 struct device *dev = rockchip->dev; in rockchip_pcie_parse_dt()
31 struct device_node *node = dev->of_node; in rockchip_pcie_parse_dt()
35 if (rockchip->is_rc) { in rockchip_pcie_parse_dt()
38 "axi-base"); in rockchip_pcie_parse_dt()
39 rockchip->reg_base = devm_pci_remap_cfg_resource(dev, regs); in rockchip_pcie_parse_dt()
40 if (IS_ERR(rockchip->reg_base)) in rockchip_pcie_parse_dt()
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/kernel/linux/linux-6.6/arch/arm64/boot/dts/rockchip/
Drk3399.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3399-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3399-power.h>
12 #include <dt-bindings/thermal/thermal.h>
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/rockchip/
Drk3399.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3399-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3399-power.h>
12 #include <dt-bindings/thermal/thermal.h>
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
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/kernel/linux/linux-5.10/drivers/scsi/megaraid/
Dmegaraid_mbox.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright (c) 2003-2004 LSI Logic Corporation.
20 * --- ------------ --- --- ---- ----
37 * LSI MegaRAID SCSI 320-0 1000 1960 1000 A520
38 * LSI MegaRAID SCSI 320-1 1000 1960 1000 0520
39 * LSI MegaRAID SCSI 320-2 1000 1960 1000 0518
40 * LSI MegaRAID SCSI 320-0X 1000 0407 1000 0530
41 * LSI MegaRAID SCSI 320-2X 1000 0407 1000 0532
42 * LSI MegaRAID SCSI 320-4X 1000 0407 1000 0531
43 * LSI MegaRAID SCSI 320-1E 1000 0408 1000 0001
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/kernel/linux/linux-6.6/drivers/scsi/megaraid/
Dmegaraid_mbox.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright (c) 2003-2004 LSI Logic Corporation.
20 * --- ------------ --- --- ---- ----
37 * LSI MegaRAID SCSI 320-0 1000 1960 1000 A520
38 * LSI MegaRAID SCSI 320-1 1000 1960 1000 0520
39 * LSI MegaRAID SCSI 320-2 1000 1960 1000 0518
40 * LSI MegaRAID SCSI 320-0X 1000 0407 1000 0530
41 * LSI MegaRAID SCSI 320-2X 1000 0407 1000 0532
42 * LSI MegaRAID SCSI 320-4X 1000 0407 1000 0531
43 * LSI MegaRAID SCSI 320-1E 1000 0408 1000 0001
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/kernel/linux/linux-6.6/drivers/scsi/
Dpmcraid.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * pmcraid.c -- driver for PMC Sierra MaxRAID controller adapters
5 * Written By: Anil Ravindranath<anil_ravindranath@pmc-sierra.com>
6 * PMC-Sierra Inc
54 * pmcraid_adapter_count - count of configured adapters
59 * Supporting user-level control interface through IOCTL commands.
60 * pmcraid_major - major number to use
61 * pmcraid_minor - minor number(s) to use
70 MODULE_AUTHOR("Anil Ravindranath<anil_ravindranath@pmc-sierra.com>");
77 "Enables firmware error code logging, default :1 high-severity"
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/kernel/linux/linux-5.10/drivers/scsi/
Dpmcraid.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * pmcraid.c -- driver for PMC Sierra MaxRAID controller adapters
5 * Written By: Anil Ravindranath<anil_ravindranath@pmc-sierra.com>
6 * PMC-Sierra Inc
54 * pmcraid_adapter_count - count of configured adapters
59 * Supporting user-level control interface through IOCTL commands.
60 * pmcraid_major - major number to use
61 * pmcraid_minor - minor number(s) to use
70 MODULE_AUTHOR("Anil Ravindranath<anil_ravindranath@pmc-sierra.com>");
77 "Enables firmware error code logging, default :1 high-severity"
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/kernel/linux/linux-5.10/drivers/net/ethernet/chelsio/cxgb4/
Dcxgb4_main.c4 * Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved.
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
110 /* Include PCI Device IDs for both PF4 and PF0-3 so our PCI probe() routine is
127 #define FW4_CFNAME "cxgb4/t4-config.txt"
128 #define FW5_CFNAME "cxgb4/t5-config.txt"
129 #define FW6_CFNAME "cxgb4/t6-config.txt"
145 * order MSI-X, MSI, legacy INTx interrupts. This parameter determines which
155 MODULE_PARM_DESC(msi, "whether to use INTx (0), MSI (1) or MSI-X (2)");
159 * offset by 2 bytes in order to have the IP headers line up on 4-byte
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/kernel/linux/linux-6.6/drivers/net/ethernet/chelsio/cxgb4/
Dcxgb4_main.c4 * Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved.
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
109 /* Include PCI Device IDs for both PF4 and PF0-3 so our PCI probe() routine is
126 #define FW4_CFNAME "cxgb4/t4-config.txt"
127 #define FW5_CFNAME "cxgb4/t5-config.txt"
128 #define FW6_CFNAME "cxgb4/t6-config.txt"
144 * order MSI-X, MSI, legacy INTx interrupts. This parameter determines which
154 MODULE_PARM_DESC(msi, "whether to use INTx (0), MSI (1) or MSI-X (2)");
158 * offset by 2 bytes in order to have the IP headers line up on 4-byte
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/kernel/linux/linux-5.10/drivers/infiniband/hw/hfi1/
Dchip.c2 * Copyright(c) 2015 - 2020 Intel Corporation.
24 * - Redistributions of source code must retain the above copyright
26 * - Redistributions in binary form must reproduce the above copyright
30 * - Neither the name of Intel Corporation nor the names of its
73 MODULE_PARM_DESC(num_vls, "Set number of Virtual Lanes to use (1-8)");
119 #define SEC_SC_HALTED 0x4 /* per-context only */
120 #define SEC_SPC_FREEZE 0x8 /* per-HFI only */
128 * 0 - User Fecn Handling
129 * 1 - Vnic
130 * 2 - AIP
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/kernel/linux/linux-6.6/drivers/infiniband/hw/hfi1/
Dchip.c1 // SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause
3 * Copyright(c) 2015 - 2020 Intel Corporation.
32 MODULE_PARM_DESC(num_vls, "Set number of Virtual Lanes to use (1-8)");
78 #define SEC_SC_HALTED 0x4 /* per-context only */
79 #define SEC_SPC_FREEZE 0x8 /* per-HFI only */
87 * 0 - User Fecn Handling
88 * 1 - Vnic
89 * 2 - AIP
90 * 3 - Verbs
101 #define emulator_rev(dd) ((dd)->irev >> 8)
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