| /kernel/linux/linux-5.10/Documentation/admin-guide/hw-vuln/ |
| D | gather_data_sampling.rst | 29 Without mitigation, GDS can infer stale data across virtually all
38 Because of this, it is important to ensure that the mitigation stays enabled in
41 The hardware enforces the mitigation for SGX. Likewise, VMMs should ensure
42 that guests are not allowed to disable the GDS mitigation. If a host erred and
43 allowed this, a guest could theoretically disable GDS mitigation, mount an
46 Mitigation mechanism
53 and mitigation support.
55 IA32_MCU_OPT_CTRL[GDS_MITG_DIS] R/W Disables the mitigation
71 Mitigation control on the kernel command line
73 The mitigation can be disabled by setting "gather_data_sampling=off" or
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| D | srso.rst | 6 This is a mitigation for the speculative return stack overflow (SRSO)
39 The sysfs file showing SRSO mitigation status is:
52 - 'Mitigation: microcode' Extended IBPB functionality microcode
61 - 'Mitigation: safe RET' Software-only mitigation. It complements
69 - 'Mitigation: IBPB' Similar protection as "safe RET" above
76 - 'Mitigation: IBPB on VMEXIT' Mitigation addressing the cloud provider
95 Considering the performance implications of each mitigation type, the
96 default one is 'Mitigation: safe RET' which should take care of most
105 As one can surmise, 'Mitigation: safe RET' does come at the cost of some
108 disable the mitigation with spec_rstack_overflow=off.
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| D | mds.rst | 26 Not all processors are affected by all variants of MDS, but the mitigation
103 - The processor is vulnerable, but no mitigation enabled
107 The mitigation is enabled on a best effort basis. See :ref:`vmwerv`
108 * - 'Mitigation: Clear CPU buffers'
109 - The processor is vulnerable and the CPU buffer clearing mitigation is
124 Best effort mitigation mode
128 mitigation mechanism is not advertised via CPUID the kernel selects a best
129 effort mitigation mode. This mode invokes the mitigation instructions
140 Mitigation mechanism
147 enables the mitigation by default. The mitigation can be controlled at boot
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| D | special-register-buffer-data-sampling.rst | 61 Mitigation mechanism
86 the mitigation for RDRAND and RDSEED instructions executed outside of Intel
88 disable the mitigation using this opt-out mechanism, RDRAND and RDSEED do not
96 Along with the mitigation for this issue, Intel added a new thread-scope
102 disables the mitigation for RDRAND and RDSEED executed outside of an Intel SGX
103 enclave on that logical processor. Opting out of the mitigation for a
107 Note that inside of an Intel SGX enclave, the mitigation is applied regardless
110 Mitigation control on the kernel command line
112 The kernel command line allows control over the SRBDS mitigation at boot time
116 off This option disables SRBDS mitigation for RDRAND and RDSEED on
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| D | reg-file-data-sampling.rst | 40 Mitigation chapter
44 mitigation strategy to force the CPU to clear the affected buffers before an
50 Mitigation points
60 vulnerability and mitigation capability:
66 Mitigation control on the kernel command line
68 The kernel command line allows to control RFDS mitigation at boot time with the
72 on If the CPU is vulnerable, enable mitigation; CPU buffer clearing
74 off Disables mitigation.
77 Mitigation default is selected by CONFIG_MITIGATION_RFDS.
79 Mitigation status information
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| D | processor_mmio_stale_data.rst | 10 provided to untrusted guests may need mitigation. These vulnerabilities are
13 by an unmitigated transient execution attack. Mitigation for these
110 section, mitigation largely remains the same for all the variants, i.e. to
117 specific variants of Processor MMIO Stale Data vulnerabilities and mitigation
150 Mitigation chapter
153 same mitigation strategy to force the CPU to clear the affected buffers before
166 additional mitigation is needed on such CPUs.
168 For CPUs not affected by MDS or TAA, mitigation is needed only for the attacker
173 Mitigation points
177 Same mitigation as MDS when affected by MDS/TAA, otherwise no mitigation
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| D | tsx_async_abort.rst | 99 …- The CPU is affected by this vulnerability and the microcode and kernel mitigation are not applie…
102 * - 'Mitigation: Clear CPU buffers'
104 * - 'Mitigation: TSX disabled'
111 Best effort mitigation mode
115 mitigation mechanism is not advertised via CPUID the kernel selects a best
116 effort mitigation mode. This mode invokes the mitigation instructions
128 Mitigation mechanism
133 enables the mitigation by default.
136 The mitigation can be controlled at boot time via a kernel command line option.
139 Virtualization mitigation
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| D | spectre.rst | 144 For a full mitigation against BHB attacks, it's recommended to use
331 mitigation status of the system for Spectre: whether the system is
334 The sysfs file showing Spectre variant 1 mitigation status is:
348 * - 'Mitigation: usercopy/swapgs barriers and __user pointer sanitization'
358 retpoline mitigation or if the CPU has hardware mitigation, and if the
359 CPU has support for additional process-specific mitigation.
372 The sysfs file showing Spectre variant 2 mitigation status is:
382 'Mitigation: None' Vulnerable, no mitigation
383 'Mitigation: Retpolines' Use Retpoline thunks
384 'Mitigation: LFENCE' Use LFENCE instructions
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| /kernel/linux/linux-6.6/Documentation/admin-guide/hw-vuln/ |
| D | gather_data_sampling.rst | 29 Without mitigation, GDS can infer stale data across virtually all
38 Because of this, it is important to ensure that the mitigation stays enabled in
41 The hardware enforces the mitigation for SGX. Likewise, VMMs should ensure
42 that guests are not allowed to disable the GDS mitigation. If a host erred and
43 allowed this, a guest could theoretically disable GDS mitigation, mount an
46 Mitigation mechanism
53 and mitigation support.
55 IA32_MCU_OPT_CTRL[GDS_MITG_DIS] R/W Disables the mitigation
71 Mitigation control on the kernel command line
73 The mitigation can be disabled by setting "gather_data_sampling=off" or
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| D | srso.rst | 6 This is a mitigation for the speculative return stack overflow (SRSO)
39 The sysfs file showing SRSO mitigation status is:
60 The "Safe RET" mitigation (see below) has been applied to protect the
70 Note that User->User mitigation is controlled by how the IBPB aspect in
71 the Spectre v2 mitigation is selected:
85 * 'Mitigation: Safe RET':
87 Combined microcode/software mitigation. It complements the
93 * 'Mitigation: IBPB':
100 * 'Mitigation: IBPB on VMEXIT':
102 Mitigation addressing the cloud provider scenario - the Guest->Host
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| D | indirect-target-selection.rst | 49 update for mitigation.
55 Mitigation chapter
59 the mitigation is to not allow indirect branches in the lower half.
89 reason, when retpoline is enabled, ITS mitigation only relocates the RETs to
90 safe thunks. Unless user requested the RSB-stuffing mitigation.
94 RSB-stuffing via Call Depth Tracking is a mitigation for Retbleed RSB-underflow
97 Mitigation in guests
99 All guests deploy ITS mitigation by default, irrespective of eIBRS enumeration
104 To prevent guests from unnecessarily deploying the mitigation on unaffected
110 Mitigation options
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| D | mds.rst | 26 Not all processors are affected by all variants of MDS, but the mitigation
103 - The processor is vulnerable, but no mitigation enabled
107 The mitigation is enabled on a best effort basis. See :ref:`vmwerv`
108 * - 'Mitigation: Clear CPU buffers'
109 - The processor is vulnerable and the CPU buffer clearing mitigation is
124 Best effort mitigation mode
128 mitigation mechanism is not advertised via CPUID the kernel selects a best
129 effort mitigation mode. This mode invokes the mitigation instructions
140 Mitigation mechanism
147 enables the mitigation by default. The mitigation can be controlled at boot
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| D | special-register-buffer-data-sampling.rst | 62 Mitigation mechanism
87 the mitigation for RDRAND and RDSEED instructions executed outside of Intel
89 disable the mitigation using this opt-out mechanism, RDRAND and RDSEED do not
97 Along with the mitigation for this issue, Intel added a new thread-scope
103 disables the mitigation for RDRAND and RDSEED executed outside of an Intel SGX
104 enclave on that logical processor. Opting out of the mitigation for a
108 Note that inside of an Intel SGX enclave, the mitigation is applied regardless
111 Mitigation control on the kernel command line
113 The kernel command line allows control over the SRBDS mitigation at boot time
117 off This option disables SRBDS mitigation for RDRAND and RDSEED on
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| D | reg-file-data-sampling.rst | 40 Mitigation chapter
44 mitigation strategy to force the CPU to clear the affected buffers before an
50 Mitigation points
60 vulnerability and mitigation capability:
66 Mitigation control on the kernel command line
68 The kernel command line allows to control RFDS mitigation at boot time with the
72 on If the CPU is vulnerable, enable mitigation; CPU buffer clearing
74 off Disables mitigation.
77 Mitigation default is selected by CONFIG_MITIGATION_RFDS.
79 Mitigation status information
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| D | processor_mmio_stale_data.rst | 10 provided to untrusted guests may need mitigation. These vulnerabilities are
13 by an unmitigated transient execution attack. Mitigation for these
110 section, mitigation largely remains the same for all the variants, i.e. to
117 specific variants of Processor MMIO Stale Data vulnerabilities and mitigation
150 Mitigation chapter
153 same mitigation strategy to force the CPU to clear the affected buffers before
164 additional mitigation is needed on such CPUs.
166 For CPUs not affected by MDS or TAA, mitigation is needed only for the attacker
171 Mitigation points
175 Same mitigation as MDS when affected by MDS/TAA, otherwise no mitigation
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| D | tsx_async_abort.rst | 99 …- The CPU is affected by this vulnerability and the microcode and kernel mitigation are not applie…
102 * - 'Mitigation: Clear CPU buffers'
104 * - 'Mitigation: TSX disabled'
111 Best effort mitigation mode
115 mitigation mechanism is not advertised via CPUID the kernel selects a best
116 effort mitigation mode. This mode invokes the mitigation instructions
128 Mitigation mechanism
133 enables the mitigation by default.
136 The mitigation can be controlled at boot time via a kernel command line option.
139 Virtualization mitigation
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| D | spectre.rst | 143 For a full mitigation against BHB attacks it is recommended to set BHI_DIS_S or
330 mitigation status of the system for Spectre: whether the system is
333 The sysfs file showing Spectre variant 1 mitigation status is:
347 * - 'Mitigation: usercopy/swapgs barriers and __user pointer sanitization'
357 retpoline mitigation or if the CPU has hardware mitigation, and if the
358 CPU has support for additional process-specific mitigation.
371 The sysfs file showing Spectre variant 2 mitigation status is:
381 'Mitigation: None' Vulnerable, no mitigation
382 'Mitigation: Retpolines' Use Retpoline thunks
383 'Mitigation: LFENCE' Use LFENCE instructions
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| D | multihit.rst | 81 * - KVM: Mitigation: Split huge pages
83 * - KVM: Mitigation: VMX unsupported
85 * - KVM: Mitigation: VMX disabled
88 - The processor is vulnerable, but no mitigation enabled
104 Mitigation mechanism
122 Mitigation control on the kernel command line and KVM - module parameter
125 The KVM hypervisor mitigation mechanism for marking huge pages as
133 force Mitigation is enabled. In this case, the mitigation implements
139 off Mitigation is disabled.
141 auto Enable mitigation only if the platform is affected and the kernel
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| /kernel/linux/linux-6.6/arch/x86/kernel/cpu/ |
| D | bugs.c | 211 * If the host has SSBD mitigation enabled, force it in the host's in x86_virt_spec_ctrl()
247 /* Default mitigation for MDS-affected CPUs */
253 [MDS_MITIGATION_FULL] = "Mitigation: Clear CPU buffers",
307 /* Default mitigation for TAA-affected CPUs */
314 [TAA_MITIGATION_VERW] = "Mitigation: Clear CPU buffers",
315 [TAA_MITIGATION_TSX_DISABLED] = "Mitigation: TSX disabled",
337 * TAA mitigation via VERW is turned off if both in taa_select_mitigation()
363 * TSX is enabled, select alternate mitigation for TAA which is in taa_select_mitigation()
367 * present on host, enable the mitigation for UCODE_NEEDED as well. in taa_select_mitigation()
405 /* Default mitigation for Processor MMIO Stale Data vulnerabilities */
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| /kernel/linux/linux-5.10/arch/x86/kernel/cpu/ |
| D | bugs.c | 192 * If the host has SSBD mitigation enabled, force it in the host's in x86_virt_spec_ctrl()
228 /* Default mitigation for MDS-affected CPUs */
234 [MDS_MITIGATION_FULL] = "Mitigation: Clear CPU buffers",
288 /* Default mitigation for TAA-affected CPUs */
295 [TAA_MITIGATION_VERW] = "Mitigation: Clear CPU buffers",
296 [TAA_MITIGATION_TSX_DISABLED] = "Mitigation: TSX disabled",
320 * TAA mitigation via VERW is turned off if both in taa_select_mitigation()
347 * TSX is enabled, select alternate mitigation for TAA which is in taa_select_mitigation()
351 * present on host, enable the mitigation for UCODE_NEEDED as well. in taa_select_mitigation()
389 /* Default mitigation for Processor MMIO Stale Data vulnerabilities */
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| /kernel/linux/linux-6.6/Documentation/arch/x86/ |
| D | mds.rst | 1 Microarchitectural Data Sampling (MDS) mitigation
70 Mitigation strategy
73 All variants have the same mitigation strategy at least for the single CPU
82 command. The latter is issued when L1TF mitigation is enabled so the extra
101 The mitigation is invoked on kernel/userspace, hypervisor/guest and C-state
115 Kernel internal mitigation modes
119 off Mitigation is disabled. Either the CPU is not affected or
122 full Mitigation is enabled. CPU is affected and MD_CLEAR is
125 vmwerv Mitigation is enabled. CPU is affected and MD_CLEAR is not
133 line then the kernel selects the appropriate mitigation mode depending on
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| D | tsx_async_abort.rst | 3 TSX Async Abort (TAA) mitigation
21 Mitigation strategy
33 Kernel internal mitigation modes
37 off Mitigation is disabled. Either the CPU is not affected or
40 tsx disabled Mitigation is enabled. TSX feature is disabled by default at
43 verw Mitigation is enabled. CPU is affected and MD_CLEAR is
46 ucode needed Mitigation is enabled. CPU is affected and MD_CLEAR is not
54 not provided then the kernel selects an appropriate mitigation depending on the
58 TAA mitigation, VERW behavior and TSX feature for various combinations of
66 …A_NO MDS_NO TSX_CTRL_MSR TSX state VERW can clear TAA mitigation TAA mitigation
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| /kernel/linux/linux-5.10/Documentation/x86/ |
| D | mds.rst | 1 Microarchitectural Data Sampling (MDS) mitigation
70 Mitigation strategy
73 All variants have the same mitigation strategy at least for the single CPU
82 command. The latter is issued when L1TF mitigation is enabled so the extra
101 The mitigation is invoked on kernel/userspace, hypervisor/guest and C-state
115 Kernel internal mitigation modes
119 off Mitigation is disabled. Either the CPU is not affected or
122 full Mitigation is enabled. CPU is affected and MD_CLEAR is
125 vmwerv Mitigation is enabled. CPU is affected and MD_CLEAR is not
133 line then the kernel selects the appropriate mitigation mode depending on
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| D | tsx_async_abort.rst | 3 TSX Async Abort (TAA) mitigation
21 Mitigation strategy
33 Kernel internal mitigation modes
37 off Mitigation is disabled. Either the CPU is not affected or
40 tsx disabled Mitigation is enabled. TSX feature is disabled by default at
43 verw Mitigation is enabled. CPU is affected and MD_CLEAR is
46 ucode needed Mitigation is enabled. CPU is affected and MD_CLEAR is not
54 not provided then the kernel selects an appropriate mitigation depending on the
58 TAA mitigation, VERW behavior and TSX feature for various combinations of
66 …A_NO MDS_NO TSX_CTRL_MSR TSX state VERW can clear TAA mitigation TAA mitigation
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| /kernel/linux/linux-5.10/arch/arm64/kernel/ |
| D | proton-pack.c | 3 * Handle detection, reporting and mitigation of Spectre v1, v2 and v4, as
35 * We try to ensure that the mitigation state can never change as the result of
63 return sprintf(buf, "Mitigation: __user pointer sanitization\n"); in cpu_show_spectre_v1()
96 pr_info_once("spectre-v2 mitigation disabled by command line option\n"); in spectre_v2_mitigations_off()
145 return sprintf(buf, "Mitigation: %s%s\n", v2_str, bhb_str); in cpu_show_spectre_v2()
341 * still rely on firmware for the mitigation at EL2. in spectre_v2_enable_fw_mitigation()
373 * A major source of headaches is that the software mitigation is enabled both
380 * all of the currently onlined CPUs are safelisted, as the mitigation tends to
383 * The only good part is that if the firmware mitigation is present, then it is
385 * vulnerable CPU if one of the boot CPUs is using the firmware mitigation.
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